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1// SPDX-License-Identifier: GPL-2.02/*3 * NXP FXLS8962AF/FXLS8964AF Accelerometer Core Driver4 *5 * Copyright 2021 Connected Cars A/S6 *7 * Datasheet:8 * https://www.nxp.com/docs/en/data-sheet/FXLS8962AF.pdf9 * https://www.nxp.com/docs/en/data-sheet/FXLS8964AF.pdf10 *11 * Errata:12 * https://www.nxp.com/docs/en/errata/ES_FXLS8962AF.pdf13 */14 15#include <linux/bits.h>16#include <linux/bitfield.h>17#include <linux/i2c.h>18#include <linux/irq.h>19#include <linux/module.h>20#include <linux/mod_devicetable.h>21#include <linux/pm_runtime.h>22#include <linux/property.h>23#include <linux/regulator/consumer.h>24#include <linux/regmap.h>25 26#include <linux/iio/buffer.h>27#include <linux/iio/events.h>28#include <linux/iio/iio.h>29#include <linux/iio/kfifo_buf.h>30#include <linux/iio/sysfs.h>31 32#include "fxls8962af.h"33 34#define FXLS8962AF_INT_STATUS 0x0035#define FXLS8962AF_INT_STATUS_SRC_BOOT BIT(0)36#define FXLS8962AF_INT_STATUS_SRC_SDCD_OT BIT(4)37#define FXLS8962AF_INT_STATUS_SRC_BUF BIT(5)38#define FXLS8962AF_INT_STATUS_SRC_DRDY BIT(7)39#define FXLS8962AF_TEMP_OUT 0x0140#define FXLS8962AF_VECM_LSB 0x0241#define FXLS8962AF_OUT_X_LSB 0x0442#define FXLS8962AF_OUT_Y_LSB 0x0643#define FXLS8962AF_OUT_Z_LSB 0x0844#define FXLS8962AF_BUF_STATUS 0x0b45#define FXLS8962AF_BUF_STATUS_BUF_CNT GENMASK(5, 0)46#define FXLS8962AF_BUF_STATUS_BUF_OVF BIT(6)47#define FXLS8962AF_BUF_STATUS_BUF_WMRK BIT(7)48#define FXLS8962AF_BUF_X_LSB 0x0c49#define FXLS8962AF_BUF_Y_LSB 0x0e50#define FXLS8962AF_BUF_Z_LSB 0x1051 52#define FXLS8962AF_PROD_REV 0x1253#define FXLS8962AF_WHO_AM_I 0x1354 55#define FXLS8962AF_SYS_MODE 0x1456#define FXLS8962AF_SENS_CONFIG1 0x1557#define FXLS8962AF_SENS_CONFIG1_ACTIVE BIT(0)58#define FXLS8962AF_SENS_CONFIG1_RST BIT(7)59#define FXLS8962AF_SC1_FSR_MASK GENMASK(2, 1)60#define FXLS8962AF_SC1_FSR_PREP(x) FIELD_PREP(FXLS8962AF_SC1_FSR_MASK, (x))61#define FXLS8962AF_SC1_FSR_GET(x) FIELD_GET(FXLS8962AF_SC1_FSR_MASK, (x))62 63#define FXLS8962AF_SENS_CONFIG2 0x1664#define FXLS8962AF_SENS_CONFIG3 0x1765#define FXLS8962AF_SC3_WAKE_ODR_MASK GENMASK(7, 4)66#define FXLS8962AF_SC3_WAKE_ODR_PREP(x) FIELD_PREP(FXLS8962AF_SC3_WAKE_ODR_MASK, (x))67#define FXLS8962AF_SC3_WAKE_ODR_GET(x) FIELD_GET(FXLS8962AF_SC3_WAKE_ODR_MASK, (x))68#define FXLS8962AF_SENS_CONFIG4 0x1869#define FXLS8962AF_SC4_INT_PP_OD_MASK BIT(1)70#define FXLS8962AF_SC4_INT_PP_OD_PREP(x) FIELD_PREP(FXLS8962AF_SC4_INT_PP_OD_MASK, (x))71#define FXLS8962AF_SC4_INT_POL_MASK BIT(0)72#define FXLS8962AF_SC4_INT_POL_PREP(x) FIELD_PREP(FXLS8962AF_SC4_INT_POL_MASK, (x))73#define FXLS8962AF_SENS_CONFIG5 0x1974 75#define FXLS8962AF_WAKE_IDLE_LSB 0x1b76#define FXLS8962AF_SLEEP_IDLE_LSB 0x1c77#define FXLS8962AF_ASLP_COUNT_LSB 0x1e78 79#define FXLS8962AF_INT_EN 0x2080#define FXLS8962AF_INT_EN_SDCD_OT_EN BIT(5)81#define FXLS8962AF_INT_EN_BUF_EN BIT(6)82#define FXLS8962AF_INT_PIN_SEL 0x2183#define FXLS8962AF_INT_PIN_SEL_MASK GENMASK(7, 0)84#define FXLS8962AF_INT_PIN_SEL_INT1 0x0085#define FXLS8962AF_INT_PIN_SEL_INT2 GENMASK(7, 0)86 87#define FXLS8962AF_OFF_X 0x2288#define FXLS8962AF_OFF_Y 0x2389#define FXLS8962AF_OFF_Z 0x2490 91#define FXLS8962AF_BUF_CONFIG1 0x2692#define FXLS8962AF_BC1_BUF_MODE_MASK GENMASK(6, 5)93#define FXLS8962AF_BC1_BUF_MODE_PREP(x) FIELD_PREP(FXLS8962AF_BC1_BUF_MODE_MASK, (x))94#define FXLS8962AF_BUF_CONFIG2 0x2795#define FXLS8962AF_BUF_CONFIG2_BUF_WMRK GENMASK(5, 0)96 97#define FXLS8962AF_ORIENT_STATUS 0x2898#define FXLS8962AF_ORIENT_CONFIG 0x2999#define FXLS8962AF_ORIENT_DBCOUNT 0x2a100#define FXLS8962AF_ORIENT_BF_ZCOMP 0x2b101#define FXLS8962AF_ORIENT_THS_REG 0x2c102 103#define FXLS8962AF_SDCD_INT_SRC1 0x2d104#define FXLS8962AF_SDCD_INT_SRC1_X_OT BIT(5)105#define FXLS8962AF_SDCD_INT_SRC1_X_POL BIT(4)106#define FXLS8962AF_SDCD_INT_SRC1_Y_OT BIT(3)107#define FXLS8962AF_SDCD_INT_SRC1_Y_POL BIT(2)108#define FXLS8962AF_SDCD_INT_SRC1_Z_OT BIT(1)109#define FXLS8962AF_SDCD_INT_SRC1_Z_POL BIT(0)110#define FXLS8962AF_SDCD_INT_SRC2 0x2e111#define FXLS8962AF_SDCD_CONFIG1 0x2f112#define FXLS8962AF_SDCD_CONFIG1_Z_OT_EN BIT(3)113#define FXLS8962AF_SDCD_CONFIG1_Y_OT_EN BIT(4)114#define FXLS8962AF_SDCD_CONFIG1_X_OT_EN BIT(5)115#define FXLS8962AF_SDCD_CONFIG1_OT_ELE BIT(7)116#define FXLS8962AF_SDCD_CONFIG2 0x30117#define FXLS8962AF_SDCD_CONFIG2_SDCD_EN BIT(7)118#define FXLS8962AF_SC2_REF_UPDM_AC GENMASK(6, 5)119#define FXLS8962AF_SDCD_OT_DBCNT 0x31120#define FXLS8962AF_SDCD_WT_DBCNT 0x32121#define FXLS8962AF_SDCD_LTHS_LSB 0x33122#define FXLS8962AF_SDCD_UTHS_LSB 0x35123 124#define FXLS8962AF_SELF_TEST_CONFIG1 0x37125#define FXLS8962AF_SELF_TEST_CONFIG2 0x38126 127#define FXLS8962AF_MAX_REG 0x38128 129#define FXLS8962AF_DEVICE_ID 0x62130#define FXLS8964AF_DEVICE_ID 0x84131 132/* Raw temp channel offset */133#define FXLS8962AF_TEMP_CENTER_VAL 25134 135#define FXLS8962AF_AUTO_SUSPEND_DELAY_MS 2000136 137#define FXLS8962AF_FIFO_LENGTH 32138#define FXLS8962AF_SCALE_TABLE_LEN 4139#define FXLS8962AF_SAMP_FREQ_TABLE_LEN 13140 141static const int fxls8962af_scale_table[FXLS8962AF_SCALE_TABLE_LEN][2] = {142 {0, IIO_G_TO_M_S_2(980000)},143 {0, IIO_G_TO_M_S_2(1950000)},144 {0, IIO_G_TO_M_S_2(3910000)},145 {0, IIO_G_TO_M_S_2(7810000)},146};147 148static const int fxls8962af_samp_freq_table[FXLS8962AF_SAMP_FREQ_TABLE_LEN][2] = {149 {3200, 0}, {1600, 0}, {800, 0}, {400, 0}, {200, 0}, {100, 0},150 {50, 0}, {25, 0}, {12, 500000}, {6, 250000}, {3, 125000},151 {1, 563000}, {0, 781000},152};153 154struct fxls8962af_chip_info {155 const char *name;156 const struct iio_chan_spec *channels;157 int num_channels;158 u8 chip_id;159};160 161struct fxls8962af_data {162 struct regmap *regmap;163 const struct fxls8962af_chip_info *chip_info;164 struct {165 __le16 channels[3];166 s64 ts __aligned(8);167 } scan;168 int64_t timestamp, old_timestamp; /* Only used in hw fifo mode. */169 struct iio_mount_matrix orientation;170 int irq;171 u8 watermark;172 u8 enable_event;173 u16 lower_thres;174 u16 upper_thres;175};176 177const struct regmap_config fxls8962af_i2c_regmap_conf = {178 .reg_bits = 8,179 .val_bits = 8,180 .max_register = FXLS8962AF_MAX_REG,181};182EXPORT_SYMBOL_NS_GPL(fxls8962af_i2c_regmap_conf, IIO_FXLS8962AF);183 184const struct regmap_config fxls8962af_spi_regmap_conf = {185 .reg_bits = 8,186 .pad_bits = 8,187 .val_bits = 8,188 .max_register = FXLS8962AF_MAX_REG,189};190EXPORT_SYMBOL_NS_GPL(fxls8962af_spi_regmap_conf, IIO_FXLS8962AF);191 192enum {193 fxls8962af_idx_x,194 fxls8962af_idx_y,195 fxls8962af_idx_z,196 fxls8962af_idx_ts,197};198 199enum fxls8962af_int_pin {200 FXLS8962AF_PIN_INT1,201 FXLS8962AF_PIN_INT2,202};203 204static int fxls8962af_power_on(struct fxls8962af_data *data)205{206 struct device *dev = regmap_get_device(data->regmap);207 int ret;208 209 ret = pm_runtime_resume_and_get(dev);210 if (ret)211 dev_err(dev, "failed to power on\n");212 213 return ret;214}215 216static int fxls8962af_power_off(struct fxls8962af_data *data)217{218 struct device *dev = regmap_get_device(data->regmap);219 int ret;220 221 pm_runtime_mark_last_busy(dev);222 ret = pm_runtime_put_autosuspend(dev);223 if (ret)224 dev_err(dev, "failed to power off\n");225 226 return ret;227}228 229static int fxls8962af_standby(struct fxls8962af_data *data)230{231 return regmap_clear_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,232 FXLS8962AF_SENS_CONFIG1_ACTIVE);233}234 235static int fxls8962af_active(struct fxls8962af_data *data)236{237 return regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,238 FXLS8962AF_SENS_CONFIG1_ACTIVE, 1);239}240 241static int fxls8962af_is_active(struct fxls8962af_data *data)242{243 unsigned int reg;244 int ret;245 246 ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG1, ®);247 if (ret)248 return ret;249 250 return reg & FXLS8962AF_SENS_CONFIG1_ACTIVE;251}252 253static int fxls8962af_get_out(struct fxls8962af_data *data,254 struct iio_chan_spec const *chan, int *val)255{256 struct device *dev = regmap_get_device(data->regmap);257 __le16 raw_val;258 int is_active;259 int ret;260 261 is_active = fxls8962af_is_active(data);262 if (!is_active) {263 ret = fxls8962af_power_on(data);264 if (ret)265 return ret;266 }267 268 ret = regmap_bulk_read(data->regmap, chan->address,269 &raw_val, sizeof(data->lower_thres));270 271 if (!is_active)272 fxls8962af_power_off(data);273 274 if (ret) {275 dev_err(dev, "failed to get out reg 0x%lx\n", chan->address);276 return ret;277 }278 279 *val = sign_extend32(le16_to_cpu(raw_val),280 chan->scan_type.realbits - 1);281 282 return IIO_VAL_INT;283}284 285static int fxls8962af_read_avail(struct iio_dev *indio_dev,286 struct iio_chan_spec const *chan,287 const int **vals, int *type, int *length,288 long mask)289{290 switch (mask) {291 case IIO_CHAN_INFO_SCALE:292 *type = IIO_VAL_INT_PLUS_NANO;293 *vals = (int *)fxls8962af_scale_table;294 *length = ARRAY_SIZE(fxls8962af_scale_table) * 2;295 return IIO_AVAIL_LIST;296 case IIO_CHAN_INFO_SAMP_FREQ:297 *type = IIO_VAL_INT_PLUS_MICRO;298 *vals = (int *)fxls8962af_samp_freq_table;299 *length = ARRAY_SIZE(fxls8962af_samp_freq_table) * 2;300 return IIO_AVAIL_LIST;301 default:302 return -EINVAL;303 }304}305 306static int fxls8962af_write_raw_get_fmt(struct iio_dev *indio_dev,307 struct iio_chan_spec const *chan,308 long mask)309{310 switch (mask) {311 case IIO_CHAN_INFO_SCALE:312 return IIO_VAL_INT_PLUS_NANO;313 case IIO_CHAN_INFO_SAMP_FREQ:314 return IIO_VAL_INT_PLUS_MICRO;315 default:316 return IIO_VAL_INT_PLUS_NANO;317 }318}319 320static int fxls8962af_update_config(struct fxls8962af_data *data, u8 reg,321 u8 mask, u8 val)322{323 int ret;324 int is_active;325 326 is_active = fxls8962af_is_active(data);327 if (is_active) {328 ret = fxls8962af_standby(data);329 if (ret)330 return ret;331 }332 333 ret = regmap_update_bits(data->regmap, reg, mask, val);334 if (ret)335 return ret;336 337 if (is_active) {338 ret = fxls8962af_active(data);339 if (ret)340 return ret;341 }342 343 return 0;344}345 346static int fxls8962af_set_full_scale(struct fxls8962af_data *data, u32 scale)347{348 int i;349 350 for (i = 0; i < ARRAY_SIZE(fxls8962af_scale_table); i++)351 if (scale == fxls8962af_scale_table[i][1])352 break;353 354 if (i == ARRAY_SIZE(fxls8962af_scale_table))355 return -EINVAL;356 357 return fxls8962af_update_config(data, FXLS8962AF_SENS_CONFIG1,358 FXLS8962AF_SC1_FSR_MASK,359 FXLS8962AF_SC1_FSR_PREP(i));360}361 362static unsigned int fxls8962af_read_full_scale(struct fxls8962af_data *data,363 int *val)364{365 int ret;366 unsigned int reg;367 u8 range_idx;368 369 ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG1, ®);370 if (ret)371 return ret;372 373 range_idx = FXLS8962AF_SC1_FSR_GET(reg);374 375 *val = fxls8962af_scale_table[range_idx][1];376 377 return IIO_VAL_INT_PLUS_NANO;378}379 380static int fxls8962af_set_samp_freq(struct fxls8962af_data *data, u32 val,381 u32 val2)382{383 int i;384 385 for (i = 0; i < ARRAY_SIZE(fxls8962af_samp_freq_table); i++)386 if (val == fxls8962af_samp_freq_table[i][0] &&387 val2 == fxls8962af_samp_freq_table[i][1])388 break;389 390 if (i == ARRAY_SIZE(fxls8962af_samp_freq_table))391 return -EINVAL;392 393 return fxls8962af_update_config(data, FXLS8962AF_SENS_CONFIG3,394 FXLS8962AF_SC3_WAKE_ODR_MASK,395 FXLS8962AF_SC3_WAKE_ODR_PREP(i));396}397 398static unsigned int fxls8962af_read_samp_freq(struct fxls8962af_data *data,399 int *val, int *val2)400{401 int ret;402 unsigned int reg;403 u8 range_idx;404 405 ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG3, ®);406 if (ret)407 return ret;408 409 range_idx = FXLS8962AF_SC3_WAKE_ODR_GET(reg);410 411 *val = fxls8962af_samp_freq_table[range_idx][0];412 *val2 = fxls8962af_samp_freq_table[range_idx][1];413 414 return IIO_VAL_INT_PLUS_MICRO;415}416 417static int fxls8962af_read_raw(struct iio_dev *indio_dev,418 struct iio_chan_spec const *chan,419 int *val, int *val2, long mask)420{421 struct fxls8962af_data *data = iio_priv(indio_dev);422 423 switch (mask) {424 case IIO_CHAN_INFO_RAW:425 switch (chan->type) {426 case IIO_TEMP:427 case IIO_ACCEL:428 return fxls8962af_get_out(data, chan, val);429 default:430 return -EINVAL;431 }432 case IIO_CHAN_INFO_OFFSET:433 if (chan->type != IIO_TEMP)434 return -EINVAL;435 436 *val = FXLS8962AF_TEMP_CENTER_VAL;437 return IIO_VAL_INT;438 case IIO_CHAN_INFO_SCALE:439 *val = 0;440 return fxls8962af_read_full_scale(data, val2);441 case IIO_CHAN_INFO_SAMP_FREQ:442 return fxls8962af_read_samp_freq(data, val, val2);443 default:444 return -EINVAL;445 }446}447 448static int fxls8962af_write_raw(struct iio_dev *indio_dev,449 struct iio_chan_spec const *chan,450 int val, int val2, long mask)451{452 struct fxls8962af_data *data = iio_priv(indio_dev);453 int ret;454 455 switch (mask) {456 case IIO_CHAN_INFO_SCALE:457 if (val != 0)458 return -EINVAL;459 460 ret = iio_device_claim_direct_mode(indio_dev);461 if (ret)462 return ret;463 464 ret = fxls8962af_set_full_scale(data, val2);465 466 iio_device_release_direct_mode(indio_dev);467 return ret;468 case IIO_CHAN_INFO_SAMP_FREQ:469 ret = iio_device_claim_direct_mode(indio_dev);470 if (ret)471 return ret;472 473 ret = fxls8962af_set_samp_freq(data, val, val2);474 475 iio_device_release_direct_mode(indio_dev);476 return ret;477 default:478 return -EINVAL;479 }480}481 482static int fxls8962af_event_setup(struct fxls8962af_data *data, int state)483{484 /* Enable wakeup interrupt */485 int mask = FXLS8962AF_INT_EN_SDCD_OT_EN;486 int value = state ? mask : 0;487 488 return regmap_update_bits(data->regmap, FXLS8962AF_INT_EN, mask, value);489}490 491static int fxls8962af_set_watermark(struct iio_dev *indio_dev, unsigned val)492{493 struct fxls8962af_data *data = iio_priv(indio_dev);494 495 if (val > FXLS8962AF_FIFO_LENGTH)496 val = FXLS8962AF_FIFO_LENGTH;497 498 data->watermark = val;499 500 return 0;501}502 503static int __fxls8962af_set_thresholds(struct fxls8962af_data *data,504 const struct iio_chan_spec *chan,505 enum iio_event_direction dir,506 int val)507{508 switch (dir) {509 case IIO_EV_DIR_FALLING:510 data->lower_thres = val;511 return regmap_bulk_write(data->regmap, FXLS8962AF_SDCD_LTHS_LSB,512 &data->lower_thres, sizeof(data->lower_thres));513 case IIO_EV_DIR_RISING:514 data->upper_thres = val;515 return regmap_bulk_write(data->regmap, FXLS8962AF_SDCD_UTHS_LSB,516 &data->upper_thres, sizeof(data->upper_thres));517 default:518 return -EINVAL;519 }520}521 522static int fxls8962af_read_event(struct iio_dev *indio_dev,523 const struct iio_chan_spec *chan,524 enum iio_event_type type,525 enum iio_event_direction dir,526 enum iio_event_info info,527 int *val, int *val2)528{529 struct fxls8962af_data *data = iio_priv(indio_dev);530 int ret;531 532 if (type != IIO_EV_TYPE_THRESH)533 return -EINVAL;534 535 switch (dir) {536 case IIO_EV_DIR_FALLING:537 ret = regmap_bulk_read(data->regmap, FXLS8962AF_SDCD_LTHS_LSB,538 &data->lower_thres, sizeof(data->lower_thres));539 if (ret)540 return ret;541 542 *val = sign_extend32(data->lower_thres, chan->scan_type.realbits - 1);543 return IIO_VAL_INT;544 case IIO_EV_DIR_RISING:545 ret = regmap_bulk_read(data->regmap, FXLS8962AF_SDCD_UTHS_LSB,546 &data->upper_thres, sizeof(data->upper_thres));547 if (ret)548 return ret;549 550 *val = sign_extend32(data->upper_thres, chan->scan_type.realbits - 1);551 return IIO_VAL_INT;552 default:553 return -EINVAL;554 }555}556 557static int fxls8962af_write_event(struct iio_dev *indio_dev,558 const struct iio_chan_spec *chan,559 enum iio_event_type type,560 enum iio_event_direction dir,561 enum iio_event_info info,562 int val, int val2)563{564 struct fxls8962af_data *data = iio_priv(indio_dev);565 int ret, val_masked;566 567 if (type != IIO_EV_TYPE_THRESH)568 return -EINVAL;569 570 if (val < -2048 || val > 2047)571 return -EINVAL;572 573 if (data->enable_event)574 return -EBUSY;575 576 val_masked = val & GENMASK(11, 0);577 if (fxls8962af_is_active(data)) {578 ret = fxls8962af_standby(data);579 if (ret)580 return ret;581 582 ret = __fxls8962af_set_thresholds(data, chan, dir, val_masked);583 if (ret)584 return ret;585 586 return fxls8962af_active(data);587 } else {588 return __fxls8962af_set_thresholds(data, chan, dir, val_masked);589 }590}591 592static int593fxls8962af_read_event_config(struct iio_dev *indio_dev,594 const struct iio_chan_spec *chan,595 enum iio_event_type type,596 enum iio_event_direction dir)597{598 struct fxls8962af_data *data = iio_priv(indio_dev);599 600 if (type != IIO_EV_TYPE_THRESH)601 return -EINVAL;602 603 switch (chan->channel2) {604 case IIO_MOD_X:605 return !!(FXLS8962AF_SDCD_CONFIG1_X_OT_EN & data->enable_event);606 case IIO_MOD_Y:607 return !!(FXLS8962AF_SDCD_CONFIG1_Y_OT_EN & data->enable_event);608 case IIO_MOD_Z:609 return !!(FXLS8962AF_SDCD_CONFIG1_Z_OT_EN & data->enable_event);610 default:611 return -EINVAL;612 }613}614 615static int616fxls8962af_write_event_config(struct iio_dev *indio_dev,617 const struct iio_chan_spec *chan,618 enum iio_event_type type,619 enum iio_event_direction dir, int state)620{621 struct fxls8962af_data *data = iio_priv(indio_dev);622 u8 enable_event, enable_bits;623 int ret, value;624 625 if (type != IIO_EV_TYPE_THRESH)626 return -EINVAL;627 628 switch (chan->channel2) {629 case IIO_MOD_X:630 enable_bits = FXLS8962AF_SDCD_CONFIG1_X_OT_EN;631 break;632 case IIO_MOD_Y:633 enable_bits = FXLS8962AF_SDCD_CONFIG1_Y_OT_EN;634 break;635 case IIO_MOD_Z:636 enable_bits = FXLS8962AF_SDCD_CONFIG1_Z_OT_EN;637 break;638 default:639 return -EINVAL;640 }641 642 if (state)643 enable_event = data->enable_event | enable_bits;644 else645 enable_event = data->enable_event & ~enable_bits;646 647 if (data->enable_event == enable_event)648 return 0;649 650 ret = fxls8962af_standby(data);651 if (ret)652 return ret;653 654 /* Enable events */655 value = enable_event | FXLS8962AF_SDCD_CONFIG1_OT_ELE;656 ret = regmap_write(data->regmap, FXLS8962AF_SDCD_CONFIG1, value);657 if (ret)658 return ret;659 660 /*661 * Enable update of SDCD_REF_X/Y/Z values with the current decimated and662 * trimmed X/Y/Z acceleration input data. This allows for acceleration663 * slope detection with Data(n) to Data(n–1) always used as the input664 * to the window comparator.665 */666 value = enable_event ?667 FXLS8962AF_SDCD_CONFIG2_SDCD_EN | FXLS8962AF_SC2_REF_UPDM_AC :668 0x00;669 ret = regmap_write(data->regmap, FXLS8962AF_SDCD_CONFIG2, value);670 if (ret)671 return ret;672 673 ret = fxls8962af_event_setup(data, state);674 if (ret)675 return ret;676 677 data->enable_event = enable_event;678 679 if (data->enable_event) {680 fxls8962af_active(data);681 ret = fxls8962af_power_on(data);682 } else {683 ret = iio_device_claim_direct_mode(indio_dev);684 if (ret)685 return ret;686 687 /* Not in buffered mode so disable power */688 ret = fxls8962af_power_off(data);689 690 iio_device_release_direct_mode(indio_dev);691 }692 693 return ret;694}695 696static const struct iio_event_spec fxls8962af_event[] = {697 {698 .type = IIO_EV_TYPE_THRESH,699 .dir = IIO_EV_DIR_EITHER,700 .mask_separate = BIT(IIO_EV_INFO_ENABLE),701 },702 {703 .type = IIO_EV_TYPE_THRESH,704 .dir = IIO_EV_DIR_FALLING,705 .mask_separate = BIT(IIO_EV_INFO_VALUE),706 },707 {708 .type = IIO_EV_TYPE_THRESH,709 .dir = IIO_EV_DIR_RISING,710 .mask_separate = BIT(IIO_EV_INFO_VALUE),711 },712};713 714#define FXLS8962AF_CHANNEL(axis, reg, idx) { \715 .type = IIO_ACCEL, \716 .address = reg, \717 .modified = 1, \718 .channel2 = IIO_MOD_##axis, \719 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \720 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \721 BIT(IIO_CHAN_INFO_SAMP_FREQ), \722 .info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE) | \723 BIT(IIO_CHAN_INFO_SAMP_FREQ), \724 .scan_index = idx, \725 .scan_type = { \726 .sign = 's', \727 .realbits = 12, \728 .storagebits = 16, \729 .endianness = IIO_LE, \730 }, \731 .event_spec = fxls8962af_event, \732 .num_event_specs = ARRAY_SIZE(fxls8962af_event), \733}734 735#define FXLS8962AF_TEMP_CHANNEL { \736 .type = IIO_TEMP, \737 .address = FXLS8962AF_TEMP_OUT, \738 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \739 BIT(IIO_CHAN_INFO_OFFSET),\740 .scan_index = -1, \741 .scan_type = { \742 .realbits = 8, \743 .storagebits = 8, \744 }, \745}746 747static const struct iio_chan_spec fxls8962af_channels[] = {748 FXLS8962AF_CHANNEL(X, FXLS8962AF_OUT_X_LSB, fxls8962af_idx_x),749 FXLS8962AF_CHANNEL(Y, FXLS8962AF_OUT_Y_LSB, fxls8962af_idx_y),750 FXLS8962AF_CHANNEL(Z, FXLS8962AF_OUT_Z_LSB, fxls8962af_idx_z),751 IIO_CHAN_SOFT_TIMESTAMP(fxls8962af_idx_ts),752 FXLS8962AF_TEMP_CHANNEL,753};754 755static const struct fxls8962af_chip_info fxls_chip_info_table[] = {756 [fxls8962af] = {757 .chip_id = FXLS8962AF_DEVICE_ID,758 .name = "fxls8962af",759 .channels = fxls8962af_channels,760 .num_channels = ARRAY_SIZE(fxls8962af_channels),761 },762 [fxls8964af] = {763 .chip_id = FXLS8964AF_DEVICE_ID,764 .name = "fxls8964af",765 .channels = fxls8962af_channels,766 .num_channels = ARRAY_SIZE(fxls8962af_channels),767 },768};769 770static const struct iio_info fxls8962af_info = {771 .read_raw = &fxls8962af_read_raw,772 .write_raw = &fxls8962af_write_raw,773 .write_raw_get_fmt = fxls8962af_write_raw_get_fmt,774 .read_event_value = fxls8962af_read_event,775 .write_event_value = fxls8962af_write_event,776 .read_event_config = fxls8962af_read_event_config,777 .write_event_config = fxls8962af_write_event_config,778 .read_avail = fxls8962af_read_avail,779 .hwfifo_set_watermark = fxls8962af_set_watermark,780};781 782static int fxls8962af_reset(struct fxls8962af_data *data)783{784 struct device *dev = regmap_get_device(data->regmap);785 unsigned int reg;786 int ret;787 788 ret = regmap_set_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,789 FXLS8962AF_SENS_CONFIG1_RST);790 if (ret)791 return ret;792 793 /* TBOOT1, TBOOT2, specifies we have to wait between 1 - 17.7ms */794 ret = regmap_read_poll_timeout(data->regmap, FXLS8962AF_INT_STATUS, reg,795 (reg & FXLS8962AF_INT_STATUS_SRC_BOOT),796 1000, 18000);797 if (ret == -ETIMEDOUT)798 dev_err(dev, "reset timeout, int_status = 0x%x\n", reg);799 800 return ret;801}802 803static int __fxls8962af_fifo_set_mode(struct fxls8962af_data *data, bool onoff)804{805 int ret;806 807 /* Enable watermark at max fifo size */808 ret = regmap_update_bits(data->regmap, FXLS8962AF_BUF_CONFIG2,809 FXLS8962AF_BUF_CONFIG2_BUF_WMRK,810 data->watermark);811 if (ret)812 return ret;813 814 return regmap_update_bits(data->regmap, FXLS8962AF_BUF_CONFIG1,815 FXLS8962AF_BC1_BUF_MODE_MASK,816 FXLS8962AF_BC1_BUF_MODE_PREP(onoff));817}818 819static int fxls8962af_buffer_preenable(struct iio_dev *indio_dev)820{821 return fxls8962af_power_on(iio_priv(indio_dev));822}823 824static int fxls8962af_buffer_postenable(struct iio_dev *indio_dev)825{826 struct fxls8962af_data *data = iio_priv(indio_dev);827 int ret;828 829 fxls8962af_standby(data);830 831 /* Enable buffer interrupt */832 ret = regmap_set_bits(data->regmap, FXLS8962AF_INT_EN,833 FXLS8962AF_INT_EN_BUF_EN);834 if (ret)835 return ret;836 837 ret = __fxls8962af_fifo_set_mode(data, true);838 839 fxls8962af_active(data);840 841 return ret;842}843 844static int fxls8962af_buffer_predisable(struct iio_dev *indio_dev)845{846 struct fxls8962af_data *data = iio_priv(indio_dev);847 int ret;848 849 fxls8962af_standby(data);850 851 /* Disable buffer interrupt */852 ret = regmap_clear_bits(data->regmap, FXLS8962AF_INT_EN,853 FXLS8962AF_INT_EN_BUF_EN);854 if (ret)855 return ret;856 857 ret = __fxls8962af_fifo_set_mode(data, false);858 859 if (data->enable_event)860 fxls8962af_active(data);861 862 return ret;863}864 865static int fxls8962af_buffer_postdisable(struct iio_dev *indio_dev)866{867 struct fxls8962af_data *data = iio_priv(indio_dev);868 869 if (!data->enable_event)870 fxls8962af_power_off(data);871 872 return 0;873}874 875static const struct iio_buffer_setup_ops fxls8962af_buffer_ops = {876 .preenable = fxls8962af_buffer_preenable,877 .postenable = fxls8962af_buffer_postenable,878 .predisable = fxls8962af_buffer_predisable,879 .postdisable = fxls8962af_buffer_postdisable,880};881 882static int fxls8962af_i2c_raw_read_errata3(struct fxls8962af_data *data,883 u16 *buffer, int samples,884 int sample_length)885{886 int i, ret;887 888 for (i = 0; i < samples; i++) {889 ret = regmap_raw_read(data->regmap, FXLS8962AF_BUF_X_LSB,890 &buffer[i * 3], sample_length);891 if (ret)892 return ret;893 }894 895 return 0;896}897 898static int fxls8962af_fifo_transfer(struct fxls8962af_data *data,899 u16 *buffer, int samples)900{901 struct device *dev = regmap_get_device(data->regmap);902 int sample_length = 3 * sizeof(*buffer);903 int total_length = samples * sample_length;904 int ret;905 906 if (i2c_verify_client(dev) &&907 data->chip_info->chip_id == FXLS8962AF_DEVICE_ID)908 /*909 * Due to errata bug (only applicable on fxls8962af):910 * E3: FIFO burst read operation error using I2C interface911 * We have to avoid burst reads on I2C..912 */913 ret = fxls8962af_i2c_raw_read_errata3(data, buffer, samples,914 sample_length);915 else916 ret = regmap_raw_read(data->regmap, FXLS8962AF_BUF_X_LSB, buffer,917 total_length);918 919 if (ret)920 dev_err(dev, "Error transferring data from fifo: %d\n", ret);921 922 return ret;923}924 925static int fxls8962af_fifo_flush(struct iio_dev *indio_dev)926{927 struct fxls8962af_data *data = iio_priv(indio_dev);928 struct device *dev = regmap_get_device(data->regmap);929 u16 buffer[FXLS8962AF_FIFO_LENGTH * 3];930 uint64_t sample_period;931 unsigned int reg;932 int64_t tstamp;933 int ret, i;934 u8 count;935 936 ret = regmap_read(data->regmap, FXLS8962AF_BUF_STATUS, ®);937 if (ret)938 return ret;939 940 if (reg & FXLS8962AF_BUF_STATUS_BUF_OVF) {941 dev_err(dev, "Buffer overflow");942 return -EOVERFLOW;943 }944 945 count = reg & FXLS8962AF_BUF_STATUS_BUF_CNT;946 if (!count)947 return 0;948 949 data->old_timestamp = data->timestamp;950 data->timestamp = iio_get_time_ns(indio_dev);951 952 /*953 * Approximate timestamps for each of the sample based on the sampling,954 * frequency, timestamp for last sample and number of samples.955 */956 sample_period = (data->timestamp - data->old_timestamp);957 do_div(sample_period, count);958 tstamp = data->timestamp - (count - 1) * sample_period;959 960 ret = fxls8962af_fifo_transfer(data, buffer, count);961 if (ret)962 return ret;963 964 /* Demux hw FIFO into kfifo. */965 for (i = 0; i < count; i++) {966 int j, bit;967 968 j = 0;969 iio_for_each_active_channel(indio_dev, bit) {970 memcpy(&data->scan.channels[j++], &buffer[i * 3 + bit],971 sizeof(data->scan.channels[0]));972 }973 974 iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,975 tstamp);976 977 tstamp += sample_period;978 }979 980 return count;981}982 983static int fxls8962af_event_interrupt(struct iio_dev *indio_dev)984{985 struct fxls8962af_data *data = iio_priv(indio_dev);986 s64 ts = iio_get_time_ns(indio_dev);987 unsigned int reg;988 u64 ev_code;989 int ret;990 991 ret = regmap_read(data->regmap, FXLS8962AF_SDCD_INT_SRC1, ®);992 if (ret)993 return ret;994 995 if (reg & FXLS8962AF_SDCD_INT_SRC1_X_OT) {996 ev_code = reg & FXLS8962AF_SDCD_INT_SRC1_X_POL ?997 IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;998 iio_push_event(indio_dev,999 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,1000 IIO_EV_TYPE_THRESH, ev_code), ts);1001 }1002 1003 if (reg & FXLS8962AF_SDCD_INT_SRC1_Y_OT) {1004 ev_code = reg & FXLS8962AF_SDCD_INT_SRC1_Y_POL ?1005 IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;1006 iio_push_event(indio_dev,1007 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,1008 IIO_EV_TYPE_THRESH, ev_code), ts);1009 }1010 1011 if (reg & FXLS8962AF_SDCD_INT_SRC1_Z_OT) {1012 ev_code = reg & FXLS8962AF_SDCD_INT_SRC1_Z_POL ?1013 IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;1014 iio_push_event(indio_dev,1015 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,1016 IIO_EV_TYPE_THRESH, ev_code), ts);1017 }1018 1019 return 0;1020}1021 1022static irqreturn_t fxls8962af_interrupt(int irq, void *p)1023{1024 struct iio_dev *indio_dev = p;1025 struct fxls8962af_data *data = iio_priv(indio_dev);1026 unsigned int reg;1027 int ret;1028 1029 ret = regmap_read(data->regmap, FXLS8962AF_INT_STATUS, ®);1030 if (ret)1031 return IRQ_NONE;1032 1033 if (reg & FXLS8962AF_INT_STATUS_SRC_BUF) {1034 ret = fxls8962af_fifo_flush(indio_dev);1035 if (ret < 0)1036 return IRQ_NONE;1037 1038 return IRQ_HANDLED;1039 }1040 1041 if (reg & FXLS8962AF_INT_STATUS_SRC_SDCD_OT) {1042 ret = fxls8962af_event_interrupt(indio_dev);1043 if (ret < 0)1044 return IRQ_NONE;1045 1046 return IRQ_HANDLED;1047 }1048 1049 return IRQ_NONE;1050}1051 1052static void fxls8962af_pm_disable(void *dev_ptr)1053{1054 struct device *dev = dev_ptr;1055 struct iio_dev *indio_dev = dev_get_drvdata(dev);1056 1057 pm_runtime_disable(dev);1058 pm_runtime_set_suspended(dev);1059 pm_runtime_put_noidle(dev);1060 1061 fxls8962af_standby(iio_priv(indio_dev));1062}1063 1064static void fxls8962af_get_irq(struct device *dev,1065 enum fxls8962af_int_pin *pin)1066{1067 int irq;1068 1069 irq = fwnode_irq_get_byname(dev_fwnode(dev), "INT2");1070 if (irq > 0) {1071 *pin = FXLS8962AF_PIN_INT2;1072 return;1073 }1074 1075 *pin = FXLS8962AF_PIN_INT1;1076}1077 1078static int fxls8962af_irq_setup(struct iio_dev *indio_dev, int irq)1079{1080 struct fxls8962af_data *data = iio_priv(indio_dev);1081 struct device *dev = regmap_get_device(data->regmap);1082 unsigned long irq_type;1083 bool irq_active_high;1084 enum fxls8962af_int_pin int_pin;1085 u8 int_pin_sel;1086 int ret;1087 1088 fxls8962af_get_irq(dev, &int_pin);1089 switch (int_pin) {1090 case FXLS8962AF_PIN_INT1:1091 int_pin_sel = FXLS8962AF_INT_PIN_SEL_INT1;1092 break;1093 case FXLS8962AF_PIN_INT2:1094 int_pin_sel = FXLS8962AF_INT_PIN_SEL_INT2;1095 break;1096 default:1097 dev_err(dev, "unsupported int pin selected\n");1098 return -EINVAL;1099 }1100 1101 ret = regmap_update_bits(data->regmap, FXLS8962AF_INT_PIN_SEL,1102 FXLS8962AF_INT_PIN_SEL_MASK, int_pin_sel);1103 if (ret)1104 return ret;1105 1106 irq_type = irqd_get_trigger_type(irq_get_irq_data(irq));1107 1108 switch (irq_type) {1109 case IRQF_TRIGGER_HIGH:1110 case IRQF_TRIGGER_RISING:1111 irq_active_high = true;1112 break;1113 case IRQF_TRIGGER_LOW:1114 case IRQF_TRIGGER_FALLING:1115 irq_active_high = false;1116 break;1117 default:1118 dev_info(dev, "mode %lx unsupported\n", irq_type);1119 return -EINVAL;1120 }1121 1122 ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG4,1123 FXLS8962AF_SC4_INT_POL_MASK,1124 FXLS8962AF_SC4_INT_POL_PREP(irq_active_high));1125 if (ret)1126 return ret;1127 1128 if (device_property_read_bool(dev, "drive-open-drain")) {1129 ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG4,1130 FXLS8962AF_SC4_INT_PP_OD_MASK,1131 FXLS8962AF_SC4_INT_PP_OD_PREP(1));1132 if (ret)1133 return ret;1134 1135 irq_type |= IRQF_SHARED;1136 }1137 1138 return devm_request_threaded_irq(dev,1139 irq,1140 NULL, fxls8962af_interrupt,1141 irq_type | IRQF_ONESHOT,1142 indio_dev->name, indio_dev);1143}1144 1145int fxls8962af_core_probe(struct device *dev, struct regmap *regmap, int irq)1146{1147 struct fxls8962af_data *data;1148 struct iio_dev *indio_dev;1149 unsigned int reg;1150 int ret, i;1151 1152 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));1153 if (!indio_dev)1154 return -ENOMEM;1155 1156 data = iio_priv(indio_dev);1157 dev_set_drvdata(dev, indio_dev);1158 data->regmap = regmap;1159 data->irq = irq;1160 1161 ret = iio_read_mount_matrix(dev, &data->orientation);1162 if (ret)1163 return ret;1164 1165 ret = devm_regulator_get_enable(dev, "vdd");1166 if (ret)1167 return dev_err_probe(dev, ret,1168 "Failed to get vdd regulator\n");1169 1170 ret = regmap_read(data->regmap, FXLS8962AF_WHO_AM_I, ®);1171 if (ret)1172 return ret;1173 1174 for (i = 0; i < ARRAY_SIZE(fxls_chip_info_table); i++) {1175 if (fxls_chip_info_table[i].chip_id == reg) {1176 data->chip_info = &fxls_chip_info_table[i];1177 break;1178 }1179 }1180 if (i == ARRAY_SIZE(fxls_chip_info_table)) {1181 dev_err(dev, "failed to match device in table\n");1182 return -ENXIO;1183 }1184 1185 indio_dev->channels = data->chip_info->channels;1186 indio_dev->num_channels = data->chip_info->num_channels;1187 indio_dev->name = data->chip_info->name;1188 indio_dev->info = &fxls8962af_info;1189 indio_dev->modes = INDIO_DIRECT_MODE;1190 1191 ret = fxls8962af_reset(data);1192 if (ret)1193 return ret;1194 1195 if (irq) {1196 ret = fxls8962af_irq_setup(indio_dev, irq);1197 if (ret)1198 return ret;1199 1200 ret = devm_iio_kfifo_buffer_setup(dev, indio_dev,1201 &fxls8962af_buffer_ops);1202 if (ret)1203 return ret;1204 }1205 1206 ret = pm_runtime_set_active(dev);1207 if (ret)1208 return ret;1209 1210 pm_runtime_enable(dev);1211 pm_runtime_set_autosuspend_delay(dev, FXLS8962AF_AUTO_SUSPEND_DELAY_MS);1212 pm_runtime_use_autosuspend(dev);1213 1214 ret = devm_add_action_or_reset(dev, fxls8962af_pm_disable, dev);1215 if (ret)1216 return ret;1217 1218 if (device_property_read_bool(dev, "wakeup-source"))1219 device_init_wakeup(dev, true);1220 1221 return devm_iio_device_register(dev, indio_dev);1222}1223EXPORT_SYMBOL_NS_GPL(fxls8962af_core_probe, IIO_FXLS8962AF);1224 1225static int fxls8962af_runtime_suspend(struct device *dev)1226{1227 struct fxls8962af_data *data = iio_priv(dev_get_drvdata(dev));1228 int ret;1229 1230 ret = fxls8962af_standby(data);1231 if (ret) {1232 dev_err(dev, "powering off device failed\n");1233 return ret;1234 }1235 1236 return 0;1237}1238 1239static int fxls8962af_runtime_resume(struct device *dev)1240{1241 struct fxls8962af_data *data = iio_priv(dev_get_drvdata(dev));1242 1243 return fxls8962af_active(data);1244}1245 1246static int fxls8962af_suspend(struct device *dev)1247{1248 struct iio_dev *indio_dev = dev_get_drvdata(dev);1249 struct fxls8962af_data *data = iio_priv(indio_dev);1250 1251 if (device_may_wakeup(dev) && data->enable_event) {1252 enable_irq_wake(data->irq);1253 1254 /*1255 * Disable buffer, as the buffer is so small the device will wake1256 * almost immediately.1257 */1258 if (iio_buffer_enabled(indio_dev))1259 fxls8962af_buffer_predisable(indio_dev);1260 } else {1261 fxls8962af_runtime_suspend(dev);1262 }1263 1264 return 0;1265}1266 1267static int fxls8962af_resume(struct device *dev)1268{1269 struct iio_dev *indio_dev = dev_get_drvdata(dev);1270 struct fxls8962af_data *data = iio_priv(indio_dev);1271 1272 if (device_may_wakeup(dev) && data->enable_event) {1273 disable_irq_wake(data->irq);1274 1275 if (iio_buffer_enabled(indio_dev))1276 fxls8962af_buffer_postenable(indio_dev);1277 } else {1278 fxls8962af_runtime_resume(dev);1279 }1280 1281 return 0;1282}1283 1284EXPORT_NS_GPL_DEV_PM_OPS(fxls8962af_pm_ops, IIO_FXLS8962AF) = {1285 SYSTEM_SLEEP_PM_OPS(fxls8962af_suspend, fxls8962af_resume)1286 RUNTIME_PM_OPS(fxls8962af_runtime_suspend, fxls8962af_runtime_resume, NULL)1287};1288 1289MODULE_AUTHOR("Sean Nyekjaer <sean@geanix.com>");1290MODULE_DESCRIPTION("NXP FXLS8962AF/FXLS8964AF accelerometer driver");1291MODULE_LICENSE("GPL v2");1292