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1/* SPDX-License-Identifier: GPL-2.0-or-later */2/*3 * Copyright (C) 2022 ROHM Semiconductors4 *5 * ROHM/KIONIX KX022A accelerometer driver6 */7 8#ifndef _KX022A_H_9#define _KX022A_H_10 11#include <linux/bits.h>12#include <linux/regmap.h>13 14#define KX022A_REG_WHO 0x0f15#define KX022A_ID 0xc816#define KX132ACR_LBZ_ID 0xd817 18#define KX022A_REG_CNTL2 0x1919#define KX022A_MASK_SRST BIT(7)20#define KX022A_REG_CNTL 0x1821#define KX022A_MASK_PC1 BIT(7)22#define KX022A_MASK_RES BIT(6)23#define KX022A_MASK_DRDY BIT(5)24#define KX022A_MASK_GSEL GENMASK(4, 3)25#define KX022A_GSEL_SHIFT 326#define KX022A_GSEL_2 0x027#define KX022A_GSEL_4 BIT(3)28#define KX022A_GSEL_8 BIT(4)29#define KX022A_GSEL_16 GENMASK(4, 3)30 31#define KX022A_REG_INS2 0x1332#define KX022A_MASK_INS2_DRDY BIT(4)33#define KX122_MASK_INS2_WMI BIT(5)34 35#define KX022A_REG_XHP_L 0x036#define KX022A_REG_XOUT_L 0x0637#define KX022A_REG_YOUT_L 0x0838#define KX022A_REG_ZOUT_L 0x0a39#define KX022A_REG_COTR 0x0c40#define KX022A_REG_TSCP 0x1041#define KX022A_REG_INT_REL 0x1742 43#define KX022A_REG_ODCNTL 0x1b44 45#define KX022A_REG_BTS_WUF_TH 0x3146#define KX022A_REG_MAN_WAKE 0x2c47 48#define KX022A_REG_BUF_CNTL1 0x3a49#define KX022A_MASK_WM_TH GENMASK(6, 0)50#define KX022A_REG_BUF_CNTL2 0x3b51#define KX022A_MASK_BUF_EN BIT(7)52#define KX022A_MASK_BRES16 BIT(6)53#define KX022A_REG_BUF_STATUS_1 0x3c54#define KX022A_REG_BUF_STATUS_2 0x3d55#define KX022A_REG_BUF_CLEAR 0x3e56#define KX022A_REG_BUF_READ 0x3f57#define KX022A_MASK_ODR GENMASK(3, 0)58#define KX022A_ODR_SHIFT 359#define KX022A_FIFO_MAX_WMI_TH 4160 61#define KX022A_REG_INC1 0x1c62#define KX022A_REG_INC5 0x2063#define KX022A_REG_INC6 0x2164#define KX022A_MASK_IEN BIT(5)65#define KX022A_MASK_IPOL BIT(4)66#define KX022A_IPOL_LOW 067#define KX022A_IPOL_HIGH KX022A_MASK_IPOL168#define KX022A_MASK_ITYP BIT(3)69#define KX022A_ITYP_PULSE KX022A_MASK_ITYP70#define KX022A_ITYP_LEVEL 071 72#define KX022A_REG_INC4 0x1f73#define KX022A_MASK_WMI BIT(5)74 75#define KX022A_REG_SELF_TEST 0x6076#define KX022A_MAX_REGISTER 0x6077 78#define KX132_REG_WHO 0x1379#define KX132_ID 0x3d80 81#define KX132_FIFO_LENGTH 8682 83#define KX132_REG_CNTL 0x1b84#define KX132_REG_CNTL2 0x1c85#define KX132_REG_CNTL5 0x1f86#define KX132_MASK_RES BIT(6)87#define KX132_GSEL_2 0x088#define KX132_GSEL_4 BIT(3)89#define KX132_GSEL_8 BIT(4)90#define KX132_GSEL_16 GENMASK(4, 3)91 92#define KX132_REG_INS2 0x1793#define KX132_MASK_INS2_WMI BIT(5)94 95#define KX132_REG_XADP_L 0x0296#define KX132_REG_XOUT_L 0x0897#define KX132_REG_YOUT_L 0x0a98#define KX132_REG_ZOUT_L 0x0c99#define KX132_REG_COTR 0x12100#define KX132_REG_TSCP 0x14101#define KX132_REG_INT_REL 0x1a102 103#define KX132_REG_ODCNTL 0x21104 105#define KX132_REG_BTS_WUF_TH 0x4a106 107#define KX132_REG_BUF_CNTL1 0x5e108#define KX132_REG_BUF_CNTL2 0x5f109#define KX132_REG_BUF_STATUS_1 0x60110#define KX132_REG_BUF_STATUS_2 0x61111#define KX132_MASK_BUF_SMP_LVL GENMASK(9, 0)112#define KX132_REG_BUF_CLEAR 0x62113#define KX132_REG_BUF_READ 0x63114#define KX132_ODR_SHIFT 3115#define KX132_FIFO_MAX_WMI_TH 86116 117#define KX132_REG_INC1 0x22118#define KX132_REG_INC5 0x26119#define KX132_REG_INC6 0x27120#define KX132_IPOL_LOW 0121#define KX132_IPOL_HIGH KX022A_MASK_IPOL122#define KX132_ITYP_PULSE KX022A_MASK_ITYP123 124#define KX132_REG_INC4 0x25125 126#define KX132_REG_SELF_TEST 0x5d127#define KX132_MAX_REGISTER 0x76128 129struct device;130 131struct kx022a_data;132 133/**134 * struct kx022a_chip_info - Kionix accelerometer chip specific information135 *136 * @name: name of the device137 * @regmap_config: pointer to register map configuration138 * @channels: pointer to iio_chan_spec array139 * @num_channels: number of iio_chan_spec channels140 * @fifo_length: number of 16-bit samples in a full buffer141 * @buf_smp_lvl_mask: buffer sample level mask142 * @who: WHO_AM_I register143 * @id: WHO_AM_I register value144 * @cntl: control register 1145 * @cntl2: control register 2146 * @odcntl: output data control register147 * @buf_cntl1: buffer control register 1148 * @buf_cntl2: buffer control register 2149 * @buf_clear: buffer clear register150 * @buf_status1: buffer status register 1151 * @buf_read: buffer read register152 * @inc1: interrupt control register 1153 * @inc4: interrupt control register 4154 * @inc5: interrupt control register 5155 * @inc6: interrupt control register 6156 * @xout_l: x-axis output least significant byte157 * @get_fifo_bytes_available: function pointer to get amount of acceleration158 * data bytes currently stored in the sensor's FIFO159 * buffer160 */161struct kx022a_chip_info {162 const char *name;163 const struct regmap_config *regmap_config;164 const struct iio_chan_spec *channels;165 unsigned int num_channels;166 unsigned int fifo_length;167 u16 buf_smp_lvl_mask;168 u8 who;169 u8 id;170 u8 cntl;171 u8 cntl2;172 u8 odcntl;173 u8 buf_cntl1;174 u8 buf_cntl2;175 u8 buf_clear;176 u8 buf_status1;177 u8 buf_read;178 u8 inc1;179 u8 inc4;180 u8 inc5;181 u8 inc6;182 u8 xout_l;183 int (*get_fifo_bytes_available)(struct kx022a_data *);184};185 186int kx022a_probe_internal(struct device *dev, const struct kx022a_chip_info *chip_info);187 188extern const struct kx022a_chip_info kx022a_chip_info;189extern const struct kx022a_chip_info kx132_chip_info;190extern const struct kx022a_chip_info kx132acr_chip_info;191 192#endif193