1304 lines · c
1// SPDX-License-Identifier: GPL-2.02/*3 * MEMSensing digital 3-Axis accelerometer4 *5 * MSA311 is a tri-axial, low-g accelerometer with I2C digital output for6 * sensitivity consumer applications. It has dynamic user-selectable full7 * scales range of +-2g/+-4g/+-8g/+-16g and allows acceleration measurements8 * with output data rates from 1Hz to 1000Hz.9 *10 * MSA311 is available in an ultra small (2mm x 2mm, height 0.95mm) LGA package11 * and is guaranteed to operate over -40C to +85C.12 *13 * This driver supports following MSA311 features:14 * - IIO interface15 * - Different power modes: NORMAL, SUSPEND16 * - ODR (Output Data Rate) selection17 * - Scale selection18 * - IIO triggered buffer19 * - NEW_DATA interrupt + trigger20 *21 * Below features to be done:22 * - Motion Events: ACTIVE, TAP, ORIENT, FREEFALL23 * - Low Power mode24 *25 * Copyright (c) 2022, SberDevices. All Rights Reserved.26 *27 * Author: Dmitry Rokosov <ddrokosov@sberdevices.ru>28 */29 30#include <linux/i2c.h>31#include <linux/mod_devicetable.h>32#include <linux/module.h>33#include <linux/pm.h>34#include <linux/pm_runtime.h>35#include <linux/regmap.h>36#include <linux/string_choices.h>37#include <linux/units.h>38 39#include <linux/iio/buffer.h>40#include <linux/iio/iio.h>41#include <linux/iio/sysfs.h>42#include <linux/iio/trigger.h>43#include <linux/iio/trigger_consumer.h>44#include <linux/iio/triggered_buffer.h>45 46#define MSA311_SOFT_RESET_REG 0x0047#define MSA311_PARTID_REG 0x0148#define MSA311_ACC_X_REG 0x0249#define MSA311_ACC_Y_REG 0x0450#define MSA311_ACC_Z_REG 0x0651#define MSA311_MOTION_INT_REG 0x0952#define MSA311_DATA_INT_REG 0x0A53#define MSA311_TAP_ACTIVE_STS_REG 0x0B54#define MSA311_ORIENT_STS_REG 0x0C55#define MSA311_RANGE_REG 0x0F56#define MSA311_ODR_REG 0x1057#define MSA311_PWR_MODE_REG 0x1158#define MSA311_SWAP_POLARITY_REG 0x1259#define MSA311_INT_SET_0_REG 0x1660#define MSA311_INT_SET_1_REG 0x1761#define MSA311_INT_MAP_0_REG 0x1962#define MSA311_INT_MAP_1_REG 0x1A63#define MSA311_INT_CONFIG_REG 0x2064#define MSA311_INT_LATCH_REG 0x2165#define MSA311_FREEFALL_DUR_REG 0x2266#define MSA311_FREEFALL_TH_REG 0x2367#define MSA311_FREEFALL_HY_REG 0x2468#define MSA311_ACTIVE_DUR_REG 0x2769#define MSA311_ACTIVE_TH_REG 0x2870#define MSA311_TAP_DUR_REG 0x2A71#define MSA311_TAP_TH_REG 0x2B72#define MSA311_ORIENT_HY_REG 0x2C73#define MSA311_Z_BLOCK_REG 0x2D74#define MSA311_OFFSET_X_REG 0x3875#define MSA311_OFFSET_Y_REG 0x3976#define MSA311_OFFSET_Z_REG 0x3A77 78enum msa311_fields {79 /* Soft_Reset */80 F_SOFT_RESET_I2C, F_SOFT_RESET_SPI,81 /* Motion_Interrupt */82 F_ORIENT_INT, F_S_TAP_INT, F_D_TAP_INT, F_ACTIVE_INT, F_FREEFALL_INT,83 /* Data_Interrupt */84 F_NEW_DATA_INT,85 /* Tap_Active_Status */86 F_TAP_SIGN, F_TAP_FIRST_X, F_TAP_FIRST_Y, F_TAP_FIRST_Z, F_ACTV_SIGN,87 F_ACTV_FIRST_X, F_ACTV_FIRST_Y, F_ACTV_FIRST_Z,88 /* Orientation_Status */89 F_ORIENT_Z, F_ORIENT_X_Y,90 /* Range */91 F_FS,92 /* ODR */93 F_X_AXIS_DIS, F_Y_AXIS_DIS, F_Z_AXIS_DIS, F_ODR,94 /* Power Mode/Bandwidth */95 F_PWR_MODE, F_LOW_POWER_BW,96 /* Swap_Polarity */97 F_X_POLARITY, F_Y_POLARITY, F_Z_POLARITY, F_X_Y_SWAP,98 /* Int_Set_0 */99 F_ORIENT_INT_EN, F_S_TAP_INT_EN, F_D_TAP_INT_EN, F_ACTIVE_INT_EN_Z,100 F_ACTIVE_INT_EN_Y, F_ACTIVE_INT_EN_X,101 /* Int_Set_1 */102 F_NEW_DATA_INT_EN, F_FREEFALL_INT_EN,103 /* Int_Map_0 */104 F_INT1_ORIENT, F_INT1_S_TAP, F_INT1_D_TAP, F_INT1_ACTIVE,105 F_INT1_FREEFALL,106 /* Int_Map_1 */107 F_INT1_NEW_DATA,108 /* Int_Config */109 F_INT1_OD, F_INT1_LVL,110 /* Int_Latch */111 F_RESET_INT, F_LATCH_INT,112 /* Freefall_Hy */113 F_FREEFALL_MODE, F_FREEFALL_HY,114 /* Active_Dur */115 F_ACTIVE_DUR,116 /* Tap_Dur */117 F_TAP_QUIET, F_TAP_SHOCK, F_TAP_DUR,118 /* Tap_Th */119 F_TAP_TH,120 /* Orient_Hy */121 F_ORIENT_HYST, F_ORIENT_BLOCKING, F_ORIENT_MODE,122 /* Z_Block */123 F_Z_BLOCKING,124 /* End of register map */125 F_MAX_FIELDS,126};127 128static const struct reg_field msa311_reg_fields[] = {129 /* Soft_Reset */130 [F_SOFT_RESET_I2C] = REG_FIELD(MSA311_SOFT_RESET_REG, 2, 2),131 [F_SOFT_RESET_SPI] = REG_FIELD(MSA311_SOFT_RESET_REG, 5, 5),132 /* Motion_Interrupt */133 [F_ORIENT_INT] = REG_FIELD(MSA311_MOTION_INT_REG, 6, 6),134 [F_S_TAP_INT] = REG_FIELD(MSA311_MOTION_INT_REG, 5, 5),135 [F_D_TAP_INT] = REG_FIELD(MSA311_MOTION_INT_REG, 4, 4),136 [F_ACTIVE_INT] = REG_FIELD(MSA311_MOTION_INT_REG, 2, 2),137 [F_FREEFALL_INT] = REG_FIELD(MSA311_MOTION_INT_REG, 0, 0),138 /* Data_Interrupt */139 [F_NEW_DATA_INT] = REG_FIELD(MSA311_DATA_INT_REG, 0, 0),140 /* Tap_Active_Status */141 [F_TAP_SIGN] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 7, 7),142 [F_TAP_FIRST_X] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 6, 6),143 [F_TAP_FIRST_Y] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 5, 5),144 [F_TAP_FIRST_Z] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 4, 4),145 [F_ACTV_SIGN] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 3, 3),146 [F_ACTV_FIRST_X] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 2, 2),147 [F_ACTV_FIRST_Y] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 1, 1),148 [F_ACTV_FIRST_Z] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 0, 0),149 /* Orientation_Status */150 [F_ORIENT_Z] = REG_FIELD(MSA311_ORIENT_STS_REG, 6, 6),151 [F_ORIENT_X_Y] = REG_FIELD(MSA311_ORIENT_STS_REG, 4, 5),152 /* Range */153 [F_FS] = REG_FIELD(MSA311_RANGE_REG, 0, 1),154 /* ODR */155 [F_X_AXIS_DIS] = REG_FIELD(MSA311_ODR_REG, 7, 7),156 [F_Y_AXIS_DIS] = REG_FIELD(MSA311_ODR_REG, 6, 6),157 [F_Z_AXIS_DIS] = REG_FIELD(MSA311_ODR_REG, 5, 5),158 [F_ODR] = REG_FIELD(MSA311_ODR_REG, 0, 3),159 /* Power Mode/Bandwidth */160 [F_PWR_MODE] = REG_FIELD(MSA311_PWR_MODE_REG, 6, 7),161 [F_LOW_POWER_BW] = REG_FIELD(MSA311_PWR_MODE_REG, 1, 4),162 /* Swap_Polarity */163 [F_X_POLARITY] = REG_FIELD(MSA311_SWAP_POLARITY_REG, 3, 3),164 [F_Y_POLARITY] = REG_FIELD(MSA311_SWAP_POLARITY_REG, 2, 2),165 [F_Z_POLARITY] = REG_FIELD(MSA311_SWAP_POLARITY_REG, 1, 1),166 [F_X_Y_SWAP] = REG_FIELD(MSA311_SWAP_POLARITY_REG, 0, 0),167 /* Int_Set_0 */168 [F_ORIENT_INT_EN] = REG_FIELD(MSA311_INT_SET_0_REG, 6, 6),169 [F_S_TAP_INT_EN] = REG_FIELD(MSA311_INT_SET_0_REG, 5, 5),170 [F_D_TAP_INT_EN] = REG_FIELD(MSA311_INT_SET_0_REG, 4, 4),171 [F_ACTIVE_INT_EN_Z] = REG_FIELD(MSA311_INT_SET_0_REG, 2, 2),172 [F_ACTIVE_INT_EN_Y] = REG_FIELD(MSA311_INT_SET_0_REG, 1, 1),173 [F_ACTIVE_INT_EN_X] = REG_FIELD(MSA311_INT_SET_0_REG, 0, 0),174 /* Int_Set_1 */175 [F_NEW_DATA_INT_EN] = REG_FIELD(MSA311_INT_SET_1_REG, 4, 4),176 [F_FREEFALL_INT_EN] = REG_FIELD(MSA311_INT_SET_1_REG, 3, 3),177 /* Int_Map_0 */178 [F_INT1_ORIENT] = REG_FIELD(MSA311_INT_MAP_0_REG, 6, 6),179 [F_INT1_S_TAP] = REG_FIELD(MSA311_INT_MAP_0_REG, 5, 5),180 [F_INT1_D_TAP] = REG_FIELD(MSA311_INT_MAP_0_REG, 4, 4),181 [F_INT1_ACTIVE] = REG_FIELD(MSA311_INT_MAP_0_REG, 2, 2),182 [F_INT1_FREEFALL] = REG_FIELD(MSA311_INT_MAP_0_REG, 0, 0),183 /* Int_Map_1 */184 [F_INT1_NEW_DATA] = REG_FIELD(MSA311_INT_MAP_1_REG, 0, 0),185 /* Int_Config */186 [F_INT1_OD] = REG_FIELD(MSA311_INT_CONFIG_REG, 1, 1),187 [F_INT1_LVL] = REG_FIELD(MSA311_INT_CONFIG_REG, 0, 0),188 /* Int_Latch */189 [F_RESET_INT] = REG_FIELD(MSA311_INT_LATCH_REG, 7, 7),190 [F_LATCH_INT] = REG_FIELD(MSA311_INT_LATCH_REG, 0, 3),191 /* Freefall_Hy */192 [F_FREEFALL_MODE] = REG_FIELD(MSA311_FREEFALL_HY_REG, 2, 2),193 [F_FREEFALL_HY] = REG_FIELD(MSA311_FREEFALL_HY_REG, 0, 1),194 /* Active_Dur */195 [F_ACTIVE_DUR] = REG_FIELD(MSA311_ACTIVE_DUR_REG, 0, 1),196 /* Tap_Dur */197 [F_TAP_QUIET] = REG_FIELD(MSA311_TAP_DUR_REG, 7, 7),198 [F_TAP_SHOCK] = REG_FIELD(MSA311_TAP_DUR_REG, 6, 6),199 [F_TAP_DUR] = REG_FIELD(MSA311_TAP_DUR_REG, 0, 2),200 /* Tap_Th */201 [F_TAP_TH] = REG_FIELD(MSA311_TAP_TH_REG, 0, 4),202 /* Orient_Hy */203 [F_ORIENT_HYST] = REG_FIELD(MSA311_ORIENT_HY_REG, 4, 6),204 [F_ORIENT_BLOCKING] = REG_FIELD(MSA311_ORIENT_HY_REG, 2, 3),205 [F_ORIENT_MODE] = REG_FIELD(MSA311_ORIENT_HY_REG, 0, 1),206 /* Z_Block */207 [F_Z_BLOCKING] = REG_FIELD(MSA311_Z_BLOCK_REG, 0, 3),208};209 210#define MSA311_WHO_AM_I 0x13211 212/*213 * Possible Full Scale ranges214 *215 * Axis data is 12-bit signed value, so216 *217 * fs0 = (2 + 2) * 9.81 / (2^11) = 0.009580218 * fs1 = (4 + 4) * 9.81 / (2^11) = 0.019160219 * fs2 = (8 + 8) * 9.81 / (2^11) = 0.038320220 * fs3 = (16 + 16) * 9.81 / (2^11) = 0.076641221 */222enum {223 MSA311_FS_2G,224 MSA311_FS_4G,225 MSA311_FS_8G,226 MSA311_FS_16G,227};228 229struct iio_decimal_fract {230 int integral;231 int microfract;232};233 234static const struct iio_decimal_fract msa311_fs_table[] = {235 {0, 9580}, {0, 19160}, {0, 38320}, {0, 76641},236};237 238/* Possible Output Data Rate values */239enum {240 MSA311_ODR_1_HZ,241 MSA311_ODR_1_95_HZ,242 MSA311_ODR_3_9_HZ,243 MSA311_ODR_7_81_HZ,244 MSA311_ODR_15_63_HZ,245 MSA311_ODR_31_25_HZ,246 MSA311_ODR_62_5_HZ,247 MSA311_ODR_125_HZ,248 MSA311_ODR_250_HZ,249 MSA311_ODR_500_HZ,250 MSA311_ODR_1000_HZ,251};252 253static const struct iio_decimal_fract msa311_odr_table[] = {254 {1, 0}, {1, 950000}, {3, 900000}, {7, 810000}, {15, 630000},255 {31, 250000}, {62, 500000}, {125, 0}, {250, 0}, {500, 0}, {1000, 0},256};257 258/* All supported power modes */259#define MSA311_PWR_MODE_NORMAL 0b00260#define MSA311_PWR_MODE_LOW 0b01261#define MSA311_PWR_MODE_UNKNOWN 0b10262#define MSA311_PWR_MODE_SUSPEND 0b11263static const char * const msa311_pwr_modes[] = {264 [MSA311_PWR_MODE_NORMAL] = "normal",265 [MSA311_PWR_MODE_LOW] = "low",266 [MSA311_PWR_MODE_UNKNOWN] = "unknown",267 [MSA311_PWR_MODE_SUSPEND] = "suspend",268};269 270/* Autosuspend delay */271#define MSA311_PWR_SLEEP_DELAY_MS 2000272 273/* Possible INT1 types and levels */274enum {275 MSA311_INT1_OD_PUSH_PULL,276 MSA311_INT1_OD_OPEN_DRAIN,277};278 279enum {280 MSA311_INT1_LVL_LOW,281 MSA311_INT1_LVL_HIGH,282};283 284/* Latch INT modes */285#define MSA311_LATCH_INT_NOT_LATCHED 0b0000286#define MSA311_LATCH_INT_250MS 0b0001287#define MSA311_LATCH_INT_500MS 0b0010288#define MSA311_LATCH_INT_1S 0b0011289#define MSA311_LATCH_INT_2S 0b0100290#define MSA311_LATCH_INT_4S 0b0101291#define MSA311_LATCH_INT_8S 0b0110292#define MSA311_LATCH_INT_1MS 0b1010293#define MSA311_LATCH_INT_2MS 0b1011294#define MSA311_LATCH_INT_25MS 0b1100295#define MSA311_LATCH_INT_50MS 0b1101296#define MSA311_LATCH_INT_100MS 0b1110297#define MSA311_LATCH_INT_LATCHED 0b0111298 299static const struct regmap_range msa311_readonly_registers[] = {300 regmap_reg_range(MSA311_PARTID_REG, MSA311_ORIENT_STS_REG),301};302 303static const struct regmap_access_table msa311_writeable_table = {304 .no_ranges = msa311_readonly_registers,305 .n_no_ranges = ARRAY_SIZE(msa311_readonly_registers),306};307 308static const struct regmap_range msa311_writeonly_registers[] = {309 regmap_reg_range(MSA311_SOFT_RESET_REG, MSA311_SOFT_RESET_REG),310};311 312static const struct regmap_access_table msa311_readable_table = {313 .no_ranges = msa311_writeonly_registers,314 .n_no_ranges = ARRAY_SIZE(msa311_writeonly_registers),315};316 317static const struct regmap_range msa311_volatile_registers[] = {318 regmap_reg_range(MSA311_ACC_X_REG, MSA311_ORIENT_STS_REG),319};320 321static const struct regmap_access_table msa311_volatile_table = {322 .yes_ranges = msa311_volatile_registers,323 .n_yes_ranges = ARRAY_SIZE(msa311_volatile_registers),324};325 326static const struct regmap_config msa311_regmap_config = {327 .name = "msa311",328 .reg_bits = 8,329 .val_bits = 8,330 .max_register = MSA311_OFFSET_Z_REG,331 .wr_table = &msa311_writeable_table,332 .rd_table = &msa311_readable_table,333 .volatile_table = &msa311_volatile_table,334 .cache_type = REGCACHE_RBTREE,335};336 337#define MSA311_GENMASK(field) ({ \338 typeof(&(msa311_reg_fields)[0]) _field; \339 _field = &msa311_reg_fields[(field)]; \340 GENMASK(_field->msb, _field->lsb); \341})342 343/**344 * struct msa311_priv - MSA311 internal private state345 * @regs: Underlying I2C bus adapter used to abstract slave346 * register accesses347 * @fields: Abstract objects for each registers fields access348 * @dev: Device handler associated with appropriate bus client349 * @lock: Protects msa311 device state between setup and data access routines350 * (power transitions, samp_freq/scale tune, retrieving axes data, etc)351 * @chip_name: Chip name in the format "msa311-%02x" % partid352 * @new_data_trig: Optional NEW_DATA interrupt driven trigger used353 * to notify external consumers a new sample is ready354 */355struct msa311_priv {356 struct regmap *regs;357 struct regmap_field *fields[F_MAX_FIELDS];358 359 struct device *dev;360 struct mutex lock;361 char *chip_name;362 363 struct iio_trigger *new_data_trig;364};365 366enum msa311_si {367 MSA311_SI_X,368 MSA311_SI_Y,369 MSA311_SI_Z,370 MSA311_SI_TIMESTAMP,371};372 373#define MSA311_ACCEL_CHANNEL(axis) { \374 .type = IIO_ACCEL, \375 .modified = 1, \376 .channel2 = IIO_MOD_##axis, \377 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \378 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \379 BIT(IIO_CHAN_INFO_SAMP_FREQ), \380 .info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE) | \381 BIT(IIO_CHAN_INFO_SAMP_FREQ), \382 .scan_index = MSA311_SI_##axis, \383 .scan_type = { \384 .sign = 's', \385 .realbits = 12, \386 .storagebits = 16, \387 .shift = 4, \388 .endianness = IIO_LE, \389 }, \390 .datasheet_name = "ACC_"#axis, \391}392 393static const struct iio_chan_spec msa311_channels[] = {394 MSA311_ACCEL_CHANNEL(X),395 MSA311_ACCEL_CHANNEL(Y),396 MSA311_ACCEL_CHANNEL(Z),397 IIO_CHAN_SOFT_TIMESTAMP(MSA311_SI_TIMESTAMP),398};399 400/**401 * msa311_get_odr() - Read Output Data Rate (ODR) value from MSA311 accel402 * @msa311: MSA311 internal private state403 * @odr: output ODR value404 *405 * This function should be called under msa311->lock.406 *407 * Return: 0 on success, -ERRNO in other failures408 */409static int msa311_get_odr(struct msa311_priv *msa311, unsigned int *odr)410{411 int err;412 413 err = regmap_field_read(msa311->fields[F_ODR], odr);414 if (err)415 return err;416 417 /*418 * Filter the same 1000Hz ODR register values based on datasheet info.419 * ODR can be equal to 1010-1111 for 1000Hz, but function returns 1010420 * all the time.421 */422 if (*odr > MSA311_ODR_1000_HZ)423 *odr = MSA311_ODR_1000_HZ;424 425 return 0;426}427 428/**429 * msa311_set_odr() - Setup Output Data Rate (ODR) value for MSA311 accel430 * @msa311: MSA311 internal private state431 * @odr: requested ODR value432 *433 * This function should be called under msa311->lock. Possible ODR values:434 * - 1Hz (not available in normal mode)435 * - 1.95Hz (not available in normal mode)436 * - 3.9Hz437 * - 7.81Hz438 * - 15.63Hz439 * - 31.25Hz440 * - 62.5Hz441 * - 125Hz442 * - 250Hz443 * - 500Hz444 * - 1000Hz445 *446 * Return: 0 on success, -EINVAL for bad ODR value in the certain power mode,447 * -ERRNO in other failures448 */449static int msa311_set_odr(struct msa311_priv *msa311, unsigned int odr)450{451 struct device *dev = msa311->dev;452 unsigned int pwr_mode;453 bool good_odr;454 int err;455 456 err = regmap_field_read(msa311->fields[F_PWR_MODE], &pwr_mode);457 if (err)458 return err;459 460 /* Filter bad ODR values */461 if (pwr_mode == MSA311_PWR_MODE_NORMAL)462 good_odr = (odr > MSA311_ODR_1_95_HZ);463 else464 good_odr = false;465 466 if (!good_odr) {467 dev_err(dev,468 "can't set odr %u.%06uHz, not available in %s mode\n",469 msa311_odr_table[odr].integral,470 msa311_odr_table[odr].microfract,471 msa311_pwr_modes[pwr_mode]);472 return -EINVAL;473 }474 475 return regmap_field_write(msa311->fields[F_ODR], odr);476}477 478/**479 * msa311_wait_for_next_data() - Wait next accel data available after resume480 * @msa311: MSA311 internal private state481 *482 * Return: 0 on success, -EINTR if msleep() was interrupted,483 * -ERRNO in other failures484 */485static int msa311_wait_for_next_data(struct msa311_priv *msa311)486{487 static const unsigned int unintr_thresh_ms = 20;488 struct device *dev = msa311->dev;489 unsigned long freq_uhz;490 unsigned long wait_ms;491 unsigned int odr;492 int err;493 494 err = msa311_get_odr(msa311, &odr);495 if (err) {496 dev_err(dev, "can't get actual frequency (%pe)\n",497 ERR_PTR(err));498 return err;499 }500 501 /*502 * After msa311 resuming is done, we need to wait for data503 * to be refreshed by accel logic.504 * A certain timeout is calculated based on the current ODR value.505 * If requested timeout isn't so long (let's assume 20ms),506 * we can wait for next data in uninterruptible sleep.507 */508 freq_uhz = msa311_odr_table[odr].integral * MICROHZ_PER_HZ +509 msa311_odr_table[odr].microfract;510 wait_ms = (MICROHZ_PER_HZ / freq_uhz) * MSEC_PER_SEC;511 512 if (wait_ms < unintr_thresh_ms)513 usleep_range(wait_ms * USEC_PER_MSEC,514 unintr_thresh_ms * USEC_PER_MSEC);515 else if (msleep_interruptible(wait_ms))516 return -EINTR;517 518 return 0;519}520 521/**522 * msa311_set_pwr_mode() - Install certain MSA311 power mode523 * @msa311: MSA311 internal private state524 * @mode: Power mode can be equal to NORMAL or SUSPEND525 *526 * This function should be called under msa311->lock.527 *528 * Return: 0 on success, -ERRNO on failure529 */530static int msa311_set_pwr_mode(struct msa311_priv *msa311, unsigned int mode)531{532 struct device *dev = msa311->dev;533 unsigned int prev_mode;534 int err;535 536 if (mode >= ARRAY_SIZE(msa311_pwr_modes))537 return -EINVAL;538 539 dev_dbg(dev, "transition to %s mode\n", msa311_pwr_modes[mode]);540 541 err = regmap_field_read(msa311->fields[F_PWR_MODE], &prev_mode);542 if (err)543 return err;544 545 err = regmap_field_write(msa311->fields[F_PWR_MODE], mode);546 if (err)547 return err;548 549 /* Wait actual data if we wake up */550 if (prev_mode == MSA311_PWR_MODE_SUSPEND &&551 mode == MSA311_PWR_MODE_NORMAL)552 return msa311_wait_for_next_data(msa311);553 554 return 0;555}556 557/**558 * msa311_get_axis() - Read MSA311 accel data for certain IIO channel axis spec559 * @msa311: MSA311 internal private state560 * @chan: IIO channel specification561 * @axis: Output accel axis data for requested IIO channel spec562 *563 * This function should be called under msa311->lock.564 *565 * Return: 0 on success, -EINVAL for unknown IIO channel specification,566 * -ERRNO in other failures567 */568static int msa311_get_axis(struct msa311_priv *msa311,569 const struct iio_chan_spec * const chan,570 __le16 *axis)571{572 struct device *dev = msa311->dev;573 unsigned int axis_reg;574 575 if (chan->scan_index < MSA311_SI_X || chan->scan_index > MSA311_SI_Z) {576 dev_err(dev, "invalid scan_index value [%d]\n",577 chan->scan_index);578 return -EINVAL;579 }580 581 /* Axes data layout has 2 byte gap for each axis starting from X axis */582 axis_reg = MSA311_ACC_X_REG + (chan->scan_index << 1);583 584 return regmap_bulk_read(msa311->regs, axis_reg, axis, sizeof(*axis));585}586 587static int msa311_read_raw_data(struct iio_dev *indio_dev,588 struct iio_chan_spec const *chan,589 int *val, int *val2)590{591 struct msa311_priv *msa311 = iio_priv(indio_dev);592 struct device *dev = msa311->dev;593 __le16 axis;594 int err;595 596 err = pm_runtime_resume_and_get(dev);597 if (err)598 return err;599 600 err = iio_device_claim_direct_mode(indio_dev);601 if (err)602 return err;603 604 mutex_lock(&msa311->lock);605 err = msa311_get_axis(msa311, chan, &axis);606 mutex_unlock(&msa311->lock);607 608 iio_device_release_direct_mode(indio_dev);609 610 pm_runtime_mark_last_busy(dev);611 pm_runtime_put_autosuspend(dev);612 613 if (err) {614 dev_err(dev, "can't get axis %s (%pe)\n",615 chan->datasheet_name, ERR_PTR(err));616 return err;617 }618 619 /*620 * Axis data format is:621 * ACC_X = (ACC_X_MSB[7:0] << 4) | ACC_X_LSB[7:4]622 */623 *val = sign_extend32(le16_to_cpu(axis) >> chan->scan_type.shift,624 chan->scan_type.realbits - 1);625 626 return IIO_VAL_INT;627}628 629static int msa311_read_scale(struct iio_dev *indio_dev, int *val, int *val2)630{631 struct msa311_priv *msa311 = iio_priv(indio_dev);632 struct device *dev = msa311->dev;633 unsigned int fs;634 int err;635 636 mutex_lock(&msa311->lock);637 err = regmap_field_read(msa311->fields[F_FS], &fs);638 mutex_unlock(&msa311->lock);639 if (err) {640 dev_err(dev, "can't get actual scale (%pe)\n", ERR_PTR(err));641 return err;642 }643 644 *val = msa311_fs_table[fs].integral;645 *val2 = msa311_fs_table[fs].microfract;646 647 return IIO_VAL_INT_PLUS_MICRO;648}649 650static int msa311_read_samp_freq(struct iio_dev *indio_dev,651 int *val, int *val2)652{653 struct msa311_priv *msa311 = iio_priv(indio_dev);654 struct device *dev = msa311->dev;655 unsigned int odr;656 int err;657 658 mutex_lock(&msa311->lock);659 err = msa311_get_odr(msa311, &odr);660 mutex_unlock(&msa311->lock);661 if (err) {662 dev_err(dev, "can't get actual frequency (%pe)\n",663 ERR_PTR(err));664 return err;665 }666 667 *val = msa311_odr_table[odr].integral;668 *val2 = msa311_odr_table[odr].microfract;669 670 return IIO_VAL_INT_PLUS_MICRO;671}672 673static int msa311_read_raw(struct iio_dev *indio_dev,674 struct iio_chan_spec const *chan,675 int *val, int *val2, long mask)676{677 switch (mask) {678 case IIO_CHAN_INFO_RAW:679 return msa311_read_raw_data(indio_dev, chan, val, val2);680 681 case IIO_CHAN_INFO_SCALE:682 return msa311_read_scale(indio_dev, val, val2);683 684 case IIO_CHAN_INFO_SAMP_FREQ:685 return msa311_read_samp_freq(indio_dev, val, val2);686 687 default:688 return -EINVAL;689 }690}691 692static int msa311_read_avail(struct iio_dev *indio_dev,693 struct iio_chan_spec const *chan,694 const int **vals, int *type,695 int *length, long mask)696{697 switch (mask) {698 case IIO_CHAN_INFO_SAMP_FREQ:699 *vals = (int *)msa311_odr_table;700 *type = IIO_VAL_INT_PLUS_MICRO;701 /* ODR value has 2 ints (integer and fractional parts) */702 *length = ARRAY_SIZE(msa311_odr_table) * 2;703 return IIO_AVAIL_LIST;704 705 case IIO_CHAN_INFO_SCALE:706 *vals = (int *)msa311_fs_table;707 *type = IIO_VAL_INT_PLUS_MICRO;708 /* FS value has 2 ints (integer and fractional parts) */709 *length = ARRAY_SIZE(msa311_fs_table) * 2;710 return IIO_AVAIL_LIST;711 712 default:713 return -EINVAL;714 }715}716 717static int msa311_write_scale(struct iio_dev *indio_dev, int val, int val2)718{719 struct msa311_priv *msa311 = iio_priv(indio_dev);720 struct device *dev = msa311->dev;721 unsigned int fs;722 int err;723 724 /* We do not have fs >= 1, so skip such values */725 if (val)726 return 0;727 728 err = pm_runtime_resume_and_get(dev);729 if (err)730 return err;731 732 err = -EINVAL;733 for (fs = 0; fs < ARRAY_SIZE(msa311_fs_table); fs++)734 /* Do not check msa311_fs_table[fs].integral, it's always 0 */735 if (val2 == msa311_fs_table[fs].microfract) {736 mutex_lock(&msa311->lock);737 err = regmap_field_write(msa311->fields[F_FS], fs);738 mutex_unlock(&msa311->lock);739 break;740 }741 742 pm_runtime_mark_last_busy(dev);743 pm_runtime_put_autosuspend(dev);744 745 if (err)746 dev_err(dev, "can't update scale (%pe)\n", ERR_PTR(err));747 748 return err;749}750 751static int msa311_write_samp_freq(struct iio_dev *indio_dev, int val, int val2)752{753 struct msa311_priv *msa311 = iio_priv(indio_dev);754 struct device *dev = msa311->dev;755 unsigned int odr;756 int err;757 758 err = pm_runtime_resume_and_get(dev);759 if (err)760 return err;761 762 /*763 * Sampling frequency changing is prohibited when buffer mode is764 * enabled, because sometimes MSA311 chip returns outliers during765 * frequency values growing up in the read operation moment.766 */767 err = iio_device_claim_direct_mode(indio_dev);768 if (err)769 return err;770 771 err = -EINVAL;772 for (odr = 0; odr < ARRAY_SIZE(msa311_odr_table); odr++)773 if (val == msa311_odr_table[odr].integral &&774 val2 == msa311_odr_table[odr].microfract) {775 mutex_lock(&msa311->lock);776 err = msa311_set_odr(msa311, odr);777 mutex_unlock(&msa311->lock);778 break;779 }780 781 iio_device_release_direct_mode(indio_dev);782 783 pm_runtime_mark_last_busy(dev);784 pm_runtime_put_autosuspend(dev);785 786 if (err)787 dev_err(dev, "can't update frequency (%pe)\n", ERR_PTR(err));788 789 return err;790}791 792static int msa311_write_raw(struct iio_dev *indio_dev,793 struct iio_chan_spec const *chan,794 int val, int val2, long mask)795{796 switch (mask) {797 case IIO_CHAN_INFO_SCALE:798 return msa311_write_scale(indio_dev, val, val2);799 800 case IIO_CHAN_INFO_SAMP_FREQ:801 return msa311_write_samp_freq(indio_dev, val, val2);802 803 default:804 return -EINVAL;805 }806}807 808static int msa311_debugfs_reg_access(struct iio_dev *indio_dev,809 unsigned int reg, unsigned int writeval,810 unsigned int *readval)811{812 struct msa311_priv *msa311 = iio_priv(indio_dev);813 struct device *dev = msa311->dev;814 int err;815 816 if (reg > regmap_get_max_register(msa311->regs))817 return -EINVAL;818 819 err = pm_runtime_resume_and_get(dev);820 if (err)821 return err;822 823 mutex_lock(&msa311->lock);824 825 if (readval)826 err = regmap_read(msa311->regs, reg, readval);827 else828 err = regmap_write(msa311->regs, reg, writeval);829 830 mutex_unlock(&msa311->lock);831 832 pm_runtime_mark_last_busy(dev);833 pm_runtime_put_autosuspend(dev);834 835 if (err)836 dev_err(dev, "can't %s register %u from debugfs (%pe)\n",837 str_read_write(readval), reg, ERR_PTR(err));838 839 return err;840}841 842static int msa311_buffer_preenable(struct iio_dev *indio_dev)843{844 struct msa311_priv *msa311 = iio_priv(indio_dev);845 struct device *dev = msa311->dev;846 847 return pm_runtime_resume_and_get(dev);848}849 850static int msa311_buffer_postdisable(struct iio_dev *indio_dev)851{852 struct msa311_priv *msa311 = iio_priv(indio_dev);853 struct device *dev = msa311->dev;854 855 pm_runtime_mark_last_busy(dev);856 pm_runtime_put_autosuspend(dev);857 858 return 0;859}860 861static int msa311_set_new_data_trig_state(struct iio_trigger *trig, bool state)862{863 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);864 struct msa311_priv *msa311 = iio_priv(indio_dev);865 struct device *dev = msa311->dev;866 int err;867 868 mutex_lock(&msa311->lock);869 err = regmap_field_write(msa311->fields[F_NEW_DATA_INT_EN], state);870 mutex_unlock(&msa311->lock);871 if (err)872 dev_err(dev,873 "can't %s buffer due to new_data_int failure (%pe)\n",874 str_enable_disable(state), ERR_PTR(err));875 876 return err;877}878 879static int msa311_validate_device(struct iio_trigger *trig,880 struct iio_dev *indio_dev)881{882 return iio_trigger_get_drvdata(trig) == indio_dev ? 0 : -EINVAL;883}884 885static irqreturn_t msa311_buffer_thread(int irq, void *p)886{887 struct iio_poll_func *pf = p;888 struct msa311_priv *msa311 = iio_priv(pf->indio_dev);889 struct iio_dev *indio_dev = pf->indio_dev;890 const struct iio_chan_spec *chan;891 struct device *dev = msa311->dev;892 int bit, err, i = 0;893 __le16 axis;894 struct {895 __le16 channels[MSA311_SI_Z + 1];896 s64 ts __aligned(8);897 } buf;898 899 memset(&buf, 0, sizeof(buf));900 901 mutex_lock(&msa311->lock);902 903 iio_for_each_active_channel(indio_dev, bit) {904 chan = &msa311_channels[bit];905 906 err = msa311_get_axis(msa311, chan, &axis);907 if (err) {908 mutex_unlock(&msa311->lock);909 dev_err(dev, "can't get axis %s (%pe)\n",910 chan->datasheet_name, ERR_PTR(err));911 goto notify_done;912 }913 914 buf.channels[i++] = axis;915 }916 917 mutex_unlock(&msa311->lock);918 919 iio_push_to_buffers_with_timestamp(indio_dev, &buf,920 iio_get_time_ns(indio_dev));921 922notify_done:923 iio_trigger_notify_done(indio_dev->trig);924 925 return IRQ_HANDLED;926}927 928static irqreturn_t msa311_irq_thread(int irq, void *p)929{930 struct msa311_priv *msa311 = iio_priv(p);931 unsigned int new_data_int_enabled;932 struct device *dev = msa311->dev;933 int err;934 935 mutex_lock(&msa311->lock);936 937 /*938 * We do not check NEW_DATA int status, because based on the939 * specification it's cleared automatically after a fixed time.940 * So just check that is enabled by driver logic.941 */942 err = regmap_field_read(msa311->fields[F_NEW_DATA_INT_EN],943 &new_data_int_enabled);944 945 mutex_unlock(&msa311->lock);946 if (err) {947 dev_err(dev, "can't read new_data interrupt state (%pe)\n",948 ERR_PTR(err));949 return IRQ_NONE;950 }951 952 if (new_data_int_enabled)953 iio_trigger_poll_nested(msa311->new_data_trig);954 955 return IRQ_HANDLED;956}957 958static const struct iio_info msa311_info = {959 .read_raw = msa311_read_raw,960 .read_avail = msa311_read_avail,961 .write_raw = msa311_write_raw,962 .debugfs_reg_access = msa311_debugfs_reg_access,963};964 965static const struct iio_buffer_setup_ops msa311_buffer_setup_ops = {966 .preenable = msa311_buffer_preenable,967 .postdisable = msa311_buffer_postdisable,968};969 970static const struct iio_trigger_ops msa311_new_data_trig_ops = {971 .set_trigger_state = msa311_set_new_data_trig_state,972 .validate_device = msa311_validate_device,973};974 975static int msa311_check_partid(struct msa311_priv *msa311)976{977 struct device *dev = msa311->dev;978 unsigned int partid;979 int err;980 981 err = regmap_read(msa311->regs, MSA311_PARTID_REG, &partid);982 if (err)983 return dev_err_probe(dev, err, "failed to read partid\n");984 985 if (partid != MSA311_WHO_AM_I)986 dev_warn(dev, "invalid partid (%#x), expected (%#x)\n",987 partid, MSA311_WHO_AM_I);988 989 msa311->chip_name = devm_kasprintf(dev, GFP_KERNEL,990 "msa311-%02x", partid);991 if (!msa311->chip_name)992 return dev_err_probe(dev, -ENOMEM, "can't alloc chip name\n");993 994 return 0;995}996 997static int msa311_soft_reset(struct msa311_priv *msa311)998{999 struct device *dev = msa311->dev;1000 int err;1001 1002 err = regmap_write(msa311->regs, MSA311_SOFT_RESET_REG,1003 MSA311_GENMASK(F_SOFT_RESET_I2C) |1004 MSA311_GENMASK(F_SOFT_RESET_SPI));1005 if (err)1006 return dev_err_probe(dev, err, "can't soft reset all logic\n");1007 1008 return 0;1009}1010 1011static int msa311_chip_init(struct msa311_priv *msa311)1012{1013 struct device *dev = msa311->dev;1014 const char zero_bulk[2] = { };1015 int err;1016 1017 err = regmap_write(msa311->regs, MSA311_RANGE_REG, MSA311_FS_16G);1018 if (err)1019 return dev_err_probe(dev, err, "failed to setup accel range\n");1020 1021 /* Disable all interrupts by default */1022 err = regmap_bulk_write(msa311->regs, MSA311_INT_SET_0_REG,1023 zero_bulk, sizeof(zero_bulk));1024 if (err)1025 return dev_err_probe(dev, err,1026 "can't disable set0/set1 interrupts\n");1027 1028 /* Unmap all INT1 interrupts by default */1029 err = regmap_bulk_write(msa311->regs, MSA311_INT_MAP_0_REG,1030 zero_bulk, sizeof(zero_bulk));1031 if (err)1032 return dev_err_probe(dev, err,1033 "failed to unmap map0/map1 interrupts\n");1034 1035 /* Disable all axes by default */1036 err = regmap_clear_bits(msa311->regs, MSA311_ODR_REG,1037 MSA311_GENMASK(F_X_AXIS_DIS) |1038 MSA311_GENMASK(F_Y_AXIS_DIS) |1039 MSA311_GENMASK(F_Z_AXIS_DIS));1040 if (err)1041 return dev_err_probe(dev, err, "can't enable all axes\n");1042 1043 err = msa311_set_odr(msa311, MSA311_ODR_125_HZ);1044 if (err)1045 return dev_err_probe(dev, err,1046 "failed to set accel frequency\n");1047 1048 return 0;1049}1050 1051static int msa311_setup_interrupts(struct msa311_priv *msa311)1052{1053 struct device *dev = msa311->dev;1054 struct i2c_client *i2c = to_i2c_client(dev);1055 struct iio_dev *indio_dev = i2c_get_clientdata(i2c);1056 struct iio_trigger *trig;1057 int err;1058 1059 /* Keep going without interrupts if no initialized I2C IRQ */1060 if (i2c->irq <= 0)1061 return 0;1062 1063 err = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL,1064 msa311_irq_thread, IRQF_ONESHOT,1065 msa311->chip_name, indio_dev);1066 if (err)1067 return dev_err_probe(dev, err, "failed to request IRQ\n");1068 1069 trig = devm_iio_trigger_alloc(dev, "%s-new-data", msa311->chip_name);1070 if (!trig)1071 return dev_err_probe(dev, -ENOMEM,1072 "can't allocate newdata trigger\n");1073 1074 msa311->new_data_trig = trig;1075 msa311->new_data_trig->ops = &msa311_new_data_trig_ops;1076 iio_trigger_set_drvdata(msa311->new_data_trig, indio_dev);1077 1078 err = devm_iio_trigger_register(dev, msa311->new_data_trig);1079 if (err)1080 return dev_err_probe(dev, err,1081 "can't register newdata trigger\n");1082 1083 err = regmap_field_write(msa311->fields[F_INT1_OD],1084 MSA311_INT1_OD_PUSH_PULL);1085 if (err)1086 return dev_err_probe(dev, err,1087 "can't enable push-pull interrupt\n");1088 1089 err = regmap_field_write(msa311->fields[F_INT1_LVL],1090 MSA311_INT1_LVL_HIGH);1091 if (err)1092 return dev_err_probe(dev, err,1093 "can't set active interrupt level\n");1094 1095 err = regmap_field_write(msa311->fields[F_LATCH_INT],1096 MSA311_LATCH_INT_LATCHED);1097 if (err)1098 return dev_err_probe(dev, err,1099 "can't latch interrupt\n");1100 1101 err = regmap_field_write(msa311->fields[F_RESET_INT], 1);1102 if (err)1103 return dev_err_probe(dev, err,1104 "can't reset interrupt\n");1105 1106 err = regmap_field_write(msa311->fields[F_INT1_NEW_DATA], 1);1107 if (err)1108 return dev_err_probe(dev, err,1109 "can't map new data interrupt\n");1110 1111 return 0;1112}1113 1114static int msa311_regmap_init(struct msa311_priv *msa311)1115{1116 struct regmap_field **fields = msa311->fields;1117 struct device *dev = msa311->dev;1118 struct i2c_client *i2c = to_i2c_client(dev);1119 struct regmap *regmap;1120 int i;1121 1122 regmap = devm_regmap_init_i2c(i2c, &msa311_regmap_config);1123 if (IS_ERR(regmap))1124 return dev_err_probe(dev, PTR_ERR(regmap),1125 "failed to register i2c regmap\n");1126 1127 msa311->regs = regmap;1128 1129 for (i = 0; i < F_MAX_FIELDS; i++) {1130 fields[i] = devm_regmap_field_alloc(dev,1131 msa311->regs,1132 msa311_reg_fields[i]);1133 if (IS_ERR(msa311->fields[i]))1134 return dev_err_probe(dev, PTR_ERR(msa311->fields[i]),1135 "can't alloc field[%d]\n", i);1136 }1137 1138 return 0;1139}1140 1141static void msa311_powerdown(void *msa311)1142{1143 msa311_set_pwr_mode(msa311, MSA311_PWR_MODE_SUSPEND);1144}1145 1146static int msa311_probe(struct i2c_client *i2c)1147{1148 struct device *dev = &i2c->dev;1149 struct msa311_priv *msa311;1150 struct iio_dev *indio_dev;1151 int err;1152 1153 indio_dev = devm_iio_device_alloc(dev, sizeof(*msa311));1154 if (!indio_dev)1155 return dev_err_probe(dev, -ENOMEM,1156 "IIO device allocation failed\n");1157 1158 msa311 = iio_priv(indio_dev);1159 msa311->dev = dev;1160 i2c_set_clientdata(i2c, indio_dev);1161 1162 err = msa311_regmap_init(msa311);1163 if (err)1164 return err;1165 1166 mutex_init(&msa311->lock);1167 1168 err = devm_regulator_get_enable(dev, "vdd");1169 if (err)1170 return dev_err_probe(dev, err, "can't get vdd supply\n");1171 1172 err = msa311_check_partid(msa311);1173 if (err)1174 return err;1175 1176 err = msa311_soft_reset(msa311);1177 if (err)1178 return err;1179 1180 err = msa311_set_pwr_mode(msa311, MSA311_PWR_MODE_NORMAL);1181 if (err)1182 return dev_err_probe(dev, err, "failed to power on device\n");1183 1184 /*1185 * Register powerdown deferred callback which suspends the chip1186 * after module unloaded.1187 *1188 * MSA311 should be in SUSPEND mode in the two cases:1189 * 1) When driver is loaded, but we do not have any data or1190 * configuration requests to it (we are solving it using1191 * autosuspend feature).1192 * 2) When driver is unloaded and device is not used (devm action is1193 * used in this case).1194 */1195 err = devm_add_action_or_reset(dev, msa311_powerdown, msa311);1196 if (err)1197 return dev_err_probe(dev, err, "can't add powerdown action\n");1198 1199 err = pm_runtime_set_active(dev);1200 if (err)1201 return err;1202 1203 err = devm_pm_runtime_enable(dev);1204 if (err)1205 return err;1206 1207 pm_runtime_get_noresume(dev);1208 pm_runtime_set_autosuspend_delay(dev, MSA311_PWR_SLEEP_DELAY_MS);1209 pm_runtime_use_autosuspend(dev);1210 1211 err = msa311_chip_init(msa311);1212 if (err)1213 return err;1214 1215 indio_dev->modes = INDIO_DIRECT_MODE;1216 indio_dev->channels = msa311_channels;1217 indio_dev->num_channels = ARRAY_SIZE(msa311_channels);1218 indio_dev->name = msa311->chip_name;1219 indio_dev->info = &msa311_info;1220 1221 err = devm_iio_triggered_buffer_setup(dev, indio_dev,1222 iio_pollfunc_store_time,1223 msa311_buffer_thread,1224 &msa311_buffer_setup_ops);1225 if (err)1226 return dev_err_probe(dev, err,1227 "can't setup IIO trigger buffer\n");1228 1229 err = msa311_setup_interrupts(msa311);1230 if (err)1231 return err;1232 1233 pm_runtime_mark_last_busy(dev);1234 pm_runtime_put_autosuspend(dev);1235 1236 err = devm_iio_device_register(dev, indio_dev);1237 if (err)1238 return dev_err_probe(dev, err, "IIO device register failed\n");1239 1240 return 0;1241}1242 1243static int msa311_runtime_suspend(struct device *dev)1244{1245 struct iio_dev *indio_dev = dev_get_drvdata(dev);1246 struct msa311_priv *msa311 = iio_priv(indio_dev);1247 int err;1248 1249 mutex_lock(&msa311->lock);1250 err = msa311_set_pwr_mode(msa311, MSA311_PWR_MODE_SUSPEND);1251 mutex_unlock(&msa311->lock);1252 if (err)1253 dev_err(dev, "failed to power off device (%pe)\n",1254 ERR_PTR(err));1255 1256 return err;1257}1258 1259static int msa311_runtime_resume(struct device *dev)1260{1261 struct iio_dev *indio_dev = dev_get_drvdata(dev);1262 struct msa311_priv *msa311 = iio_priv(indio_dev);1263 int err;1264 1265 mutex_lock(&msa311->lock);1266 err = msa311_set_pwr_mode(msa311, MSA311_PWR_MODE_NORMAL);1267 mutex_unlock(&msa311->lock);1268 if (err)1269 dev_err(dev, "failed to power on device (%pe)\n",1270 ERR_PTR(err));1271 1272 return err;1273}1274 1275static DEFINE_RUNTIME_DEV_PM_OPS(msa311_pm_ops, msa311_runtime_suspend,1276 msa311_runtime_resume, NULL);1277 1278static const struct i2c_device_id msa311_i2c_id[] = {1279 { .name = "msa311" },1280 { }1281};1282MODULE_DEVICE_TABLE(i2c, msa311_i2c_id);1283 1284static const struct of_device_id msa311_of_match[] = {1285 { .compatible = "memsensing,msa311" },1286 { }1287};1288MODULE_DEVICE_TABLE(of, msa311_of_match);1289 1290static struct i2c_driver msa311_driver = {1291 .driver = {1292 .name = "msa311",1293 .of_match_table = msa311_of_match,1294 .pm = pm_ptr(&msa311_pm_ops),1295 },1296 .probe = msa311_probe,1297 .id_table = msa311_i2c_id,1298};1299module_i2c_driver(msa311_driver);1300 1301MODULE_AUTHOR("Dmitry Rokosov <ddrokosov@sberdevices.ru>");1302MODULE_DESCRIPTION("MEMSensing MSA311 3-axis accelerometer driver");1303MODULE_LICENSE("GPL");1304