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1// SPDX-License-Identifier: GPL-2.0-or-later2/*3 * AD7766/AD7767 SPI ADC driver4 *5 * Copyright 2016 Analog Devices Inc.6 */7 8#include <linux/clk.h>9#include <linux/delay.h>10#include <linux/device.h>11#include <linux/err.h>12#include <linux/gpio/consumer.h>13#include <linux/module.h>14#include <linux/regulator/consumer.h>15#include <linux/slab.h>16#include <linux/spi/spi.h>17 18#include <linux/iio/iio.h>19#include <linux/iio/buffer.h>20#include <linux/iio/trigger.h>21#include <linux/iio/trigger_consumer.h>22#include <linux/iio/triggered_buffer.h>23 24struct ad7766_chip_info {25 unsigned int decimation_factor;26};27 28enum {29 AD7766_SUPPLY_AVDD = 0,30 AD7766_SUPPLY_DVDD = 1,31 AD7766_SUPPLY_VREF = 2,32 AD7766_NUM_SUPPLIES = 333};34 35struct ad7766 {36 const struct ad7766_chip_info *chip_info;37 struct spi_device *spi;38 struct clk *mclk;39 struct gpio_desc *pd_gpio;40 struct regulator_bulk_data reg[AD7766_NUM_SUPPLIES];41 42 struct iio_trigger *trig;43 44 struct spi_transfer xfer;45 struct spi_message msg;46 47 /*48 * DMA (thus cache coherency maintenance) may require the49 * transfer buffers to live in their own cache lines.50 * Make the buffer large enough for one 24 bit sample and one 64 bit51 * aligned 64 bit timestamp.52 */53 unsigned char data[ALIGN(3, sizeof(s64)) + sizeof(s64)] __aligned(IIO_DMA_MINALIGN);54};55 56/*57 * AD7766 and AD7767 variations are interface compatible, the main difference is58 * analog performance. Both parts will use the same ID.59 */60enum ad7766_device_ids {61 ID_AD7766,62 ID_AD7766_1,63 ID_AD7766_2,64};65 66static irqreturn_t ad7766_trigger_handler(int irq, void *p)67{68 struct iio_poll_func *pf = p;69 struct iio_dev *indio_dev = pf->indio_dev;70 struct ad7766 *ad7766 = iio_priv(indio_dev);71 int ret;72 73 ret = spi_sync(ad7766->spi, &ad7766->msg);74 if (ret < 0)75 goto done;76 77 iio_push_to_buffers_with_timestamp(indio_dev, ad7766->data,78 pf->timestamp);79done:80 iio_trigger_notify_done(indio_dev->trig);81 82 return IRQ_HANDLED;83}84 85static int ad7766_preenable(struct iio_dev *indio_dev)86{87 struct ad7766 *ad7766 = iio_priv(indio_dev);88 int ret;89 90 ret = regulator_bulk_enable(ARRAY_SIZE(ad7766->reg), ad7766->reg);91 if (ret < 0) {92 dev_err(&ad7766->spi->dev, "Failed to enable supplies: %d\n",93 ret);94 return ret;95 }96 97 ret = clk_prepare_enable(ad7766->mclk);98 if (ret < 0) {99 dev_err(&ad7766->spi->dev, "Failed to enable MCLK: %d\n", ret);100 regulator_bulk_disable(ARRAY_SIZE(ad7766->reg), ad7766->reg);101 return ret;102 }103 104 gpiod_set_value(ad7766->pd_gpio, 0);105 106 return 0;107}108 109static int ad7766_postdisable(struct iio_dev *indio_dev)110{111 struct ad7766 *ad7766 = iio_priv(indio_dev);112 113 gpiod_set_value(ad7766->pd_gpio, 1);114 115 /*116 * The PD pin is synchronous to the clock, so give it some time to117 * notice the change before we disable the clock.118 */119 msleep(20);120 121 clk_disable_unprepare(ad7766->mclk);122 regulator_bulk_disable(ARRAY_SIZE(ad7766->reg), ad7766->reg);123 124 return 0;125}126 127static int ad7766_read_raw(struct iio_dev *indio_dev,128 const struct iio_chan_spec *chan, int *val, int *val2, long info)129{130 struct ad7766 *ad7766 = iio_priv(indio_dev);131 struct regulator *vref = ad7766->reg[AD7766_SUPPLY_VREF].consumer;132 int scale_uv;133 134 switch (info) {135 case IIO_CHAN_INFO_SCALE:136 scale_uv = regulator_get_voltage(vref);137 if (scale_uv < 0)138 return scale_uv;139 *val = scale_uv / 1000;140 *val2 = chan->scan_type.realbits;141 return IIO_VAL_FRACTIONAL_LOG2;142 case IIO_CHAN_INFO_SAMP_FREQ:143 *val = clk_get_rate(ad7766->mclk) /144 ad7766->chip_info->decimation_factor;145 return IIO_VAL_INT;146 }147 return -EINVAL;148}149 150static const struct iio_chan_spec ad7766_channels[] = {151 {152 .type = IIO_VOLTAGE,153 .indexed = 1,154 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),155 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),156 .scan_type = {157 .sign = 's',158 .realbits = 24,159 .storagebits = 32,160 .endianness = IIO_BE,161 },162 },163 IIO_CHAN_SOFT_TIMESTAMP(1),164};165 166static const struct ad7766_chip_info ad7766_chip_info[] = {167 [ID_AD7766] = {168 .decimation_factor = 8,169 },170 [ID_AD7766_1] = {171 .decimation_factor = 16,172 },173 [ID_AD7766_2] = {174 .decimation_factor = 32,175 },176};177 178static const struct iio_buffer_setup_ops ad7766_buffer_setup_ops = {179 .preenable = &ad7766_preenable,180 .postdisable = &ad7766_postdisable,181};182 183static const struct iio_info ad7766_info = {184 .read_raw = &ad7766_read_raw,185};186 187static irqreturn_t ad7766_irq(int irq, void *private)188{189 iio_trigger_poll(private);190 return IRQ_HANDLED;191}192 193static int ad7766_set_trigger_state(struct iio_trigger *trig, bool enable)194{195 struct ad7766 *ad7766 = iio_trigger_get_drvdata(trig);196 197 if (enable)198 enable_irq(ad7766->spi->irq);199 else200 disable_irq(ad7766->spi->irq);201 202 return 0;203}204 205static const struct iio_trigger_ops ad7766_trigger_ops = {206 .set_trigger_state = ad7766_set_trigger_state,207 .validate_device = iio_trigger_validate_own_device,208};209 210static int ad7766_probe(struct spi_device *spi)211{212 const struct spi_device_id *id = spi_get_device_id(spi);213 struct iio_dev *indio_dev;214 struct ad7766 *ad7766;215 int ret;216 217 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*ad7766));218 if (!indio_dev)219 return -ENOMEM;220 221 ad7766 = iio_priv(indio_dev);222 ad7766->chip_info = &ad7766_chip_info[id->driver_data];223 224 ad7766->mclk = devm_clk_get(&spi->dev, "mclk");225 if (IS_ERR(ad7766->mclk))226 return PTR_ERR(ad7766->mclk);227 228 ad7766->reg[AD7766_SUPPLY_AVDD].supply = "avdd";229 ad7766->reg[AD7766_SUPPLY_DVDD].supply = "dvdd";230 ad7766->reg[AD7766_SUPPLY_VREF].supply = "vref";231 232 ret = devm_regulator_bulk_get(&spi->dev, ARRAY_SIZE(ad7766->reg),233 ad7766->reg);234 if (ret)235 return ret;236 237 ad7766->pd_gpio = devm_gpiod_get_optional(&spi->dev, "powerdown",238 GPIOD_OUT_HIGH);239 if (IS_ERR(ad7766->pd_gpio))240 return PTR_ERR(ad7766->pd_gpio);241 242 indio_dev->name = spi_get_device_id(spi)->name;243 indio_dev->modes = INDIO_DIRECT_MODE;244 indio_dev->channels = ad7766_channels;245 indio_dev->num_channels = ARRAY_SIZE(ad7766_channels);246 indio_dev->info = &ad7766_info;247 248 if (spi->irq > 0) {249 ad7766->trig = devm_iio_trigger_alloc(&spi->dev, "%s-dev%d",250 indio_dev->name,251 iio_device_id(indio_dev));252 if (!ad7766->trig)253 return -ENOMEM;254 255 ad7766->trig->ops = &ad7766_trigger_ops;256 iio_trigger_set_drvdata(ad7766->trig, ad7766);257 258 /*259 * The device generates interrupts as long as it is powered up.260 * Some platforms might not allow the option to power it down so261 * don't enable the interrupt to avoid extra load on the system262 */263 ret = devm_request_irq(&spi->dev, spi->irq, ad7766_irq,264 IRQF_TRIGGER_FALLING | IRQF_NO_AUTOEN,265 dev_name(&spi->dev),266 ad7766->trig);267 if (ret < 0)268 return ret;269 270 ret = devm_iio_trigger_register(&spi->dev, ad7766->trig);271 if (ret)272 return ret;273 }274 275 ad7766->spi = spi;276 277 /* First byte always 0 */278 ad7766->xfer.rx_buf = &ad7766->data[1];279 ad7766->xfer.len = 3;280 281 spi_message_init(&ad7766->msg);282 spi_message_add_tail(&ad7766->xfer, &ad7766->msg);283 284 ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,285 &iio_pollfunc_store_time, &ad7766_trigger_handler,286 &ad7766_buffer_setup_ops);287 if (ret)288 return ret;289 290 return devm_iio_device_register(&spi->dev, indio_dev);291}292 293static const struct spi_device_id ad7766_id[] = {294 { "ad7766", ID_AD7766 },295 { "ad7766-1", ID_AD7766_1 },296 { "ad7766-2", ID_AD7766_2 },297 { "ad7767", ID_AD7766 },298 { "ad7767-1", ID_AD7766_1 },299 { "ad7767-2", ID_AD7766_2 },300 { }301};302MODULE_DEVICE_TABLE(spi, ad7766_id);303 304static struct spi_driver ad7766_driver = {305 .driver = {306 .name = "ad7766",307 },308 .probe = ad7766_probe,309 .id_table = ad7766_id,310};311module_spi_driver(ad7766_driver);312 313MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");314MODULE_DESCRIPTION("Analog Devices AD7766 and AD7767 ADCs driver support");315MODULE_LICENSE("GPL v2");316