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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * AD7787/AD7788/AD7789/AD7790/AD7791 SPI ADC driver4 *5 * Copyright 2012 Analog Devices Inc.6 * Author: Lars-Peter Clausen <lars@metafoo.de>7 */8 9#include <linux/interrupt.h>10#include <linux/device.h>11#include <linux/kernel.h>12#include <linux/slab.h>13#include <linux/sysfs.h>14#include <linux/spi/spi.h>15#include <linux/regulator/consumer.h>16#include <linux/err.h>17#include <linux/sched.h>18#include <linux/delay.h>19#include <linux/module.h>20 21#include <linux/iio/iio.h>22#include <linux/iio/sysfs.h>23#include <linux/iio/buffer.h>24#include <linux/iio/trigger.h>25#include <linux/iio/trigger_consumer.h>26#include <linux/iio/triggered_buffer.h>27#include <linux/iio/adc/ad_sigma_delta.h>28 29#include <linux/platform_data/ad7791.h>30 31#define AD7791_REG_COMM 0x0 /* For writes */32#define AD7791_REG_STATUS 0x0 /* For reads */33#define AD7791_REG_MODE 0x134#define AD7791_REG_FILTER 0x235#define AD7791_REG_DATA 0x336 37#define AD7791_MODE_CONTINUOUS 0x0038#define AD7791_MODE_SINGLE 0x0239#define AD7791_MODE_POWERDOWN 0x0340 41#define AD7791_CH_AIN1P_AIN1N 0x0042#define AD7791_CH_AIN2 0x0143#define AD7791_CH_AIN1N_AIN1N 0x0244#define AD7791_CH_AVDD_MONITOR 0x0345 46#define AD7791_FILTER_CLK_DIV_1 (0x0 << 4)47#define AD7791_FILTER_CLK_DIV_2 (0x1 << 4)48#define AD7791_FILTER_CLK_DIV_4 (0x2 << 4)49#define AD7791_FILTER_CLK_DIV_8 (0x3 << 4)50#define AD7791_FILTER_CLK_MASK (0x3 << 4)51#define AD7791_FILTER_RATE_120 0x052#define AD7791_FILTER_RATE_100 0x153#define AD7791_FILTER_RATE_33_3 0x254#define AD7791_FILTER_RATE_20 0x355#define AD7791_FILTER_RATE_16_6 0x456#define AD7791_FILTER_RATE_16_7 0x557#define AD7791_FILTER_RATE_13_3 0x658#define AD7791_FILTER_RATE_9_5 0x759#define AD7791_FILTER_RATE_MASK 0x760 61#define AD7791_MODE_BUFFER BIT(1)62#define AD7791_MODE_UNIPOLAR BIT(2)63#define AD7791_MODE_BURNOUT BIT(3)64#define AD7791_MODE_SEL_MASK (0x3 << 6)65#define AD7791_MODE_SEL(x) ((x) << 6)66 67#define __AD7991_CHANNEL(_si, _channel1, _channel2, _address, _bits, \68 _storagebits, _shift, _extend_name, _type, _mask_all) \69 { \70 .type = (_type), \71 .differential = (_channel2 == -1 ? 0 : 1), \72 .indexed = 1, \73 .channel = (_channel1), \74 .channel2 = (_channel2), \75 .address = (_address), \76 .extend_name = (_extend_name), \77 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \78 BIT(IIO_CHAN_INFO_OFFSET), \79 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \80 .info_mask_shared_by_all = _mask_all, \81 .scan_index = (_si), \82 .scan_type = { \83 .sign = 'u', \84 .realbits = (_bits), \85 .storagebits = (_storagebits), \86 .shift = (_shift), \87 .endianness = IIO_BE, \88 }, \89 }90 91#define AD7991_SHORTED_CHANNEL(_si, _channel, _address, _bits, \92 _storagebits, _shift) \93 __AD7991_CHANNEL(_si, _channel, _channel, _address, _bits, \94 _storagebits, _shift, "shorted", IIO_VOLTAGE, \95 BIT(IIO_CHAN_INFO_SAMP_FREQ))96 97#define AD7991_CHANNEL(_si, _channel, _address, _bits, \98 _storagebits, _shift) \99 __AD7991_CHANNEL(_si, _channel, -1, _address, _bits, \100 _storagebits, _shift, NULL, IIO_VOLTAGE, \101 BIT(IIO_CHAN_INFO_SAMP_FREQ))102 103#define AD7991_DIFF_CHANNEL(_si, _channel1, _channel2, _address, _bits, \104 _storagebits, _shift) \105 __AD7991_CHANNEL(_si, _channel1, _channel2, _address, _bits, \106 _storagebits, _shift, NULL, IIO_VOLTAGE, \107 BIT(IIO_CHAN_INFO_SAMP_FREQ))108 109#define AD7991_SUPPLY_CHANNEL(_si, _channel, _address, _bits, _storagebits, \110 _shift) \111 __AD7991_CHANNEL(_si, _channel, -1, _address, _bits, \112 _storagebits, _shift, "supply", IIO_VOLTAGE, \113 BIT(IIO_CHAN_INFO_SAMP_FREQ))114 115#define DECLARE_AD7787_CHANNELS(name, bits, storagebits) \116const struct iio_chan_spec name[] = { \117 AD7991_DIFF_CHANNEL(0, 0, 0, AD7791_CH_AIN1P_AIN1N, \118 (bits), (storagebits), 0), \119 AD7991_CHANNEL(1, 1, AD7791_CH_AIN2, (bits), (storagebits), 0), \120 AD7991_SHORTED_CHANNEL(2, 0, AD7791_CH_AIN1N_AIN1N, \121 (bits), (storagebits), 0), \122 AD7991_SUPPLY_CHANNEL(3, 2, AD7791_CH_AVDD_MONITOR, \123 (bits), (storagebits), 0), \124 IIO_CHAN_SOFT_TIMESTAMP(4), \125}126 127#define DECLARE_AD7791_CHANNELS(name, bits, storagebits) \128const struct iio_chan_spec name[] = { \129 AD7991_DIFF_CHANNEL(0, 0, 0, AD7791_CH_AIN1P_AIN1N, \130 (bits), (storagebits), 0), \131 AD7991_SHORTED_CHANNEL(1, 0, AD7791_CH_AIN1N_AIN1N, \132 (bits), (storagebits), 0), \133 AD7991_SUPPLY_CHANNEL(2, 1, AD7791_CH_AVDD_MONITOR, \134 (bits), (storagebits), 0), \135 IIO_CHAN_SOFT_TIMESTAMP(3), \136}137 138static DECLARE_AD7787_CHANNELS(ad7787_channels, 24, 32);139static DECLARE_AD7791_CHANNELS(ad7790_channels, 16, 16);140static DECLARE_AD7791_CHANNELS(ad7791_channels, 24, 32);141 142enum {143 AD7787,144 AD7788,145 AD7789,146 AD7790,147 AD7791,148};149 150enum ad7791_chip_info_flags {151 AD7791_FLAG_HAS_FILTER = (1 << 0),152 AD7791_FLAG_HAS_BUFFER = (1 << 1),153 AD7791_FLAG_HAS_UNIPOLAR = (1 << 2),154 AD7791_FLAG_HAS_BURNOUT = (1 << 3),155};156 157struct ad7791_chip_info {158 const struct iio_chan_spec *channels;159 unsigned int num_channels;160 enum ad7791_chip_info_flags flags;161};162 163static const struct ad7791_chip_info ad7791_chip_infos[] = {164 [AD7787] = {165 .channels = ad7787_channels,166 .num_channels = ARRAY_SIZE(ad7787_channels),167 .flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER |168 AD7791_FLAG_HAS_UNIPOLAR | AD7791_FLAG_HAS_BURNOUT,169 },170 [AD7788] = {171 .channels = ad7790_channels,172 .num_channels = ARRAY_SIZE(ad7790_channels),173 .flags = AD7791_FLAG_HAS_UNIPOLAR,174 },175 [AD7789] = {176 .channels = ad7791_channels,177 .num_channels = ARRAY_SIZE(ad7791_channels),178 .flags = AD7791_FLAG_HAS_UNIPOLAR,179 },180 [AD7790] = {181 .channels = ad7790_channels,182 .num_channels = ARRAY_SIZE(ad7790_channels),183 .flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER |184 AD7791_FLAG_HAS_BURNOUT,185 },186 [AD7791] = {187 .channels = ad7791_channels,188 .num_channels = ARRAY_SIZE(ad7791_channels),189 .flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER |190 AD7791_FLAG_HAS_UNIPOLAR | AD7791_FLAG_HAS_BURNOUT,191 },192};193 194struct ad7791_state {195 struct ad_sigma_delta sd;196 uint8_t mode;197 uint8_t filter;198 199 struct regulator *reg;200 const struct ad7791_chip_info *info;201};202 203static const int ad7791_sample_freq_avail[8][2] = {204 [AD7791_FILTER_RATE_120] = { 120, 0 },205 [AD7791_FILTER_RATE_100] = { 100, 0 },206 [AD7791_FILTER_RATE_33_3] = { 33, 300000 },207 [AD7791_FILTER_RATE_20] = { 20, 0 },208 [AD7791_FILTER_RATE_16_6] = { 16, 600000 },209 [AD7791_FILTER_RATE_16_7] = { 16, 700000 },210 [AD7791_FILTER_RATE_13_3] = { 13, 300000 },211 [AD7791_FILTER_RATE_9_5] = { 9, 500000 },212};213 214static struct ad7791_state *ad_sigma_delta_to_ad7791(struct ad_sigma_delta *sd)215{216 return container_of(sd, struct ad7791_state, sd);217}218 219static int ad7791_set_channel(struct ad_sigma_delta *sd, unsigned int channel)220{221 ad_sd_set_comm(sd, channel);222 223 return 0;224}225 226static int ad7791_set_mode(struct ad_sigma_delta *sd,227 enum ad_sigma_delta_mode mode)228{229 struct ad7791_state *st = ad_sigma_delta_to_ad7791(sd);230 231 switch (mode) {232 case AD_SD_MODE_CONTINUOUS:233 mode = AD7791_MODE_CONTINUOUS;234 break;235 case AD_SD_MODE_SINGLE:236 mode = AD7791_MODE_SINGLE;237 break;238 case AD_SD_MODE_IDLE:239 case AD_SD_MODE_POWERDOWN:240 mode = AD7791_MODE_POWERDOWN;241 break;242 }243 244 st->mode &= ~AD7791_MODE_SEL_MASK;245 st->mode |= AD7791_MODE_SEL(mode);246 247 return ad_sd_write_reg(sd, AD7791_REG_MODE, sizeof(st->mode), st->mode);248}249 250static const struct ad_sigma_delta_info ad7791_sigma_delta_info = {251 .set_channel = ad7791_set_channel,252 .set_mode = ad7791_set_mode,253 .has_registers = true,254 .addr_shift = 4,255 .read_mask = BIT(3),256 .irq_flags = IRQF_TRIGGER_FALLING,257};258 259static int ad7791_read_raw(struct iio_dev *indio_dev,260 const struct iio_chan_spec *chan, int *val, int *val2, long info)261{262 struct ad7791_state *st = iio_priv(indio_dev);263 bool unipolar = !!(st->mode & AD7791_MODE_UNIPOLAR);264 unsigned int rate;265 266 switch (info) {267 case IIO_CHAN_INFO_RAW:268 return ad_sigma_delta_single_conversion(indio_dev, chan, val);269 case IIO_CHAN_INFO_OFFSET:270 /**271 * Unipolar: 0 to VREF272 * Bipolar -VREF to VREF273 **/274 if (unipolar)275 *val = 0;276 else277 *val = -(1 << (chan->scan_type.realbits - 1));278 return IIO_VAL_INT;279 case IIO_CHAN_INFO_SCALE:280 /* The monitor channel uses an internal reference. */281 if (chan->address == AD7791_CH_AVDD_MONITOR) {282 /*283 * The signal is attenuated by a factor of 5 and284 * compared against a 1.17V internal reference.285 */286 *val = 1170 * 5;287 } else {288 int voltage_uv;289 290 voltage_uv = regulator_get_voltage(st->reg);291 if (voltage_uv < 0)292 return voltage_uv;293 294 *val = voltage_uv / 1000;295 }296 if (unipolar)297 *val2 = chan->scan_type.realbits;298 else299 *val2 = chan->scan_type.realbits - 1;300 301 return IIO_VAL_FRACTIONAL_LOG2;302 case IIO_CHAN_INFO_SAMP_FREQ:303 rate = st->filter & AD7791_FILTER_RATE_MASK;304 *val = ad7791_sample_freq_avail[rate][0];305 *val2 = ad7791_sample_freq_avail[rate][1];306 return IIO_VAL_INT_PLUS_MICRO;307 }308 309 return -EINVAL;310}311 312static int ad7791_write_raw(struct iio_dev *indio_dev,313 struct iio_chan_spec const *chan, int val, int val2, long mask)314{315 struct ad7791_state *st = iio_priv(indio_dev);316 int ret, i;317 318 ret = iio_device_claim_direct_mode(indio_dev);319 if (ret)320 return ret;321 322 switch (mask) {323 case IIO_CHAN_INFO_SAMP_FREQ:324 for (i = 0; i < ARRAY_SIZE(ad7791_sample_freq_avail); i++) {325 if (ad7791_sample_freq_avail[i][0] == val &&326 ad7791_sample_freq_avail[i][1] == val2)327 break;328 }329 330 if (i == ARRAY_SIZE(ad7791_sample_freq_avail)) {331 ret = -EINVAL;332 break;333 }334 335 st->filter &= ~AD7791_FILTER_RATE_MASK;336 st->filter |= i;337 ad_sd_write_reg(&st->sd, AD7791_REG_FILTER,338 sizeof(st->filter),339 st->filter);340 break;341 default:342 ret = -EINVAL;343 }344 345 iio_device_release_direct_mode(indio_dev);346 return ret;347}348 349static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("120 100 33.3 20 16.7 16.6 13.3 9.5");350 351static struct attribute *ad7791_attributes[] = {352 &iio_const_attr_sampling_frequency_available.dev_attr.attr,353 NULL354};355 356static const struct attribute_group ad7791_attribute_group = {357 .attrs = ad7791_attributes,358};359 360static const struct iio_info ad7791_info = {361 .read_raw = &ad7791_read_raw,362 .write_raw = &ad7791_write_raw,363 .attrs = &ad7791_attribute_group,364 .validate_trigger = ad_sd_validate_trigger,365};366 367static const struct iio_info ad7791_no_filter_info = {368 .read_raw = &ad7791_read_raw,369 .write_raw = &ad7791_write_raw,370 .validate_trigger = ad_sd_validate_trigger,371};372 373static int ad7791_setup(struct ad7791_state *st,374 struct ad7791_platform_data *pdata)375{376 /* Set to poweron-reset default values */377 st->mode = AD7791_MODE_BUFFER;378 st->filter = AD7791_FILTER_RATE_16_6;379 380 if (!pdata)381 return 0;382 383 if ((st->info->flags & AD7791_FLAG_HAS_BUFFER) && !pdata->buffered)384 st->mode &= ~AD7791_MODE_BUFFER;385 386 if ((st->info->flags & AD7791_FLAG_HAS_BURNOUT) &&387 pdata->burnout_current)388 st->mode |= AD7791_MODE_BURNOUT;389 390 if ((st->info->flags & AD7791_FLAG_HAS_UNIPOLAR) && pdata->unipolar)391 st->mode |= AD7791_MODE_UNIPOLAR;392 393 return ad_sd_write_reg(&st->sd, AD7791_REG_MODE, sizeof(st->mode),394 st->mode);395}396 397static void ad7791_reg_disable(void *reg)398{399 regulator_disable(reg);400}401 402static int ad7791_probe(struct spi_device *spi)403{404 struct ad7791_platform_data *pdata = spi->dev.platform_data;405 struct iio_dev *indio_dev;406 struct ad7791_state *st;407 int ret;408 409 if (!spi->irq) {410 dev_err(&spi->dev, "Missing IRQ.\n");411 return -ENXIO;412 }413 414 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));415 if (!indio_dev)416 return -ENOMEM;417 418 st = iio_priv(indio_dev);419 420 st->reg = devm_regulator_get(&spi->dev, "refin");421 if (IS_ERR(st->reg))422 return PTR_ERR(st->reg);423 424 ret = regulator_enable(st->reg);425 if (ret)426 return ret;427 428 ret = devm_add_action_or_reset(&spi->dev, ad7791_reg_disable, st->reg);429 if (ret)430 return ret;431 432 st->info = &ad7791_chip_infos[spi_get_device_id(spi)->driver_data];433 ad_sd_init(&st->sd, indio_dev, spi, &ad7791_sigma_delta_info);434 435 indio_dev->name = spi_get_device_id(spi)->name;436 indio_dev->modes = INDIO_DIRECT_MODE;437 indio_dev->channels = st->info->channels;438 indio_dev->num_channels = st->info->num_channels;439 if (st->info->flags & AD7791_FLAG_HAS_FILTER)440 indio_dev->info = &ad7791_info;441 else442 indio_dev->info = &ad7791_no_filter_info;443 444 ret = devm_ad_sd_setup_buffer_and_trigger(&spi->dev, indio_dev);445 if (ret)446 return ret;447 448 ret = ad7791_setup(st, pdata);449 if (ret)450 return ret;451 452 return devm_iio_device_register(&spi->dev, indio_dev);453}454 455static const struct spi_device_id ad7791_spi_ids[] = {456 { "ad7787", AD7787 },457 { "ad7788", AD7788 },458 { "ad7789", AD7789 },459 { "ad7790", AD7790 },460 { "ad7791", AD7791 },461 {}462};463MODULE_DEVICE_TABLE(spi, ad7791_spi_ids);464 465static struct spi_driver ad7791_driver = {466 .driver = {467 .name = "ad7791",468 },469 .probe = ad7791_probe,470 .id_table = ad7791_spi_ids,471};472module_spi_driver(ad7791_driver);473 474MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");475MODULE_DESCRIPTION("Analog Devices AD7787/AD7788/AD7789/AD7790/AD7791 ADC driver");476MODULE_LICENSE("GPL v2");477MODULE_IMPORT_NS(IIO_AD_SIGMA_DELTA);478