1357 lines · c
1// SPDX-License-Identifier: GPL-2.0-or-later2/*3 * Driver for the ADC present in the Atmel AT91 evaluation boards.4 *5 * Copyright 2011 Free Electrons6 */7 8#include <linux/bitmap.h>9#include <linux/bitops.h>10#include <linux/cleanup.h>11#include <linux/clk.h>12#include <linux/err.h>13#include <linux/io.h>14#include <linux/input.h>15#include <linux/interrupt.h>16#include <linux/jiffies.h>17#include <linux/kernel.h>18#include <linux/module.h>19#include <linux/of.h>20#include <linux/platform_device.h>21#include <linux/sched.h>22#include <linux/slab.h>23#include <linux/wait.h>24 25#include <linux/iio/iio.h>26#include <linux/iio/buffer.h>27#include <linux/iio/trigger.h>28#include <linux/iio/trigger_consumer.h>29#include <linux/iio/triggered_buffer.h>30#include <linux/pinctrl/consumer.h>31 32/* Registers */33#define AT91_ADC_CR 0x00 /* Control Register */34#define AT91_ADC_SWRST (1 << 0) /* Software Reset */35#define AT91_ADC_START (1 << 1) /* Start Conversion */36 37#define AT91_ADC_MR 0x04 /* Mode Register */38#define AT91_ADC_TSAMOD (3 << 0) /* ADC mode */39#define AT91_ADC_TSAMOD_ADC_ONLY_MODE (0 << 0) /* ADC Mode */40#define AT91_ADC_TSAMOD_TS_ONLY_MODE (1 << 0) /* Touch Screen Only Mode */41#define AT91_ADC_TRGEN (1 << 0) /* Trigger Enable */42#define AT91_ADC_TRGSEL (7 << 1) /* Trigger Selection */43#define AT91_ADC_TRGSEL_TC0 (0 << 1)44#define AT91_ADC_TRGSEL_TC1 (1 << 1)45#define AT91_ADC_TRGSEL_TC2 (2 << 1)46#define AT91_ADC_TRGSEL_EXTERNAL (6 << 1)47#define AT91_ADC_LOWRES (1 << 4) /* Low Resolution */48#define AT91_ADC_SLEEP (1 << 5) /* Sleep Mode */49#define AT91_ADC_PENDET (1 << 6) /* Pen contact detection enable */50#define AT91_ADC_PRESCAL_9260 (0x3f << 8) /* Prescalar Rate Selection */51#define AT91_ADC_PRESCAL_9G45 (0xff << 8)52#define AT91_ADC_PRESCAL_(x) ((x) << 8)53#define AT91_ADC_STARTUP_9260 (0x1f << 16) /* Startup Up Time */54#define AT91_ADC_STARTUP_9G45 (0x7f << 16)55#define AT91_ADC_STARTUP_9X5 (0xf << 16)56#define AT91_ADC_STARTUP_(x) ((x) << 16)57#define AT91_ADC_SHTIM (0xf << 24) /* Sample & Hold Time */58#define AT91_ADC_SHTIM_(x) ((x) << 24)59#define AT91_ADC_PENDBC (0x0f << 28) /* Pen Debounce time */60#define AT91_ADC_PENDBC_(x) ((x) << 28)61 62#define AT91_ADC_TSR 0x0C63#define AT91_ADC_TSR_SHTIM (0xf << 24) /* Sample & Hold Time */64#define AT91_ADC_TSR_SHTIM_(x) ((x) << 24)65 66#define AT91_ADC_CHER 0x10 /* Channel Enable Register */67#define AT91_ADC_CHDR 0x14 /* Channel Disable Register */68#define AT91_ADC_CHSR 0x18 /* Channel Status Register */69#define AT91_ADC_CH(n) (1 << (n)) /* Channel Number */70 71#define AT91_ADC_SR 0x1C /* Status Register */72#define AT91_ADC_EOC(n) (1 << (n)) /* End of Conversion on Channel N */73#define AT91_ADC_OVRE(n) (1 << ((n) + 8))/* Overrun Error on Channel N */74#define AT91_ADC_DRDY (1 << 16) /* Data Ready */75#define AT91_ADC_GOVRE (1 << 17) /* General Overrun Error */76#define AT91_ADC_ENDRX (1 << 18) /* End of RX Buffer */77#define AT91_ADC_RXFUFF (1 << 19) /* RX Buffer Full */78 79#define AT91_ADC_SR_9X5 0x30 /* Status Register for 9x5 */80#define AT91_ADC_SR_DRDY_9X5 (1 << 24) /* Data Ready */81 82#define AT91_ADC_LCDR 0x20 /* Last Converted Data Register */83#define AT91_ADC_LDATA (0x3ff)84 85#define AT91_ADC_IER 0x24 /* Interrupt Enable Register */86#define AT91_ADC_IDR 0x28 /* Interrupt Disable Register */87#define AT91_ADC_IMR 0x2C /* Interrupt Mask Register */88#define AT91RL_ADC_IER_PEN (1 << 20)89#define AT91RL_ADC_IER_NOPEN (1 << 21)90#define AT91_ADC_IER_PEN (1 << 29)91#define AT91_ADC_IER_NOPEN (1 << 30)92#define AT91_ADC_IER_XRDY (1 << 20)93#define AT91_ADC_IER_YRDY (1 << 21)94#define AT91_ADC_IER_PRDY (1 << 22)95#define AT91_ADC_ISR_PENS (1 << 31)96 97#define AT91_ADC_CHR(n) (0x30 + ((n) * 4)) /* Channel Data Register N */98#define AT91_ADC_DATA (0x3ff)99 100#define AT91_ADC_CDR0_9X5 (0x50) /* Channel Data Register 0 for 9X5 */101 102#define AT91_ADC_ACR 0x94 /* Analog Control Register */103#define AT91_ADC_ACR_PENDETSENS (0x3 << 0) /* pull-up resistor */104 105#define AT91_ADC_TSMR 0xB0106#define AT91_ADC_TSMR_TSMODE (3 << 0) /* Touch Screen Mode */107#define AT91_ADC_TSMR_TSMODE_NONE (0 << 0)108#define AT91_ADC_TSMR_TSMODE_4WIRE_NO_PRESS (1 << 0)109#define AT91_ADC_TSMR_TSMODE_4WIRE_PRESS (2 << 0)110#define AT91_ADC_TSMR_TSMODE_5WIRE (3 << 0)111#define AT91_ADC_TSMR_TSAV (3 << 4) /* Averages samples */112#define AT91_ADC_TSMR_TSAV_(x) ((x) << 4)113#define AT91_ADC_TSMR_SCTIM (0x0f << 16) /* Switch closure time */114#define AT91_ADC_TSMR_SCTIM_(x) ((x) << 16)115#define AT91_ADC_TSMR_PENDBC (0x0f << 28) /* Pen Debounce time */116#define AT91_ADC_TSMR_PENDBC_(x) ((x) << 28)117#define AT91_ADC_TSMR_NOTSDMA (1 << 22) /* No Touchscreen DMA */118#define AT91_ADC_TSMR_PENDET_DIS (0 << 24) /* Pen contact detection disable */119#define AT91_ADC_TSMR_PENDET_ENA (1 << 24) /* Pen contact detection enable */120 121#define AT91_ADC_TSXPOSR 0xB4122#define AT91_ADC_TSYPOSR 0xB8123#define AT91_ADC_TSPRESSR 0xBC124 125#define AT91_ADC_TRGR_9260 AT91_ADC_MR126#define AT91_ADC_TRGR_9G45 0x08127#define AT91_ADC_TRGR_9X5 0xC0128 129/* Trigger Register bit field */130#define AT91_ADC_TRGR_TRGPER (0xffff << 16)131#define AT91_ADC_TRGR_TRGPER_(x) ((x) << 16)132#define AT91_ADC_TRGR_TRGMOD (0x7 << 0)133#define AT91_ADC_TRGR_NONE (0 << 0)134#define AT91_ADC_TRGR_MOD_PERIOD_TRIG (5 << 0)135 136#define AT91_ADC_CHAN(st, ch) \137 (st->registers->channel_base + (ch * 4))138#define at91_adc_readl(st, reg) \139 (readl_relaxed(st->reg_base + reg))140#define at91_adc_writel(st, reg, val) \141 (writel_relaxed(val, st->reg_base + reg))142 143#define DRIVER_NAME "at91_adc"144#define MAX_POS_BITS 12145 146#define TOUCH_SAMPLE_PERIOD_US 2000 /* 2ms */147#define TOUCH_PEN_DETECT_DEBOUNCE_US 200148 149#define MAX_RLPOS_BITS 10150#define TOUCH_SAMPLE_PERIOD_US_RL 10000 /* 10ms, the SoC can't keep up with 2ms */151#define TOUCH_SHTIM 0xa152#define TOUCH_SCTIM_US 10 /* 10us for the Touchscreen Switches Closure Time */153 154enum atmel_adc_ts_type {155 ATMEL_ADC_TOUCHSCREEN_NONE = 0,156 ATMEL_ADC_TOUCHSCREEN_4WIRE = 4,157 ATMEL_ADC_TOUCHSCREEN_5WIRE = 5,158};159 160/**161 * struct at91_adc_trigger - description of triggers162 * @name: name of the trigger advertised to the user163 * @value: value to set in the ADC's trigger setup register164 * to enable the trigger165 * @is_external: Does the trigger rely on an external pin?166 */167struct at91_adc_trigger {168 const char *name;169 u8 value;170 bool is_external;171};172 173/**174 * struct at91_adc_reg_desc - Various informations relative to registers175 * @channel_base: Base offset for the channel data registers176 * @drdy_mask: Mask of the DRDY field in the relevant registers177 * (Interruptions registers mostly)178 * @status_register: Offset of the Interrupt Status Register179 * @trigger_register: Offset of the Trigger setup register180 * @mr_prescal_mask: Mask of the PRESCAL field in the adc MR register181 * @mr_startup_mask: Mask of the STARTUP field in the adc MR register182 */183struct at91_adc_reg_desc {184 u8 channel_base;185 u32 drdy_mask;186 u8 status_register;187 u8 trigger_register;188 u32 mr_prescal_mask;189 u32 mr_startup_mask;190};191 192struct at91_adc_caps {193 bool has_ts; /* Support touch screen */194 bool has_tsmr; /* only at91sam9x5, sama5d3 have TSMR reg */195 /*196 * Numbers of sampling data will be averaged. Can be 0~3.197 * Hardware can average (2 ^ ts_filter_average) sample data.198 */199 u8 ts_filter_average;200 /* Pen Detection input pull-up resistor, can be 0~3 */201 u8 ts_pen_detect_sensitivity;202 203 /* startup time calculate function */204 u32 (*calc_startup_ticks)(u32 startup_time, u32 adc_clk_khz);205 206 u8 num_channels;207 208 u8 low_res_bits;209 u8 high_res_bits;210 u32 trigger_number;211 const struct at91_adc_trigger *triggers;212 struct at91_adc_reg_desc registers;213};214 215struct at91_adc_state {216 struct clk *adc_clk;217 u16 *buffer;218 unsigned long channels_mask;219 struct clk *clk;220 bool done;221 int irq;222 u16 last_value;223 int chnb;224 struct mutex lock;225 u8 num_channels;226 void __iomem *reg_base;227 const struct at91_adc_reg_desc *registers;228 u32 startup_time;229 u8 sample_hold_time;230 bool sleep_mode;231 struct iio_trigger **trig;232 bool use_external;233 u32 vref_mv;234 u32 res; /* resolution used for convertions */235 wait_queue_head_t wq_data_avail;236 const struct at91_adc_caps *caps;237 238 /*239 * Following ADC channels are shared by touchscreen:240 *241 * CH0 -- Touch screen XP/UL242 * CH1 -- Touch screen XM/UR243 * CH2 -- Touch screen YP/LL244 * CH3 -- Touch screen YM/Sense245 * CH4 -- Touch screen LR(5-wire only)246 *247 * The bitfields below represents the reserved channel in the248 * touchscreen mode.249 */250#define CHAN_MASK_TOUCHSCREEN_4WIRE (0xf << 0)251#define CHAN_MASK_TOUCHSCREEN_5WIRE (0x1f << 0)252 enum atmel_adc_ts_type touchscreen_type;253 struct input_dev *ts_input;254 255 u16 ts_sample_period_val;256 u32 ts_pressure_threshold;257 u16 ts_pendbc;258 259 bool ts_bufferedmeasure;260 u32 ts_prev_absx;261 u32 ts_prev_absy;262};263 264static irqreturn_t at91_adc_trigger_handler(int irq, void *p)265{266 struct iio_poll_func *pf = p;267 struct iio_dev *idev = pf->indio_dev;268 struct at91_adc_state *st = iio_priv(idev);269 struct iio_chan_spec const *chan;270 int i, j = 0;271 272 iio_for_each_active_channel(idev, i) {273 chan = idev->channels + i;274 st->buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, chan->channel));275 j++;276 }277 278 iio_push_to_buffers_with_timestamp(idev, st->buffer, pf->timestamp);279 280 iio_trigger_notify_done(idev->trig);281 282 /* Needed to ACK the DRDY interruption */283 at91_adc_readl(st, AT91_ADC_LCDR);284 285 enable_irq(st->irq);286 287 return IRQ_HANDLED;288}289 290/* Handler for classic adc channel eoc trigger */291static void handle_adc_eoc_trigger(int irq, struct iio_dev *idev)292{293 struct at91_adc_state *st = iio_priv(idev);294 295 if (iio_buffer_enabled(idev)) {296 disable_irq_nosync(irq);297 iio_trigger_poll(idev->trig);298 } else {299 st->last_value = at91_adc_readl(st, AT91_ADC_CHAN(st, st->chnb));300 /* Needed to ACK the DRDY interruption */301 at91_adc_readl(st, AT91_ADC_LCDR);302 st->done = true;303 wake_up_interruptible(&st->wq_data_avail);304 }305}306 307static int at91_ts_sample(struct iio_dev *idev)308{309 struct at91_adc_state *st = iio_priv(idev);310 unsigned int xscale, yscale, reg, z1, z2;311 unsigned int x, y, pres, xpos, ypos;312 unsigned int rxp = 1;313 unsigned int factor = 1000;314 315 unsigned int xyz_mask_bits = st->res;316 unsigned int xyz_mask = (1 << xyz_mask_bits) - 1;317 318 /* calculate position */319 /* x position = (x / xscale) * max, max = 2^MAX_POS_BITS - 1 */320 reg = at91_adc_readl(st, AT91_ADC_TSXPOSR);321 xpos = reg & xyz_mask;322 x = (xpos << MAX_POS_BITS) - xpos;323 xscale = (reg >> 16) & xyz_mask;324 if (xscale == 0) {325 dev_err(&idev->dev, "Error: xscale == 0!\n");326 return -1;327 }328 x /= xscale;329 330 /* y position = (y / yscale) * max, max = 2^MAX_POS_BITS - 1 */331 reg = at91_adc_readl(st, AT91_ADC_TSYPOSR);332 ypos = reg & xyz_mask;333 y = (ypos << MAX_POS_BITS) - ypos;334 yscale = (reg >> 16) & xyz_mask;335 if (yscale == 0) {336 dev_err(&idev->dev, "Error: yscale == 0!\n");337 return -1;338 }339 y /= yscale;340 341 /* calculate the pressure */342 reg = at91_adc_readl(st, AT91_ADC_TSPRESSR);343 z1 = reg & xyz_mask;344 z2 = (reg >> 16) & xyz_mask;345 346 if (z1 != 0)347 pres = rxp * (x * factor / 1024) * (z2 * factor / z1 - factor)348 / factor;349 else350 pres = st->ts_pressure_threshold; /* no pen contacted */351 352 dev_dbg(&idev->dev, "xpos = %d, xscale = %d, ypos = %d, yscale = %d, z1 = %d, z2 = %d, press = %d\n",353 xpos, xscale, ypos, yscale, z1, z2, pres);354 355 if (pres < st->ts_pressure_threshold) {356 dev_dbg(&idev->dev, "x = %d, y = %d, pressure = %d\n",357 x, y, pres / factor);358 input_report_abs(st->ts_input, ABS_X, x);359 input_report_abs(st->ts_input, ABS_Y, y);360 input_report_abs(st->ts_input, ABS_PRESSURE, pres);361 input_report_key(st->ts_input, BTN_TOUCH, 1);362 input_sync(st->ts_input);363 } else {364 dev_dbg(&idev->dev, "pressure too low: not reporting\n");365 }366 367 return 0;368}369 370static irqreturn_t at91_adc_rl_interrupt(int irq, void *private)371{372 struct iio_dev *idev = private;373 struct at91_adc_state *st = iio_priv(idev);374 u32 status = at91_adc_readl(st, st->registers->status_register);375 unsigned int reg;376 377 status &= at91_adc_readl(st, AT91_ADC_IMR);378 if (status & GENMASK(st->num_channels - 1, 0))379 handle_adc_eoc_trigger(irq, idev);380 381 if (status & AT91RL_ADC_IER_PEN) {382 /* Disabling pen debounce is required to get a NOPEN irq */383 reg = at91_adc_readl(st, AT91_ADC_MR);384 reg &= ~AT91_ADC_PENDBC;385 at91_adc_writel(st, AT91_ADC_MR, reg);386 387 at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_PEN);388 at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_NOPEN389 | AT91_ADC_EOC(3));390 /* Set up period trigger for sampling */391 at91_adc_writel(st, st->registers->trigger_register,392 AT91_ADC_TRGR_MOD_PERIOD_TRIG |393 AT91_ADC_TRGR_TRGPER_(st->ts_sample_period_val));394 } else if (status & AT91RL_ADC_IER_NOPEN) {395 reg = at91_adc_readl(st, AT91_ADC_MR);396 reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC;397 at91_adc_writel(st, AT91_ADC_MR, reg);398 at91_adc_writel(st, st->registers->trigger_register,399 AT91_ADC_TRGR_NONE);400 401 at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_NOPEN402 | AT91_ADC_EOC(3));403 at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_PEN);404 st->ts_bufferedmeasure = false;405 input_report_key(st->ts_input, BTN_TOUCH, 0);406 input_sync(st->ts_input);407 } else if (status & AT91_ADC_EOC(3) && st->ts_input) {408 /* Conversion finished and we've a touchscreen */409 if (st->ts_bufferedmeasure) {410 /*411 * Last measurement is always discarded, since it can412 * be erroneous.413 * Always report previous measurement414 */415 input_report_abs(st->ts_input, ABS_X, st->ts_prev_absx);416 input_report_abs(st->ts_input, ABS_Y, st->ts_prev_absy);417 input_report_key(st->ts_input, BTN_TOUCH, 1);418 input_sync(st->ts_input);419 } else420 st->ts_bufferedmeasure = true;421 422 /* Now make new measurement */423 st->ts_prev_absx = at91_adc_readl(st, AT91_ADC_CHAN(st, 3))424 << MAX_RLPOS_BITS;425 st->ts_prev_absx /= at91_adc_readl(st, AT91_ADC_CHAN(st, 2));426 427 st->ts_prev_absy = at91_adc_readl(st, AT91_ADC_CHAN(st, 1))428 << MAX_RLPOS_BITS;429 st->ts_prev_absy /= at91_adc_readl(st, AT91_ADC_CHAN(st, 0));430 }431 432 return IRQ_HANDLED;433}434 435static irqreturn_t at91_adc_9x5_interrupt(int irq, void *private)436{437 struct iio_dev *idev = private;438 struct at91_adc_state *st = iio_priv(idev);439 u32 status = at91_adc_readl(st, st->registers->status_register);440 const uint32_t ts_data_irq_mask =441 AT91_ADC_IER_XRDY |442 AT91_ADC_IER_YRDY |443 AT91_ADC_IER_PRDY;444 445 if (status & GENMASK(st->num_channels - 1, 0))446 handle_adc_eoc_trigger(irq, idev);447 448 if (status & AT91_ADC_IER_PEN) {449 at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);450 at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_NOPEN |451 ts_data_irq_mask);452 /* Set up period trigger for sampling */453 at91_adc_writel(st, st->registers->trigger_register,454 AT91_ADC_TRGR_MOD_PERIOD_TRIG |455 AT91_ADC_TRGR_TRGPER_(st->ts_sample_period_val));456 } else if (status & AT91_ADC_IER_NOPEN) {457 at91_adc_writel(st, st->registers->trigger_register, 0);458 at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_NOPEN |459 ts_data_irq_mask);460 at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN);461 462 input_report_key(st->ts_input, BTN_TOUCH, 0);463 input_sync(st->ts_input);464 } else if ((status & ts_data_irq_mask) == ts_data_irq_mask) {465 /* Now all touchscreen data is ready */466 467 if (status & AT91_ADC_ISR_PENS) {468 /* validate data by pen contact */469 at91_ts_sample(idev);470 } else {471 /* triggered by event that is no pen contact, just read472 * them to clean the interrupt and discard all.473 */474 at91_adc_readl(st, AT91_ADC_TSXPOSR);475 at91_adc_readl(st, AT91_ADC_TSYPOSR);476 at91_adc_readl(st, AT91_ADC_TSPRESSR);477 }478 }479 480 return IRQ_HANDLED;481}482 483static int at91_adc_channel_init(struct iio_dev *idev)484{485 struct at91_adc_state *st = iio_priv(idev);486 struct iio_chan_spec *chan_array, *timestamp;487 int bit, idx = 0;488 unsigned long rsvd_mask = 0;489 490 /* If touchscreen is enable, then reserve the adc channels */491 if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)492 rsvd_mask = CHAN_MASK_TOUCHSCREEN_4WIRE;493 else if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_5WIRE)494 rsvd_mask = CHAN_MASK_TOUCHSCREEN_5WIRE;495 496 /* set up the channel mask to reserve touchscreen channels */497 st->channels_mask &= ~rsvd_mask;498 499 idev->num_channels = bitmap_weight(&st->channels_mask,500 st->num_channels) + 1;501 502 chan_array = devm_kzalloc(&idev->dev,503 ((idev->num_channels + 1) *504 sizeof(struct iio_chan_spec)),505 GFP_KERNEL);506 507 if (!chan_array)508 return -ENOMEM;509 510 for_each_set_bit(bit, &st->channels_mask, st->num_channels) {511 struct iio_chan_spec *chan = chan_array + idx;512 513 chan->type = IIO_VOLTAGE;514 chan->indexed = 1;515 chan->channel = bit;516 chan->scan_index = idx;517 chan->scan_type.sign = 'u';518 chan->scan_type.realbits = st->res;519 chan->scan_type.storagebits = 16;520 chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);521 chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);522 idx++;523 }524 timestamp = chan_array + idx;525 526 timestamp->type = IIO_TIMESTAMP;527 timestamp->channel = -1;528 timestamp->scan_index = idx;529 timestamp->scan_type.sign = 's';530 timestamp->scan_type.realbits = 64;531 timestamp->scan_type.storagebits = 64;532 533 idev->channels = chan_array;534 return idev->num_channels;535}536 537static int at91_adc_get_trigger_value_by_name(struct iio_dev *idev,538 const struct at91_adc_trigger *triggers,539 const char *trigger_name)540{541 struct at91_adc_state *st = iio_priv(idev);542 int i;543 544 for (i = 0; i < st->caps->trigger_number; i++) {545 char *name __free(kfree) = kasprintf(GFP_KERNEL, "%s-dev%d-%s",546 idev->name,547 iio_device_id(idev),548 triggers[i].name);549 if (!name)550 return -ENOMEM;551 552 if (strcmp(trigger_name, name) == 0) {553 if (triggers[i].value == 0)554 return -EINVAL;555 return triggers[i].value;556 }557 }558 559 return -EINVAL;560}561 562static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state)563{564 struct iio_dev *idev = iio_trigger_get_drvdata(trig);565 struct at91_adc_state *st = iio_priv(idev);566 const struct at91_adc_reg_desc *reg = st->registers;567 u32 status = at91_adc_readl(st, reg->trigger_register);568 int value;569 u8 bit;570 571 value = at91_adc_get_trigger_value_by_name(idev,572 st->caps->triggers,573 idev->trig->name);574 if (value < 0)575 return value;576 577 if (state) {578 st->buffer = kmalloc(idev->scan_bytes, GFP_KERNEL);579 if (st->buffer == NULL)580 return -ENOMEM;581 582 at91_adc_writel(st, reg->trigger_register,583 status | value);584 585 for_each_set_bit(bit, idev->active_scan_mask,586 st->num_channels) {587 struct iio_chan_spec const *chan = idev->channels + bit;588 at91_adc_writel(st, AT91_ADC_CHER,589 AT91_ADC_CH(chan->channel));590 }591 592 at91_adc_writel(st, AT91_ADC_IER, reg->drdy_mask);593 594 } else {595 at91_adc_writel(st, AT91_ADC_IDR, reg->drdy_mask);596 597 at91_adc_writel(st, reg->trigger_register,598 status & ~value);599 600 for_each_set_bit(bit, idev->active_scan_mask,601 st->num_channels) {602 struct iio_chan_spec const *chan = idev->channels + bit;603 at91_adc_writel(st, AT91_ADC_CHDR,604 AT91_ADC_CH(chan->channel));605 }606 kfree(st->buffer);607 }608 609 return 0;610}611 612static const struct iio_trigger_ops at91_adc_trigger_ops = {613 .set_trigger_state = &at91_adc_configure_trigger,614};615 616static struct iio_trigger *at91_adc_allocate_trigger(struct iio_dev *idev,617 const struct at91_adc_trigger *trigger)618{619 struct iio_trigger *trig;620 int ret;621 622 trig = iio_trigger_alloc(idev->dev.parent, "%s-dev%d-%s", idev->name,623 iio_device_id(idev), trigger->name);624 if (trig == NULL)625 return NULL;626 627 iio_trigger_set_drvdata(trig, idev);628 trig->ops = &at91_adc_trigger_ops;629 630 ret = iio_trigger_register(trig);631 if (ret) {632 iio_trigger_free(trig);633 return NULL;634 }635 636 return trig;637}638 639static int at91_adc_trigger_init(struct iio_dev *idev)640{641 struct at91_adc_state *st = iio_priv(idev);642 int i, ret;643 644 st->trig = devm_kcalloc(&idev->dev,645 st->caps->trigger_number, sizeof(*st->trig),646 GFP_KERNEL);647 648 if (st->trig == NULL) {649 ret = -ENOMEM;650 goto error_ret;651 }652 653 for (i = 0; i < st->caps->trigger_number; i++) {654 if (st->caps->triggers[i].is_external && !(st->use_external))655 continue;656 657 st->trig[i] = at91_adc_allocate_trigger(idev,658 st->caps->triggers + i);659 if (st->trig[i] == NULL) {660 dev_err(&idev->dev,661 "Could not allocate trigger %d\n", i);662 ret = -ENOMEM;663 goto error_trigger;664 }665 }666 667 return 0;668 669error_trigger:670 for (i--; i >= 0; i--) {671 iio_trigger_unregister(st->trig[i]);672 iio_trigger_free(st->trig[i]);673 }674error_ret:675 return ret;676}677 678static void at91_adc_trigger_remove(struct iio_dev *idev)679{680 struct at91_adc_state *st = iio_priv(idev);681 int i;682 683 for (i = 0; i < st->caps->trigger_number; i++) {684 iio_trigger_unregister(st->trig[i]);685 iio_trigger_free(st->trig[i]);686 }687}688 689static int at91_adc_buffer_init(struct iio_dev *idev)690{691 return iio_triggered_buffer_setup(idev, &iio_pollfunc_store_time,692 &at91_adc_trigger_handler, NULL);693}694 695static void at91_adc_buffer_remove(struct iio_dev *idev)696{697 iio_triggered_buffer_cleanup(idev);698}699 700static int at91_adc_read_raw(struct iio_dev *idev,701 struct iio_chan_spec const *chan,702 int *val, int *val2, long mask)703{704 struct at91_adc_state *st = iio_priv(idev);705 int ret;706 707 switch (mask) {708 case IIO_CHAN_INFO_RAW:709 mutex_lock(&st->lock);710 711 st->chnb = chan->channel;712 at91_adc_writel(st, AT91_ADC_CHER,713 AT91_ADC_CH(chan->channel));714 at91_adc_writel(st, AT91_ADC_IER, BIT(chan->channel));715 at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_START);716 717 ret = wait_event_interruptible_timeout(st->wq_data_avail,718 st->done,719 msecs_to_jiffies(1000));720 721 /* Disable interrupts, regardless if adc conversion was722 * successful or not723 */724 at91_adc_writel(st, AT91_ADC_CHDR,725 AT91_ADC_CH(chan->channel));726 at91_adc_writel(st, AT91_ADC_IDR, BIT(chan->channel));727 728 if (ret > 0) {729 /* a valid conversion took place */730 *val = st->last_value;731 st->last_value = 0;732 st->done = false;733 ret = IIO_VAL_INT;734 } else if (ret == 0) {735 /* conversion timeout */736 dev_err(&idev->dev, "ADC Channel %d timeout.\n",737 chan->channel);738 ret = -ETIMEDOUT;739 }740 741 mutex_unlock(&st->lock);742 return ret;743 744 case IIO_CHAN_INFO_SCALE:745 *val = st->vref_mv;746 *val2 = chan->scan_type.realbits;747 return IIO_VAL_FRACTIONAL_LOG2;748 default:749 break;750 }751 return -EINVAL;752}753 754 755static u32 calc_startup_ticks_9260(u32 startup_time, u32 adc_clk_khz)756{757 /*758 * Number of ticks needed to cover the startup time of the ADC759 * as defined in the electrical characteristics of the board,760 * divided by 8. The formula thus is :761 * Startup Time = (ticks + 1) * 8 / ADC Clock762 */763 return round_up((startup_time * adc_clk_khz / 1000) - 1, 8) / 8;764}765 766static u32 calc_startup_ticks_9x5(u32 startup_time, u32 adc_clk_khz)767{768 /*769 * For sama5d3x and at91sam9x5, the formula changes to:770 * Startup Time = <lookup_table_value> / ADC Clock771 */772 static const int startup_lookup[] = {773 0, 8, 16, 24,774 64, 80, 96, 112,775 512, 576, 640, 704,776 768, 832, 896, 960777 };778 int i, size = ARRAY_SIZE(startup_lookup);779 unsigned int ticks;780 781 ticks = startup_time * adc_clk_khz / 1000;782 for (i = 0; i < size; i++)783 if (ticks < startup_lookup[i])784 break;785 786 ticks = i;787 if (ticks == size)788 /* Reach the end of lookup table */789 ticks = size - 1;790 791 return ticks;792}793 794static int at91_adc_probe_dt_ts(struct device_node *node,795 struct at91_adc_state *st, struct device *dev)796{797 int ret;798 u32 prop;799 800 ret = of_property_read_u32(node, "atmel,adc-ts-wires", &prop);801 if (ret) {802 dev_info(dev, "ADC Touch screen is disabled.\n");803 return 0;804 }805 806 switch (prop) {807 case 4:808 case 5:809 st->touchscreen_type = prop;810 break;811 default:812 dev_err(dev, "Unsupported number of touchscreen wires (%d). Should be 4 or 5.\n", prop);813 return -EINVAL;814 }815 816 if (!st->caps->has_tsmr)817 return 0;818 prop = 0;819 of_property_read_u32(node, "atmel,adc-ts-pressure-threshold", &prop);820 st->ts_pressure_threshold = prop;821 if (st->ts_pressure_threshold) {822 return 0;823 } else {824 dev_err(dev, "Invalid pressure threshold for the touchscreen\n");825 return -EINVAL;826 }827}828 829static const struct iio_info at91_adc_info = {830 .read_raw = &at91_adc_read_raw,831};832 833/* Touchscreen related functions */834static int atmel_ts_open(struct input_dev *dev)835{836 struct at91_adc_state *st = input_get_drvdata(dev);837 838 if (st->caps->has_tsmr)839 at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN);840 else841 at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_PEN);842 return 0;843}844 845static void atmel_ts_close(struct input_dev *dev)846{847 struct at91_adc_state *st = input_get_drvdata(dev);848 849 if (st->caps->has_tsmr)850 at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);851 else852 at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_PEN);853}854 855static int at91_ts_hw_init(struct iio_dev *idev, u32 adc_clk_khz)856{857 struct at91_adc_state *st = iio_priv(idev);858 u32 reg = 0;859 u32 tssctim = 0;860 int i = 0;861 862 /* a Pen Detect Debounce Time is necessary for the ADC Touch to avoid863 * pen detect noise.864 * The formula is : Pen Detect Debounce Time = (2 ^ pendbc) / ADCClock865 */866 st->ts_pendbc = round_up(TOUCH_PEN_DETECT_DEBOUNCE_US * adc_clk_khz /867 1000, 1);868 869 while (st->ts_pendbc >> ++i)870 ; /* Empty! Find the shift offset */871 if (abs(st->ts_pendbc - (1 << i)) < abs(st->ts_pendbc - (1 << (i - 1))))872 st->ts_pendbc = i;873 else874 st->ts_pendbc = i - 1;875 876 if (!st->caps->has_tsmr) {877 reg = at91_adc_readl(st, AT91_ADC_MR);878 reg |= AT91_ADC_TSAMOD_TS_ONLY_MODE | AT91_ADC_PENDET;879 880 reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC;881 at91_adc_writel(st, AT91_ADC_MR, reg);882 883 reg = AT91_ADC_TSR_SHTIM_(TOUCH_SHTIM) & AT91_ADC_TSR_SHTIM;884 at91_adc_writel(st, AT91_ADC_TSR, reg);885 886 st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US_RL *887 adc_clk_khz / 1000) - 1, 1);888 889 return 0;890 }891 892 /* Touchscreen Switches Closure time needed for allowing the value to893 * stabilize.894 * Switch Closure Time = (TSSCTIM * 4) ADCClock periods895 */896 tssctim = DIV_ROUND_UP(TOUCH_SCTIM_US * adc_clk_khz / 1000, 4);897 dev_dbg(&idev->dev, "adc_clk at: %d KHz, tssctim at: %d\n",898 adc_clk_khz, tssctim);899 900 if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)901 reg = AT91_ADC_TSMR_TSMODE_4WIRE_PRESS;902 else903 reg = AT91_ADC_TSMR_TSMODE_5WIRE;904 905 reg |= AT91_ADC_TSMR_SCTIM_(tssctim) & AT91_ADC_TSMR_SCTIM;906 reg |= AT91_ADC_TSMR_TSAV_(st->caps->ts_filter_average)907 & AT91_ADC_TSMR_TSAV;908 reg |= AT91_ADC_TSMR_PENDBC_(st->ts_pendbc) & AT91_ADC_TSMR_PENDBC;909 reg |= AT91_ADC_TSMR_NOTSDMA;910 reg |= AT91_ADC_TSMR_PENDET_ENA;911 reg |= 0x03 << 8; /* TSFREQ, needs to be bigger than TSAV */912 913 at91_adc_writel(st, AT91_ADC_TSMR, reg);914 915 /* Change adc internal resistor value for better pen detection,916 * default value is 100 kOhm.917 * 0 = 200 kOhm, 1 = 150 kOhm, 2 = 100 kOhm, 3 = 50 kOhm918 * option only available on ES2 and higher919 */920 at91_adc_writel(st, AT91_ADC_ACR, st->caps->ts_pen_detect_sensitivity921 & AT91_ADC_ACR_PENDETSENS);922 923 /* Sample Period Time = (TRGPER + 1) / ADCClock */924 st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US *925 adc_clk_khz / 1000) - 1, 1);926 927 return 0;928}929 930static int at91_ts_register(struct iio_dev *idev,931 struct platform_device *pdev)932{933 struct at91_adc_state *st = iio_priv(idev);934 struct input_dev *input;935 int ret;936 937 input = input_allocate_device();938 if (!input) {939 dev_err(&idev->dev, "Failed to allocate TS device!\n");940 return -ENOMEM;941 }942 943 input->name = DRIVER_NAME;944 input->id.bustype = BUS_HOST;945 input->dev.parent = &pdev->dev;946 input->open = atmel_ts_open;947 input->close = atmel_ts_close;948 949 __set_bit(EV_ABS, input->evbit);950 __set_bit(EV_KEY, input->evbit);951 __set_bit(BTN_TOUCH, input->keybit);952 if (st->caps->has_tsmr) {953 input_set_abs_params(input, ABS_X, 0, (1 << MAX_POS_BITS) - 1,954 0, 0);955 input_set_abs_params(input, ABS_Y, 0, (1 << MAX_POS_BITS) - 1,956 0, 0);957 input_set_abs_params(input, ABS_PRESSURE, 0, 0xffffff, 0, 0);958 } else {959 if (st->touchscreen_type != ATMEL_ADC_TOUCHSCREEN_4WIRE) {960 dev_err(&pdev->dev,961 "This touchscreen controller only support 4 wires\n");962 ret = -EINVAL;963 goto err;964 }965 966 input_set_abs_params(input, ABS_X, 0, (1 << MAX_RLPOS_BITS) - 1,967 0, 0);968 input_set_abs_params(input, ABS_Y, 0, (1 << MAX_RLPOS_BITS) - 1,969 0, 0);970 }971 972 st->ts_input = input;973 input_set_drvdata(input, st);974 975 ret = input_register_device(input);976 if (ret)977 goto err;978 979 return ret;980 981err:982 input_free_device(st->ts_input);983 return ret;984}985 986static void at91_ts_unregister(struct at91_adc_state *st)987{988 input_unregister_device(st->ts_input);989}990 991static int at91_adc_probe(struct platform_device *pdev)992{993 unsigned int prsc, mstrclk, ticks, adc_clk, adc_clk_khz, shtim;994 struct device_node *node = pdev->dev.of_node;995 int ret;996 struct iio_dev *idev;997 struct at91_adc_state *st;998 u32 reg, prop;999 char *s;1000 1001 idev = devm_iio_device_alloc(&pdev->dev, sizeof(struct at91_adc_state));1002 if (!idev)1003 return -ENOMEM;1004 1005 st = iio_priv(idev);1006 1007 st->caps = of_device_get_match_data(&pdev->dev);1008 1009 st->use_external = of_property_read_bool(node, "atmel,adc-use-external-triggers");1010 1011 if (of_property_read_u32(node, "atmel,adc-channels-used", &prop))1012 return dev_err_probe(&idev->dev, -EINVAL,1013 "Missing adc-channels-used property in the DT.\n");1014 st->channels_mask = prop;1015 1016 st->sleep_mode = of_property_read_bool(node, "atmel,adc-sleep-mode");1017 1018 if (of_property_read_u32(node, "atmel,adc-startup-time", &prop))1019 return dev_err_probe(&idev->dev, -EINVAL,1020 "Missing adc-startup-time property in the DT.\n");1021 st->startup_time = prop;1022 1023 prop = 0;1024 of_property_read_u32(node, "atmel,adc-sample-hold-time", &prop);1025 st->sample_hold_time = prop;1026 1027 if (of_property_read_u32(node, "atmel,adc-vref", &prop))1028 return dev_err_probe(&idev->dev, -EINVAL,1029 "Missing adc-vref property in the DT.\n");1030 st->vref_mv = prop;1031 1032 st->res = st->caps->high_res_bits;1033 if (st->caps->low_res_bits &&1034 !of_property_read_string(node, "atmel,adc-use-res", (const char **)&s)1035 && !strcmp(s, "lowres"))1036 st->res = st->caps->low_res_bits;1037 1038 dev_info(&idev->dev, "Resolution used: %u bits\n", st->res);1039 1040 st->registers = &st->caps->registers;1041 st->num_channels = st->caps->num_channels;1042 1043 /* Check if touchscreen is supported. */1044 if (st->caps->has_ts) {1045 ret = at91_adc_probe_dt_ts(node, st, &idev->dev);1046 if (ret)1047 return ret;1048 }1049 1050 platform_set_drvdata(pdev, idev);1051 1052 idev->name = dev_name(&pdev->dev);1053 idev->modes = INDIO_DIRECT_MODE;1054 idev->info = &at91_adc_info;1055 1056 st->irq = platform_get_irq(pdev, 0);1057 if (st->irq < 0)1058 return -ENODEV;1059 1060 st->reg_base = devm_platform_ioremap_resource(pdev, 0);1061 if (IS_ERR(st->reg_base))1062 return PTR_ERR(st->reg_base);1063 1064 /*1065 * Disable all IRQs before setting up the handler1066 */1067 at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_SWRST);1068 at91_adc_writel(st, AT91_ADC_IDR, 0xFFFFFFFF);1069 1070 if (st->caps->has_tsmr)1071 ret = devm_request_irq(&pdev->dev, st->irq,1072 at91_adc_9x5_interrupt, 0,1073 pdev->dev.driver->name, idev);1074 else1075 ret = devm_request_irq(&pdev->dev, st->irq,1076 at91_adc_rl_interrupt, 0,1077 pdev->dev.driver->name, idev);1078 if (ret)1079 return dev_err_probe(&pdev->dev, ret,1080 "Failed to allocate IRQ.\n");1081 1082 st->clk = devm_clk_get_enabled(&pdev->dev, "adc_clk");1083 if (IS_ERR(st->clk))1084 return dev_err_probe(&pdev->dev, PTR_ERR(st->clk),1085 "Could not prepare or enable the clock.\n");1086 1087 st->adc_clk = devm_clk_get_enabled(&pdev->dev, "adc_op_clk");1088 if (IS_ERR(st->adc_clk))1089 return dev_err_probe(&pdev->dev, PTR_ERR(st->adc_clk),1090 "Could not prepare or enable the ADC clock.\n");1091 1092 /*1093 * Prescaler rate computation using the formula from the Atmel's1094 * datasheet : ADC Clock = MCK / ((Prescaler + 1) * 2), ADC Clock being1095 * specified by the electrical characteristics of the board.1096 */1097 mstrclk = clk_get_rate(st->clk);1098 adc_clk = clk_get_rate(st->adc_clk);1099 adc_clk_khz = adc_clk / 1000;1100 1101 dev_dbg(&pdev->dev, "Master clock is set as: %d Hz, adc_clk should set as: %d Hz\n",1102 mstrclk, adc_clk);1103 1104 prsc = (mstrclk / (2 * adc_clk)) - 1;1105 1106 if (!st->startup_time)1107 return dev_err_probe(&pdev->dev, -EINVAL,1108 "No startup time available.\n");1109 ticks = (*st->caps->calc_startup_ticks)(st->startup_time, adc_clk_khz);1110 1111 /*1112 * a minimal Sample and Hold Time is necessary for the ADC to guarantee1113 * the best converted final value between two channels selection1114 * The formula thus is : Sample and Hold Time = (shtim + 1) / ADCClock1115 */1116 if (st->sample_hold_time > 0)1117 shtim = round_up((st->sample_hold_time * adc_clk_khz / 1000)1118 - 1, 1);1119 else1120 shtim = 0;1121 1122 reg = AT91_ADC_PRESCAL_(prsc) & st->registers->mr_prescal_mask;1123 reg |= AT91_ADC_STARTUP_(ticks) & st->registers->mr_startup_mask;1124 if (st->res == st->caps->low_res_bits)1125 reg |= AT91_ADC_LOWRES;1126 if (st->sleep_mode)1127 reg |= AT91_ADC_SLEEP;1128 reg |= AT91_ADC_SHTIM_(shtim) & AT91_ADC_SHTIM;1129 at91_adc_writel(st, AT91_ADC_MR, reg);1130 1131 /* Setup the ADC channels available on the board */1132 ret = at91_adc_channel_init(idev);1133 if (ret < 0)1134 return dev_err_probe(&pdev->dev, ret,1135 "Couldn't initialize the channels.\n");1136 1137 init_waitqueue_head(&st->wq_data_avail);1138 mutex_init(&st->lock);1139 1140 /*1141 * Since touch screen will set trigger register as period trigger. So1142 * when touch screen is enabled, then we have to disable hardware1143 * trigger for classic adc.1144 */1145 if (!st->touchscreen_type) {1146 ret = at91_adc_buffer_init(idev);1147 if (ret < 0)1148 return dev_err_probe(&pdev->dev, ret,1149 "Couldn't initialize the buffer.\n");1150 1151 ret = at91_adc_trigger_init(idev);1152 if (ret < 0) {1153 dev_err(&pdev->dev, "Couldn't setup the triggers.\n");1154 at91_adc_buffer_remove(idev);1155 return ret;1156 }1157 } else {1158 ret = at91_ts_register(idev, pdev);1159 if (ret)1160 return ret;1161 1162 at91_ts_hw_init(idev, adc_clk_khz);1163 }1164 1165 ret = iio_device_register(idev);1166 if (ret < 0) {1167 dev_err(&pdev->dev, "Couldn't register the device.\n");1168 goto error_iio_device_register;1169 }1170 1171 return 0;1172 1173error_iio_device_register:1174 if (!st->touchscreen_type) {1175 at91_adc_trigger_remove(idev);1176 at91_adc_buffer_remove(idev);1177 } else {1178 at91_ts_unregister(st);1179 }1180 return ret;1181}1182 1183static void at91_adc_remove(struct platform_device *pdev)1184{1185 struct iio_dev *idev = platform_get_drvdata(pdev);1186 struct at91_adc_state *st = iio_priv(idev);1187 1188 iio_device_unregister(idev);1189 if (!st->touchscreen_type) {1190 at91_adc_trigger_remove(idev);1191 at91_adc_buffer_remove(idev);1192 } else {1193 at91_ts_unregister(st);1194 }1195}1196 1197static int at91_adc_suspend(struct device *dev)1198{1199 struct iio_dev *idev = dev_get_drvdata(dev);1200 struct at91_adc_state *st = iio_priv(idev);1201 1202 pinctrl_pm_select_sleep_state(dev);1203 clk_disable_unprepare(st->clk);1204 1205 return 0;1206}1207 1208static int at91_adc_resume(struct device *dev)1209{1210 struct iio_dev *idev = dev_get_drvdata(dev);1211 struct at91_adc_state *st = iio_priv(idev);1212 1213 clk_prepare_enable(st->clk);1214 pinctrl_pm_select_default_state(dev);1215 1216 return 0;1217}1218 1219static DEFINE_SIMPLE_DEV_PM_OPS(at91_adc_pm_ops, at91_adc_suspend,1220 at91_adc_resume);1221 1222static const struct at91_adc_trigger at91sam9260_triggers[] = {1223 { .name = "timer-counter-0", .value = 0x1 },1224 { .name = "timer-counter-1", .value = 0x3 },1225 { .name = "timer-counter-2", .value = 0x5 },1226 { .name = "external", .value = 0xd, .is_external = true },1227};1228 1229static struct at91_adc_caps at91sam9260_caps = {1230 .calc_startup_ticks = calc_startup_ticks_9260,1231 .num_channels = 4,1232 .low_res_bits = 8,1233 .high_res_bits = 10,1234 .registers = {1235 .channel_base = AT91_ADC_CHR(0),1236 .drdy_mask = AT91_ADC_DRDY,1237 .status_register = AT91_ADC_SR,1238 .trigger_register = AT91_ADC_TRGR_9260,1239 .mr_prescal_mask = AT91_ADC_PRESCAL_9260,1240 .mr_startup_mask = AT91_ADC_STARTUP_9260,1241 },1242 .triggers = at91sam9260_triggers,1243 .trigger_number = ARRAY_SIZE(at91sam9260_triggers),1244};1245 1246static const struct at91_adc_trigger at91sam9x5_triggers[] = {1247 { .name = "external-rising", .value = 0x1, .is_external = true },1248 { .name = "external-falling", .value = 0x2, .is_external = true },1249 { .name = "external-any", .value = 0x3, .is_external = true },1250 { .name = "continuous", .value = 0x6 },1251};1252 1253static struct at91_adc_caps at91sam9rl_caps = {1254 .has_ts = true,1255 .calc_startup_ticks = calc_startup_ticks_9260, /* same as 9260 */1256 .num_channels = 6,1257 .low_res_bits = 8,1258 .high_res_bits = 10,1259 .registers = {1260 .channel_base = AT91_ADC_CHR(0),1261 .drdy_mask = AT91_ADC_DRDY,1262 .status_register = AT91_ADC_SR,1263 .trigger_register = AT91_ADC_TRGR_9G45,1264 .mr_prescal_mask = AT91_ADC_PRESCAL_9260,1265 .mr_startup_mask = AT91_ADC_STARTUP_9G45,1266 },1267 .triggers = at91sam9x5_triggers,1268 .trigger_number = ARRAY_SIZE(at91sam9x5_triggers),1269};1270 1271static struct at91_adc_caps at91sam9g45_caps = {1272 .has_ts = true,1273 .calc_startup_ticks = calc_startup_ticks_9260, /* same as 9260 */1274 .num_channels = 8,1275 .low_res_bits = 8,1276 .high_res_bits = 10,1277 .registers = {1278 .channel_base = AT91_ADC_CHR(0),1279 .drdy_mask = AT91_ADC_DRDY,1280 .status_register = AT91_ADC_SR,1281 .trigger_register = AT91_ADC_TRGR_9G45,1282 .mr_prescal_mask = AT91_ADC_PRESCAL_9G45,1283 .mr_startup_mask = AT91_ADC_STARTUP_9G45,1284 },1285 .triggers = at91sam9x5_triggers,1286 .trigger_number = ARRAY_SIZE(at91sam9x5_triggers),1287};1288 1289static struct at91_adc_caps at91sam9x5_caps = {1290 .has_ts = true,1291 .has_tsmr = true,1292 .ts_filter_average = 3,1293 .ts_pen_detect_sensitivity = 2,1294 .calc_startup_ticks = calc_startup_ticks_9x5,1295 .num_channels = 12,1296 .low_res_bits = 8,1297 .high_res_bits = 10,1298 .registers = {1299 .channel_base = AT91_ADC_CDR0_9X5,1300 .drdy_mask = AT91_ADC_SR_DRDY_9X5,1301 .status_register = AT91_ADC_SR_9X5,1302 .trigger_register = AT91_ADC_TRGR_9X5,1303 /* prescal mask is same as 9G45 */1304 .mr_prescal_mask = AT91_ADC_PRESCAL_9G45,1305 .mr_startup_mask = AT91_ADC_STARTUP_9X5,1306 },1307 .triggers = at91sam9x5_triggers,1308 .trigger_number = ARRAY_SIZE(at91sam9x5_triggers),1309};1310 1311static struct at91_adc_caps sama5d3_caps = {1312 .has_ts = true,1313 .has_tsmr = true,1314 .ts_filter_average = 3,1315 .ts_pen_detect_sensitivity = 2,1316 .calc_startup_ticks = calc_startup_ticks_9x5,1317 .num_channels = 12,1318 .low_res_bits = 0,1319 .high_res_bits = 12,1320 .registers = {1321 .channel_base = AT91_ADC_CDR0_9X5,1322 .drdy_mask = AT91_ADC_SR_DRDY_9X5,1323 .status_register = AT91_ADC_SR_9X5,1324 .trigger_register = AT91_ADC_TRGR_9X5,1325 .mr_prescal_mask = AT91_ADC_PRESCAL_9G45,1326 .mr_startup_mask = AT91_ADC_STARTUP_9X5,1327 },1328 .triggers = at91sam9x5_triggers,1329 .trigger_number = ARRAY_SIZE(at91sam9x5_triggers),1330};1331 1332static const struct of_device_id at91_adc_dt_ids[] = {1333 { .compatible = "atmel,at91sam9260-adc", .data = &at91sam9260_caps },1334 { .compatible = "atmel,at91sam9rl-adc", .data = &at91sam9rl_caps },1335 { .compatible = "atmel,at91sam9g45-adc", .data = &at91sam9g45_caps },1336 { .compatible = "atmel,at91sam9x5-adc", .data = &at91sam9x5_caps },1337 { .compatible = "atmel,sama5d3-adc", .data = &sama5d3_caps },1338 { }1339};1340MODULE_DEVICE_TABLE(of, at91_adc_dt_ids);1341 1342static struct platform_driver at91_adc_driver = {1343 .probe = at91_adc_probe,1344 .remove_new = at91_adc_remove,1345 .driver = {1346 .name = DRIVER_NAME,1347 .of_match_table = at91_adc_dt_ids,1348 .pm = pm_sleep_ptr(&at91_adc_pm_ops),1349 },1350};1351 1352module_platform_driver(at91_adc_driver);1353 1354MODULE_LICENSE("GPL");1355MODULE_DESCRIPTION("Atmel AT91 ADC Driver");1356MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");1357