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1/*2 * Marvell Berlin2 ADC driver3 *4 * Copyright (C) 2015 Marvell Technology Group Ltd.5 *6 * Antoine Tenart <antoine.tenart@free-electrons.com>7 *8 * This file is licensed under the terms of the GNU General Public9 * License version 2. This program is licensed "as is" without any10 * warranty of any kind, whether express or implied.11 */12 13#include <linux/iio/iio.h>14#include <linux/iio/driver.h>15#include <linux/iio/machine.h>16#include <linux/interrupt.h>17#include <linux/kernel.h>18#include <linux/mod_devicetable.h>19#include <linux/module.h>20#include <linux/of.h>21#include <linux/platform_device.h>22#include <linux/slab.h>23#include <linux/mfd/syscon.h>24#include <linux/regmap.h>25#include <linux/sched.h>26#include <linux/wait.h>27 28#define BERLIN2_SM_CTRL 0x1429#define BERLIN2_SM_CTRL_SM_SOC_INT BIT(1)30#define BERLIN2_SM_CTRL_SOC_SM_INT BIT(2)31#define BERLIN2_SM_CTRL_ADC_SEL(x) ((x) << 5) /* 0-15 */32#define BERLIN2_SM_CTRL_ADC_SEL_MASK GENMASK(8, 5)33#define BERLIN2_SM_CTRL_ADC_POWER BIT(9)34#define BERLIN2_SM_CTRL_ADC_CLKSEL_DIV2 (0x0 << 10)35#define BERLIN2_SM_CTRL_ADC_CLKSEL_DIV3 (0x1 << 10)36#define BERLIN2_SM_CTRL_ADC_CLKSEL_DIV4 (0x2 << 10)37#define BERLIN2_SM_CTRL_ADC_CLKSEL_DIV8 (0x3 << 10)38#define BERLIN2_SM_CTRL_ADC_CLKSEL_MASK GENMASK(11, 10)39#define BERLIN2_SM_CTRL_ADC_START BIT(12)40#define BERLIN2_SM_CTRL_ADC_RESET BIT(13)41#define BERLIN2_SM_CTRL_ADC_BANDGAP_RDY BIT(14)42#define BERLIN2_SM_CTRL_ADC_CONT_SINGLE (0x0 << 15)43#define BERLIN2_SM_CTRL_ADC_CONT_CONTINUOUS (0x1 << 15)44#define BERLIN2_SM_CTRL_ADC_BUFFER_EN BIT(16)45#define BERLIN2_SM_CTRL_ADC_VREF_EXT (0x0 << 17)46#define BERLIN2_SM_CTRL_ADC_VREF_INT (0x1 << 17)47#define BERLIN2_SM_CTRL_ADC_ROTATE BIT(19)48#define BERLIN2_SM_CTRL_TSEN_EN BIT(20)49#define BERLIN2_SM_CTRL_TSEN_CLK_SEL_125 (0x0 << 21) /* 1.25 MHz */50#define BERLIN2_SM_CTRL_TSEN_CLK_SEL_250 (0x1 << 21) /* 2.5 MHz */51#define BERLIN2_SM_CTRL_TSEN_MODE_0_125 (0x0 << 22) /* 0-125 C */52#define BERLIN2_SM_CTRL_TSEN_MODE_10_50 (0x1 << 22) /* 10-50 C */53#define BERLIN2_SM_CTRL_TSEN_RESET BIT(29)54#define BERLIN2_SM_ADC_DATA 0x2055#define BERLIN2_SM_ADC_MASK GENMASK(9, 0)56#define BERLIN2_SM_ADC_STATUS 0x1c57#define BERLIN2_SM_ADC_STATUS_DATA_RDY(x) BIT(x) /* 0-15 */58#define BERLIN2_SM_ADC_STATUS_DATA_RDY_MASK GENMASK(15, 0)59#define BERLIN2_SM_ADC_STATUS_INT_EN(x) (BIT(x) << 16) /* 0-15 */60#define BERLIN2_SM_ADC_STATUS_INT_EN_MASK GENMASK(31, 16)61#define BERLIN2_SM_TSEN_STATUS 0x2462#define BERLIN2_SM_TSEN_STATUS_DATA_RDY BIT(0)63#define BERLIN2_SM_TSEN_STATUS_INT_EN BIT(1)64#define BERLIN2_SM_TSEN_DATA 0x2865#define BERLIN2_SM_TSEN_MASK GENMASK(9, 0)66#define BERLIN2_SM_TSEN_CTRL 0x7467#define BERLIN2_SM_TSEN_CTRL_START BIT(8)68#define BERLIN2_SM_TSEN_CTRL_SETTLING_4 (0x0 << 21) /* 4 us */69#define BERLIN2_SM_TSEN_CTRL_SETTLING_12 (0x1 << 21) /* 12 us */70#define BERLIN2_SM_TSEN_CTRL_SETTLING_MASK BIT(21)71#define BERLIN2_SM_TSEN_CTRL_TRIM(x) ((x) << 22)72#define BERLIN2_SM_TSEN_CTRL_TRIM_MASK GENMASK(25, 22)73 74struct berlin2_adc_priv {75 struct regmap *regmap;76 struct mutex lock;77 wait_queue_head_t wq;78 bool data_available;79 int data;80};81 82#define BERLIN2_ADC_CHANNEL(n, t) \83 { \84 .channel = n, \85 .datasheet_name = "channel"#n, \86 .type = t, \87 .indexed = 1, \88 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \89 }90 91static const struct iio_chan_spec berlin2_adc_channels[] = {92 BERLIN2_ADC_CHANNEL(0, IIO_VOLTAGE), /* external input */93 BERLIN2_ADC_CHANNEL(1, IIO_VOLTAGE), /* external input */94 BERLIN2_ADC_CHANNEL(2, IIO_VOLTAGE), /* external input */95 BERLIN2_ADC_CHANNEL(3, IIO_VOLTAGE), /* external input */96 BERLIN2_ADC_CHANNEL(4, IIO_VOLTAGE), /* reserved */97 BERLIN2_ADC_CHANNEL(5, IIO_VOLTAGE), /* reserved */98 { /* temperature sensor */99 .channel = 6,100 .datasheet_name = "channel6",101 .type = IIO_TEMP,102 .indexed = 0,103 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),104 },105 BERLIN2_ADC_CHANNEL(7, IIO_VOLTAGE), /* reserved */106 IIO_CHAN_SOFT_TIMESTAMP(8), /* timestamp */107};108 109static int berlin2_adc_read(struct iio_dev *indio_dev, int channel)110{111 struct berlin2_adc_priv *priv = iio_priv(indio_dev);112 int data, ret;113 114 mutex_lock(&priv->lock);115 116 /* Enable the interrupts */117 regmap_write(priv->regmap, BERLIN2_SM_ADC_STATUS,118 BERLIN2_SM_ADC_STATUS_INT_EN(channel));119 120 /* Configure the ADC */121 regmap_update_bits(priv->regmap, BERLIN2_SM_CTRL,122 BERLIN2_SM_CTRL_ADC_RESET |123 BERLIN2_SM_CTRL_ADC_SEL_MASK |124 BERLIN2_SM_CTRL_ADC_START,125 BERLIN2_SM_CTRL_ADC_SEL(channel) |126 BERLIN2_SM_CTRL_ADC_START);127 128 ret = wait_event_interruptible_timeout(priv->wq, priv->data_available,129 msecs_to_jiffies(1000));130 131 /* Disable the interrupts */132 regmap_clear_bits(priv->regmap, BERLIN2_SM_ADC_STATUS,133 BERLIN2_SM_ADC_STATUS_INT_EN(channel));134 135 if (ret == 0)136 ret = -ETIMEDOUT;137 if (ret < 0) {138 mutex_unlock(&priv->lock);139 return ret;140 }141 142 regmap_clear_bits(priv->regmap, BERLIN2_SM_CTRL,143 BERLIN2_SM_CTRL_ADC_START);144 145 data = priv->data;146 priv->data_available = false;147 148 mutex_unlock(&priv->lock);149 150 return data;151}152 153static int berlin2_adc_tsen_read(struct iio_dev *indio_dev)154{155 struct berlin2_adc_priv *priv = iio_priv(indio_dev);156 int data, ret;157 158 mutex_lock(&priv->lock);159 160 /* Enable interrupts */161 regmap_write(priv->regmap, BERLIN2_SM_TSEN_STATUS,162 BERLIN2_SM_TSEN_STATUS_INT_EN);163 164 /* Configure the ADC */165 regmap_update_bits(priv->regmap, BERLIN2_SM_CTRL,166 BERLIN2_SM_CTRL_TSEN_RESET |167 BERLIN2_SM_CTRL_ADC_ROTATE,168 BERLIN2_SM_CTRL_ADC_ROTATE);169 170 /* Configure the temperature sensor */171 regmap_update_bits(priv->regmap, BERLIN2_SM_TSEN_CTRL,172 BERLIN2_SM_TSEN_CTRL_TRIM_MASK |173 BERLIN2_SM_TSEN_CTRL_SETTLING_MASK |174 BERLIN2_SM_TSEN_CTRL_START,175 BERLIN2_SM_TSEN_CTRL_TRIM(3) |176 BERLIN2_SM_TSEN_CTRL_SETTLING_12 |177 BERLIN2_SM_TSEN_CTRL_START);178 179 ret = wait_event_interruptible_timeout(priv->wq, priv->data_available,180 msecs_to_jiffies(1000));181 182 /* Disable interrupts */183 regmap_clear_bits(priv->regmap, BERLIN2_SM_TSEN_STATUS,184 BERLIN2_SM_TSEN_STATUS_INT_EN);185 186 if (ret == 0)187 ret = -ETIMEDOUT;188 if (ret < 0) {189 mutex_unlock(&priv->lock);190 return ret;191 }192 193 regmap_clear_bits(priv->regmap, BERLIN2_SM_TSEN_CTRL,194 BERLIN2_SM_TSEN_CTRL_START);195 196 data = priv->data;197 priv->data_available = false;198 199 mutex_unlock(&priv->lock);200 201 return data;202}203 204static int berlin2_adc_read_raw(struct iio_dev *indio_dev,205 struct iio_chan_spec const *chan, int *val,206 int *val2, long mask)207{208 int temp;209 210 switch (mask) {211 case IIO_CHAN_INFO_RAW:212 if (chan->type != IIO_VOLTAGE)213 return -EINVAL;214 215 *val = berlin2_adc_read(indio_dev, chan->channel);216 if (*val < 0)217 return *val;218 219 return IIO_VAL_INT;220 case IIO_CHAN_INFO_PROCESSED:221 if (chan->type != IIO_TEMP)222 return -EINVAL;223 224 temp = berlin2_adc_tsen_read(indio_dev);225 if (temp < 0)226 return temp;227 228 if (temp > 2047)229 temp -= 4096;230 231 /* Convert to milli Celsius */232 *val = ((temp * 100000) / 264 - 270000);233 return IIO_VAL_INT;234 default:235 break;236 }237 238 return -EINVAL;239}240 241static irqreturn_t berlin2_adc_irq(int irq, void *private)242{243 struct berlin2_adc_priv *priv = iio_priv(private);244 unsigned val;245 246 regmap_read(priv->regmap, BERLIN2_SM_ADC_STATUS, &val);247 if (val & BERLIN2_SM_ADC_STATUS_DATA_RDY_MASK) {248 regmap_read(priv->regmap, BERLIN2_SM_ADC_DATA, &priv->data);249 priv->data &= BERLIN2_SM_ADC_MASK;250 251 val &= ~BERLIN2_SM_ADC_STATUS_DATA_RDY_MASK;252 regmap_write(priv->regmap, BERLIN2_SM_ADC_STATUS, val);253 254 priv->data_available = true;255 wake_up_interruptible(&priv->wq);256 }257 258 return IRQ_HANDLED;259}260 261static irqreturn_t berlin2_adc_tsen_irq(int irq, void *private)262{263 struct berlin2_adc_priv *priv = iio_priv(private);264 unsigned val;265 266 regmap_read(priv->regmap, BERLIN2_SM_TSEN_STATUS, &val);267 if (val & BERLIN2_SM_TSEN_STATUS_DATA_RDY) {268 regmap_read(priv->regmap, BERLIN2_SM_TSEN_DATA, &priv->data);269 priv->data &= BERLIN2_SM_TSEN_MASK;270 271 val &= ~BERLIN2_SM_TSEN_STATUS_DATA_RDY;272 regmap_write(priv->regmap, BERLIN2_SM_TSEN_STATUS, val);273 274 priv->data_available = true;275 wake_up_interruptible(&priv->wq);276 }277 278 return IRQ_HANDLED;279}280 281static const struct iio_info berlin2_adc_info = {282 .read_raw = berlin2_adc_read_raw,283};284 285static void berlin2_adc_powerdown(void *regmap)286{287 regmap_clear_bits(regmap, BERLIN2_SM_CTRL, BERLIN2_SM_CTRL_ADC_POWER);288 289}290 291static int berlin2_adc_probe(struct platform_device *pdev)292{293 struct iio_dev *indio_dev;294 struct berlin2_adc_priv *priv;295 struct device_node *parent_np = of_get_parent(pdev->dev.of_node);296 int irq, tsen_irq;297 int ret;298 299 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*priv));300 if (!indio_dev) {301 of_node_put(parent_np);302 return -ENOMEM;303 }304 305 priv = iio_priv(indio_dev);306 307 priv->regmap = syscon_node_to_regmap(parent_np);308 of_node_put(parent_np);309 if (IS_ERR(priv->regmap))310 return PTR_ERR(priv->regmap);311 312 irq = platform_get_irq_byname(pdev, "adc");313 if (irq < 0)314 return irq;315 316 tsen_irq = platform_get_irq_byname(pdev, "tsen");317 if (tsen_irq < 0)318 return tsen_irq;319 320 ret = devm_request_irq(&pdev->dev, irq, berlin2_adc_irq, 0,321 pdev->dev.driver->name, indio_dev);322 if (ret)323 return ret;324 325 ret = devm_request_irq(&pdev->dev, tsen_irq, berlin2_adc_tsen_irq,326 0, pdev->dev.driver->name, indio_dev);327 if (ret)328 return ret;329 330 init_waitqueue_head(&priv->wq);331 mutex_init(&priv->lock);332 333 indio_dev->name = dev_name(&pdev->dev);334 indio_dev->modes = INDIO_DIRECT_MODE;335 indio_dev->info = &berlin2_adc_info;336 337 indio_dev->channels = berlin2_adc_channels;338 indio_dev->num_channels = ARRAY_SIZE(berlin2_adc_channels);339 340 /* Power up the ADC */341 regmap_set_bits(priv->regmap, BERLIN2_SM_CTRL,342 BERLIN2_SM_CTRL_ADC_POWER);343 344 ret = devm_add_action_or_reset(&pdev->dev, berlin2_adc_powerdown,345 priv->regmap);346 if (ret)347 return ret;348 349 return devm_iio_device_register(&pdev->dev, indio_dev);350}351 352static const struct of_device_id berlin2_adc_match[] = {353 { .compatible = "marvell,berlin2-adc", },354 { }355};356MODULE_DEVICE_TABLE(of, berlin2_adc_match);357 358static struct platform_driver berlin2_adc_driver = {359 .driver = {360 .name = "berlin2-adc",361 .of_match_table = berlin2_adc_match,362 },363 .probe = berlin2_adc_probe,364};365module_platform_driver(berlin2_adc_driver);366 367MODULE_AUTHOR("Antoine Tenart <antoine.tenart@free-electrons.com>");368MODULE_DESCRIPTION("Marvell Berlin2 ADC driver");369MODULE_LICENSE("GPL v2");370