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1// SPDX-License-Identifier: GPL-2.02 3#include <linux/bits.h>4#include <linux/delay.h>5#include <linux/irq.h>6#include <linux/kernel.h>7#include <linux/ktime.h>8#include <linux/mod_devicetable.h>9#include <linux/module.h>10#include <linux/mutex.h>11#include <linux/platform_device.h>12#include <linux/regmap.h>13 14#include <linux/iio/buffer.h>15#include <linux/iio/iio.h>16#include <linux/iio/trigger_consumer.h>17#include <linux/iio/triggered_buffer.h>18 19#include <linux/unaligned.h>20 21#define MT6360_REG_PMUCHGCTRL3 0x31322#define MT6360_REG_PMUADCCFG 0x35623#define MT6360_REG_PMUADCIDLET 0x35824#define MT6360_REG_PMUADCRPT1 0x35A25 26/* PMUCHGCTRL3 0x313 */27#define MT6360_AICR_MASK GENMASK(7, 2)28#define MT6360_AICR_SHFT 229#define MT6360_AICR_400MA 0x630/* PMUADCCFG 0x356 */31#define MT6360_ADCEN_MASK BIT(15)32/* PMUADCRPT1 0x35A */33#define MT6360_PREFERCH_MASK GENMASK(7, 4)34#define MT6360_PREFERCH_SHFT 435#define MT6360_RPTCH_MASK GENMASK(3, 0)36#define MT6360_NO_PREFER 1537 38/* Time in ms */39#define ADC_WAIT_TIME_MS 2540#define ADC_CONV_TIMEOUT_MS 10041#define ADC_LOOP_TIME_US 200042 43enum {44 MT6360_CHAN_USBID = 0,45 MT6360_CHAN_VBUSDIV5,46 MT6360_CHAN_VBUSDIV2,47 MT6360_CHAN_VSYS,48 MT6360_CHAN_VBAT,49 MT6360_CHAN_IBUS,50 MT6360_CHAN_IBAT,51 MT6360_CHAN_CHG_VDDP,52 MT6360_CHAN_TEMP_JC,53 MT6360_CHAN_VREF_TS,54 MT6360_CHAN_TS,55 MT6360_CHAN_MAX56};57 58struct mt6360_adc_data {59 struct device *dev;60 struct regmap *regmap;61 /* Due to only one set of ADC control, this lock is used to prevent the race condition */62 struct mutex adc_lock;63 ktime_t last_off_timestamps[MT6360_CHAN_MAX];64};65 66static int mt6360_adc_read_channel(struct mt6360_adc_data *mad, int channel, int *val)67{68 __be16 adc_enable;69 u8 rpt[3];70 ktime_t predict_end_t, timeout;71 unsigned int pre_wait_time;72 int ret;73 74 mutex_lock(&mad->adc_lock);75 76 /* Select the preferred ADC channel */77 ret = regmap_update_bits(mad->regmap, MT6360_REG_PMUADCRPT1, MT6360_PREFERCH_MASK,78 channel << MT6360_PREFERCH_SHFT);79 if (ret)80 goto out_adc_lock;81 82 adc_enable = cpu_to_be16(MT6360_ADCEN_MASK | BIT(channel));83 ret = regmap_raw_write(mad->regmap, MT6360_REG_PMUADCCFG, &adc_enable, sizeof(adc_enable));84 if (ret)85 goto out_adc_lock;86 87 predict_end_t = ktime_add_ms(mad->last_off_timestamps[channel], 2 * ADC_WAIT_TIME_MS);88 89 if (ktime_after(ktime_get(), predict_end_t))90 pre_wait_time = ADC_WAIT_TIME_MS;91 else92 pre_wait_time = 3 * ADC_WAIT_TIME_MS;93 94 if (msleep_interruptible(pre_wait_time)) {95 ret = -ERESTARTSYS;96 goto out_adc_conv;97 }98 99 timeout = ktime_add_ms(ktime_get(), ADC_CONV_TIMEOUT_MS);100 while (true) {101 ret = regmap_raw_read(mad->regmap, MT6360_REG_PMUADCRPT1, rpt, sizeof(rpt));102 if (ret)103 goto out_adc_conv;104 105 /*106 * There are two functions, ZCV and TypeC OTP, running ADC VBAT and TS in107 * background, and ADC samples are taken on a fixed frequency no matter read the108 * previous one or not.109 * To avoid conflict, We set minimum time threshold after enable ADC and110 * check report channel is the same.111 * The worst case is run the same ADC twice and background function is also running,112 * ADC conversion sequence is desire channel before start ADC, background ADC,113 * desire channel after start ADC.114 * So the minimum correct data is three times of typical conversion time.115 */116 if ((rpt[0] & MT6360_RPTCH_MASK) == channel)117 break;118 119 if (ktime_compare(ktime_get(), timeout) > 0) {120 ret = -ETIMEDOUT;121 goto out_adc_conv;122 }123 124 usleep_range(ADC_LOOP_TIME_US / 2, ADC_LOOP_TIME_US);125 }126 127 *val = rpt[1] << 8 | rpt[2];128 ret = IIO_VAL_INT;129 130out_adc_conv:131 /* Only keep ADC enable */132 adc_enable = cpu_to_be16(MT6360_ADCEN_MASK);133 regmap_raw_write(mad->regmap, MT6360_REG_PMUADCCFG, &adc_enable, sizeof(adc_enable));134 mad->last_off_timestamps[channel] = ktime_get();135 /* Config prefer channel to NO_PREFER */136 regmap_update_bits(mad->regmap, MT6360_REG_PMUADCRPT1, MT6360_PREFERCH_MASK,137 MT6360_NO_PREFER << MT6360_PREFERCH_SHFT);138out_adc_lock:139 mutex_unlock(&mad->adc_lock);140 141 return ret;142}143 144static int mt6360_adc_read_scale(struct mt6360_adc_data *mad, int channel, int *val, int *val2)145{146 unsigned int regval;147 int ret;148 149 switch (channel) {150 case MT6360_CHAN_USBID:151 case MT6360_CHAN_VSYS:152 case MT6360_CHAN_VBAT:153 case MT6360_CHAN_CHG_VDDP:154 case MT6360_CHAN_VREF_TS:155 case MT6360_CHAN_TS:156 *val = 1250;157 return IIO_VAL_INT;158 case MT6360_CHAN_VBUSDIV5:159 *val = 6250;160 return IIO_VAL_INT;161 case MT6360_CHAN_VBUSDIV2:162 case MT6360_CHAN_IBUS:163 case MT6360_CHAN_IBAT:164 *val = 2500;165 166 if (channel == MT6360_CHAN_IBUS) {167 /* IBUS will be affected by input current limit for the different Ron */168 /* Check whether the config is <400mA or not */169 ret = regmap_read(mad->regmap, MT6360_REG_PMUCHGCTRL3, ®val);170 if (ret)171 return ret;172 173 regval = (regval & MT6360_AICR_MASK) >> MT6360_AICR_SHFT;174 if (regval < MT6360_AICR_400MA)175 *val = 1900;176 }177 178 return IIO_VAL_INT;179 case MT6360_CHAN_TEMP_JC:180 *val = 105;181 *val2 = 100;182 return IIO_VAL_FRACTIONAL;183 }184 185 return -EINVAL;186}187 188static int mt6360_adc_read_offset(struct mt6360_adc_data *mad, int channel, int *val)189{190 *val = (channel == MT6360_CHAN_TEMP_JC) ? -80 : 0;191 return IIO_VAL_INT;192}193 194static int mt6360_adc_read_raw(struct iio_dev *iio_dev, const struct iio_chan_spec *chan,195 int *val, int *val2, long mask)196{197 struct mt6360_adc_data *mad = iio_priv(iio_dev);198 199 switch (mask) {200 case IIO_CHAN_INFO_RAW:201 return mt6360_adc_read_channel(mad, chan->channel, val);202 case IIO_CHAN_INFO_SCALE:203 return mt6360_adc_read_scale(mad, chan->channel, val, val2);204 case IIO_CHAN_INFO_OFFSET:205 return mt6360_adc_read_offset(mad, chan->channel, val);206 }207 208 return -EINVAL;209}210 211static const char *mt6360_channel_labels[MT6360_CHAN_MAX] = {212 "usbid", "vbusdiv5", "vbusdiv2", "vsys", "vbat", "ibus", "ibat", "chg_vddp",213 "temp_jc", "vref_ts", "ts",214};215 216static int mt6360_adc_read_label(struct iio_dev *iio_dev, const struct iio_chan_spec *chan,217 char *label)218{219 return snprintf(label, PAGE_SIZE, "%s\n", mt6360_channel_labels[chan->channel]);220}221 222static const struct iio_info mt6360_adc_iio_info = {223 .read_raw = mt6360_adc_read_raw,224 .read_label = mt6360_adc_read_label,225};226 227#define MT6360_ADC_CHAN(_idx, _type) { \228 .type = _type, \229 .channel = MT6360_CHAN_##_idx, \230 .scan_index = MT6360_CHAN_##_idx, \231 .datasheet_name = #_idx, \232 .scan_type = { \233 .sign = 'u', \234 .realbits = 16, \235 .storagebits = 16, \236 .endianness = IIO_CPU, \237 }, \238 .indexed = 1, \239 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \240 BIT(IIO_CHAN_INFO_SCALE) | \241 BIT(IIO_CHAN_INFO_OFFSET), \242}243 244static const struct iio_chan_spec mt6360_adc_channels[] = {245 MT6360_ADC_CHAN(USBID, IIO_VOLTAGE),246 MT6360_ADC_CHAN(VBUSDIV5, IIO_VOLTAGE),247 MT6360_ADC_CHAN(VBUSDIV2, IIO_VOLTAGE),248 MT6360_ADC_CHAN(VSYS, IIO_VOLTAGE),249 MT6360_ADC_CHAN(VBAT, IIO_VOLTAGE),250 MT6360_ADC_CHAN(IBUS, IIO_CURRENT),251 MT6360_ADC_CHAN(IBAT, IIO_CURRENT),252 MT6360_ADC_CHAN(CHG_VDDP, IIO_VOLTAGE),253 MT6360_ADC_CHAN(TEMP_JC, IIO_TEMP),254 MT6360_ADC_CHAN(VREF_TS, IIO_VOLTAGE),255 MT6360_ADC_CHAN(TS, IIO_VOLTAGE),256 IIO_CHAN_SOFT_TIMESTAMP(MT6360_CHAN_MAX),257};258 259static irqreturn_t mt6360_adc_trigger_handler(int irq, void *p)260{261 struct iio_poll_func *pf = p;262 struct iio_dev *indio_dev = pf->indio_dev;263 struct mt6360_adc_data *mad = iio_priv(indio_dev);264 struct {265 u16 values[MT6360_CHAN_MAX];266 int64_t timestamp;267 } data __aligned(8);268 int i = 0, bit, val, ret;269 270 memset(&data, 0, sizeof(data));271 iio_for_each_active_channel(indio_dev, bit) {272 ret = mt6360_adc_read_channel(mad, bit, &val);273 if (ret < 0) {274 dev_warn(&indio_dev->dev, "Failed to get channel %d conversion val\n", bit);275 goto out;276 }277 278 data.values[i++] = val;279 }280 iio_push_to_buffers_with_timestamp(indio_dev, &data, iio_get_time_ns(indio_dev));281out:282 iio_trigger_notify_done(indio_dev->trig);283 284 return IRQ_HANDLED;285}286 287static inline int mt6360_adc_reset(struct mt6360_adc_data *info)288{289 __be16 adc_enable;290 ktime_t all_off_time;291 int i, ret;292 293 /* Clear ADC idle wait time to 0 */294 ret = regmap_write(info->regmap, MT6360_REG_PMUADCIDLET, 0);295 if (ret)296 return ret;297 298 /* Only keep ADC enable, but keep all channels off */299 adc_enable = cpu_to_be16(MT6360_ADCEN_MASK);300 ret = regmap_raw_write(info->regmap, MT6360_REG_PMUADCCFG, &adc_enable, sizeof(adc_enable));301 if (ret)302 return ret;303 304 /* Reset all channel off time to the current one */305 all_off_time = ktime_get();306 for (i = 0; i < MT6360_CHAN_MAX; i++)307 info->last_off_timestamps[i] = all_off_time;308 309 return 0;310}311 312static int mt6360_adc_probe(struct platform_device *pdev)313{314 struct mt6360_adc_data *mad;315 struct regmap *regmap;316 struct iio_dev *indio_dev;317 int ret;318 319 regmap = dev_get_regmap(pdev->dev.parent, NULL);320 if (!regmap) {321 dev_err(&pdev->dev, "Failed to get parent regmap\n");322 return -ENODEV;323 }324 325 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*mad));326 if (!indio_dev)327 return -ENOMEM;328 329 mad = iio_priv(indio_dev);330 mad->dev = &pdev->dev;331 mad->regmap = regmap;332 mutex_init(&mad->adc_lock);333 334 ret = mt6360_adc_reset(mad);335 if (ret < 0) {336 dev_err(&pdev->dev, "Failed to reset adc\n");337 return ret;338 }339 340 indio_dev->name = dev_name(&pdev->dev);341 indio_dev->info = &mt6360_adc_iio_info;342 indio_dev->modes = INDIO_DIRECT_MODE;343 indio_dev->channels = mt6360_adc_channels;344 indio_dev->num_channels = ARRAY_SIZE(mt6360_adc_channels);345 346 ret = devm_iio_triggered_buffer_setup(&pdev->dev, indio_dev, NULL,347 mt6360_adc_trigger_handler, NULL);348 if (ret) {349 dev_err(&pdev->dev, "Failed to allocate iio trigger buffer\n");350 return ret;351 }352 353 return devm_iio_device_register(&pdev->dev, indio_dev);354}355 356static const struct of_device_id mt6360_adc_of_id[] = {357 { .compatible = "mediatek,mt6360-adc", },358 { }359};360MODULE_DEVICE_TABLE(of, mt6360_adc_of_id);361 362static struct platform_driver mt6360_adc_driver = {363 .driver = {364 .name = "mt6360-adc",365 .of_match_table = mt6360_adc_of_id,366 },367 .probe = mt6360_adc_probe,368};369module_platform_driver(mt6360_adc_driver);370 371MODULE_AUTHOR("Gene Chen <gene_chen@richtek.com>");372MODULE_DESCRIPTION("MT6360 ADC Driver");373MODULE_LICENSE("GPL v2");374