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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * opt3001.c - Texas Instruments OPT3001 Light Sensor4 *5 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com6 *7 * Author: Andreas Dannenberg <dannenberg@ti.com>8 * Based on previous work from: Felipe Balbi <balbi@ti.com>9 */10 11#include <linux/bitops.h>12#include <linux/delay.h>13#include <linux/device.h>14#include <linux/i2c.h>15#include <linux/interrupt.h>16#include <linux/irq.h>17#include <linux/kernel.h>18#include <linux/module.h>19#include <linux/mod_devicetable.h>20#include <linux/mutex.h>21#include <linux/slab.h>22#include <linux/types.h>23 24#include <linux/iio/events.h>25#include <linux/iio/iio.h>26#include <linux/iio/sysfs.h>27 28#define OPT3001_RESULT		0x0029#define OPT3001_CONFIGURATION	0x0130#define OPT3001_LOW_LIMIT	0x0231#define OPT3001_HIGH_LIMIT	0x0332#define OPT3001_MANUFACTURER_ID	0x7e33#define OPT3001_DEVICE_ID	0x7f34 35#define OPT3001_CONFIGURATION_RN_MASK	(0xf << 12)36#define OPT3001_CONFIGURATION_RN_AUTO	(0xc << 12)37 38#define OPT3001_CONFIGURATION_CT	BIT(11)39 40#define OPT3001_CONFIGURATION_M_MASK	(3 << 9)41#define OPT3001_CONFIGURATION_M_SHUTDOWN (0 << 9)42#define OPT3001_CONFIGURATION_M_SINGLE	(1 << 9)43#define OPT3001_CONFIGURATION_M_CONTINUOUS (2 << 9) /* also 3 << 9 */44 45#define OPT3001_CONFIGURATION_OVF	BIT(8)46#define OPT3001_CONFIGURATION_CRF	BIT(7)47#define OPT3001_CONFIGURATION_FH	BIT(6)48#define OPT3001_CONFIGURATION_FL	BIT(5)49#define OPT3001_CONFIGURATION_L		BIT(4)50#define OPT3001_CONFIGURATION_POL	BIT(3)51#define OPT3001_CONFIGURATION_ME	BIT(2)52 53#define OPT3001_CONFIGURATION_FC_MASK	(3 << 0)54 55/* The end-of-conversion enable is located in the low-limit register */56#define OPT3001_LOW_LIMIT_EOC_ENABLE	0xc00057 58#define OPT3001_REG_EXPONENT(n)		((n) >> 12)59#define OPT3001_REG_MANTISSA(n)		((n) & 0xfff)60 61#define OPT3001_INT_TIME_LONG		80000062#define OPT3001_INT_TIME_SHORT		10000063 64/*65 * Time to wait for conversion result to be ready. The device datasheet66 * sect. 6.5 states results are ready after total integration time plus 3ms.67 * This results in worst-case max values of 113ms or 883ms, respectively.68 * Add some slack to be on the safe side.69 */70#define OPT3001_RESULT_READY_SHORT	15071#define OPT3001_RESULT_READY_LONG	100072 73struct opt3001 {74	struct i2c_client	*client;75	struct device		*dev;76 77	struct mutex		lock;78	bool			ok_to_ignore_lock;79	bool			result_ready;80	wait_queue_head_t	result_ready_queue;81	u16			result;82 83	u32			int_time;84	u32			mode;85 86	u16			high_thresh_mantissa;87	u16			low_thresh_mantissa;88 89	u8			high_thresh_exp;90	u8			low_thresh_exp;91 92	bool			use_irq;93};94 95struct opt3001_scale {96	int	val;97	int	val2;98};99 100static const struct opt3001_scale opt3001_scales[] = {101	{102		.val = 40,103		.val2 = 950000,104	},105	{106		.val = 81,107		.val2 = 900000,108	},109	{110		.val = 163,111		.val2 = 800000,112	},113	{114		.val = 327,115		.val2 = 600000,116	},117	{118		.val = 655,119		.val2 = 200000,120	},121	{122		.val = 1310,123		.val2 = 400000,124	},125	{126		.val = 2620,127		.val2 = 800000,128	},129	{130		.val = 5241,131		.val2 = 600000,132	},133	{134		.val = 10483,135		.val2 = 200000,136	},137	{138		.val = 20966,139		.val2 = 400000,140	},141	{142		.val = 41932,143		.val2 = 800000,144	},145	{146		.val = 83865,147		.val2 = 600000,148	},149};150 151static int opt3001_find_scale(const struct opt3001 *opt, int val,152		int val2, u8 *exponent)153{154	int i;155 156	for (i = 0; i < ARRAY_SIZE(opt3001_scales); i++) {157		const struct opt3001_scale *scale = &opt3001_scales[i];158 159		/*160		 * Combine the integer and micro parts for comparison161		 * purposes. Use milli lux precision to avoid 32-bit integer162		 * overflows.163		 */164		if ((val * 1000 + val2 / 1000) <=165				(scale->val * 1000 + scale->val2 / 1000)) {166			*exponent = i;167			return 0;168		}169	}170 171	return -EINVAL;172}173 174static void opt3001_to_iio_ret(struct opt3001 *opt, u8 exponent,175		u16 mantissa, int *val, int *val2)176{177	int lux;178 179	lux = 10 * (mantissa << exponent);180	*val = lux / 1000;181	*val2 = (lux - (*val * 1000)) * 1000;182}183 184static void opt3001_set_mode(struct opt3001 *opt, u16 *reg, u16 mode)185{186	*reg &= ~OPT3001_CONFIGURATION_M_MASK;187	*reg |= mode;188	opt->mode = mode;189}190 191static IIO_CONST_ATTR_INT_TIME_AVAIL("0.1 0.8");192 193static struct attribute *opt3001_attributes[] = {194	&iio_const_attr_integration_time_available.dev_attr.attr,195	NULL196};197 198static const struct attribute_group opt3001_attribute_group = {199	.attrs = opt3001_attributes,200};201 202static const struct iio_event_spec opt3001_event_spec[] = {203	{204		.type = IIO_EV_TYPE_THRESH,205		.dir = IIO_EV_DIR_RISING,206		.mask_separate = BIT(IIO_EV_INFO_VALUE) |207			BIT(IIO_EV_INFO_ENABLE),208	},209	{210		.type = IIO_EV_TYPE_THRESH,211		.dir = IIO_EV_DIR_FALLING,212		.mask_separate = BIT(IIO_EV_INFO_VALUE) |213			BIT(IIO_EV_INFO_ENABLE),214	},215};216 217static const struct iio_chan_spec opt3001_channels[] = {218	{219		.type = IIO_LIGHT,220		.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |221				BIT(IIO_CHAN_INFO_INT_TIME),222		.event_spec = opt3001_event_spec,223		.num_event_specs = ARRAY_SIZE(opt3001_event_spec),224	},225	IIO_CHAN_SOFT_TIMESTAMP(1),226};227 228static int opt3001_get_lux(struct opt3001 *opt, int *val, int *val2)229{230	int ret;231	u16 mantissa;232	u16 reg;233	u8 exponent;234	u16 value;235	long timeout;236 237	if (opt->use_irq) {238		/*239		 * Enable the end-of-conversion interrupt mechanism. Note that240		 * doing so will overwrite the low-level limit value however we241		 * will restore this value later on.242		 */243		ret = i2c_smbus_write_word_swapped(opt->client,244					OPT3001_LOW_LIMIT,245					OPT3001_LOW_LIMIT_EOC_ENABLE);246		if (ret < 0) {247			dev_err(opt->dev, "failed to write register %02x\n",248					OPT3001_LOW_LIMIT);249			return ret;250		}251 252		/* Allow IRQ to access the device despite lock being set */253		opt->ok_to_ignore_lock = true;254	}255 256	/* Reset data-ready indicator flag */257	opt->result_ready = false;258 259	/* Configure for single-conversion mode and start a new conversion */260	ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);261	if (ret < 0) {262		dev_err(opt->dev, "failed to read register %02x\n",263				OPT3001_CONFIGURATION);264		goto err;265	}266 267	reg = ret;268	opt3001_set_mode(opt, &reg, OPT3001_CONFIGURATION_M_SINGLE);269 270	ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,271			reg);272	if (ret < 0) {273		dev_err(opt->dev, "failed to write register %02x\n",274				OPT3001_CONFIGURATION);275		goto err;276	}277 278	if (opt->use_irq) {279		/* Wait for the IRQ to indicate the conversion is complete */280		ret = wait_event_timeout(opt->result_ready_queue,281				opt->result_ready,282				msecs_to_jiffies(OPT3001_RESULT_READY_LONG));283		if (ret == 0)284			return -ETIMEDOUT;285	} else {286		/* Sleep for result ready time */287		timeout = (opt->int_time == OPT3001_INT_TIME_SHORT) ?288			OPT3001_RESULT_READY_SHORT : OPT3001_RESULT_READY_LONG;289		msleep(timeout);290 291		/* Check result ready flag */292		ret = i2c_smbus_read_word_swapped(opt->client,293						  OPT3001_CONFIGURATION);294		if (ret < 0) {295			dev_err(opt->dev, "failed to read register %02x\n",296				OPT3001_CONFIGURATION);297			goto err;298		}299 300		if (!(ret & OPT3001_CONFIGURATION_CRF)) {301			ret = -ETIMEDOUT;302			goto err;303		}304 305		/* Obtain value */306		ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT);307		if (ret < 0) {308			dev_err(opt->dev, "failed to read register %02x\n",309				OPT3001_RESULT);310			goto err;311		}312		opt->result = ret;313		opt->result_ready = true;314	}315 316err:317	if (opt->use_irq)318		/* Disallow IRQ to access the device while lock is active */319		opt->ok_to_ignore_lock = false;320 321	if (ret < 0)322		return ret;323 324	if (opt->use_irq) {325		/*326		 * Disable the end-of-conversion interrupt mechanism by327		 * restoring the low-level limit value (clearing328		 * OPT3001_LOW_LIMIT_EOC_ENABLE). Note that selectively clearing329		 * those enable bits would affect the actual limit value due to330		 * bit-overlap and therefore can't be done.331		 */332		value = (opt->low_thresh_exp << 12) | opt->low_thresh_mantissa;333		ret = i2c_smbus_write_word_swapped(opt->client,334						   OPT3001_LOW_LIMIT,335						   value);336		if (ret < 0) {337			dev_err(opt->dev, "failed to write register %02x\n",338					OPT3001_LOW_LIMIT);339			return ret;340		}341	}342 343	exponent = OPT3001_REG_EXPONENT(opt->result);344	mantissa = OPT3001_REG_MANTISSA(opt->result);345 346	opt3001_to_iio_ret(opt, exponent, mantissa, val, val2);347 348	return IIO_VAL_INT_PLUS_MICRO;349}350 351static int opt3001_get_int_time(struct opt3001 *opt, int *val, int *val2)352{353	*val = 0;354	*val2 = opt->int_time;355 356	return IIO_VAL_INT_PLUS_MICRO;357}358 359static int opt3001_set_int_time(struct opt3001 *opt, int time)360{361	int ret;362	u16 reg;363 364	ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);365	if (ret < 0) {366		dev_err(opt->dev, "failed to read register %02x\n",367				OPT3001_CONFIGURATION);368		return ret;369	}370 371	reg = ret;372 373	switch (time) {374	case OPT3001_INT_TIME_SHORT:375		reg &= ~OPT3001_CONFIGURATION_CT;376		opt->int_time = OPT3001_INT_TIME_SHORT;377		break;378	case OPT3001_INT_TIME_LONG:379		reg |= OPT3001_CONFIGURATION_CT;380		opt->int_time = OPT3001_INT_TIME_LONG;381		break;382	default:383		return -EINVAL;384	}385 386	return i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,387			reg);388}389 390static int opt3001_read_raw(struct iio_dev *iio,391		struct iio_chan_spec const *chan, int *val, int *val2,392		long mask)393{394	struct opt3001 *opt = iio_priv(iio);395	int ret;396 397	if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)398		return -EBUSY;399 400	if (chan->type != IIO_LIGHT)401		return -EINVAL;402 403	mutex_lock(&opt->lock);404 405	switch (mask) {406	case IIO_CHAN_INFO_PROCESSED:407		ret = opt3001_get_lux(opt, val, val2);408		break;409	case IIO_CHAN_INFO_INT_TIME:410		ret = opt3001_get_int_time(opt, val, val2);411		break;412	default:413		ret = -EINVAL;414	}415 416	mutex_unlock(&opt->lock);417 418	return ret;419}420 421static int opt3001_write_raw(struct iio_dev *iio,422		struct iio_chan_spec const *chan, int val, int val2,423		long mask)424{425	struct opt3001 *opt = iio_priv(iio);426	int ret;427 428	if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)429		return -EBUSY;430 431	if (chan->type != IIO_LIGHT)432		return -EINVAL;433 434	if (mask != IIO_CHAN_INFO_INT_TIME)435		return -EINVAL;436 437	if (val != 0)438		return -EINVAL;439 440	mutex_lock(&opt->lock);441	ret = opt3001_set_int_time(opt, val2);442	mutex_unlock(&opt->lock);443 444	return ret;445}446 447static int opt3001_read_event_value(struct iio_dev *iio,448		const struct iio_chan_spec *chan, enum iio_event_type type,449		enum iio_event_direction dir, enum iio_event_info info,450		int *val, int *val2)451{452	struct opt3001 *opt = iio_priv(iio);453	int ret = IIO_VAL_INT_PLUS_MICRO;454 455	mutex_lock(&opt->lock);456 457	switch (dir) {458	case IIO_EV_DIR_RISING:459		opt3001_to_iio_ret(opt, opt->high_thresh_exp,460				opt->high_thresh_mantissa, val, val2);461		break;462	case IIO_EV_DIR_FALLING:463		opt3001_to_iio_ret(opt, opt->low_thresh_exp,464				opt->low_thresh_mantissa, val, val2);465		break;466	default:467		ret = -EINVAL;468	}469 470	mutex_unlock(&opt->lock);471 472	return ret;473}474 475static int opt3001_write_event_value(struct iio_dev *iio,476		const struct iio_chan_spec *chan, enum iio_event_type type,477		enum iio_event_direction dir, enum iio_event_info info,478		int val, int val2)479{480	struct opt3001 *opt = iio_priv(iio);481	int ret;482 483	u16 mantissa;484	u16 value;485	u16 reg;486 487	u8 exponent;488 489	if (val < 0)490		return -EINVAL;491 492	mutex_lock(&opt->lock);493 494	ret = opt3001_find_scale(opt, val, val2, &exponent);495	if (ret < 0) {496		dev_err(opt->dev, "can't find scale for %d.%06u\n", val, val2);497		goto err;498	}499 500	mantissa = (((val * 1000) + (val2 / 1000)) / 10) >> exponent;501	value = (exponent << 12) | mantissa;502 503	switch (dir) {504	case IIO_EV_DIR_RISING:505		reg = OPT3001_HIGH_LIMIT;506		opt->high_thresh_mantissa = mantissa;507		opt->high_thresh_exp = exponent;508		break;509	case IIO_EV_DIR_FALLING:510		reg = OPT3001_LOW_LIMIT;511		opt->low_thresh_mantissa = mantissa;512		opt->low_thresh_exp = exponent;513		break;514	default:515		ret = -EINVAL;516		goto err;517	}518 519	ret = i2c_smbus_write_word_swapped(opt->client, reg, value);520	if (ret < 0) {521		dev_err(opt->dev, "failed to write register %02x\n", reg);522		goto err;523	}524 525err:526	mutex_unlock(&opt->lock);527 528	return ret;529}530 531static int opt3001_read_event_config(struct iio_dev *iio,532		const struct iio_chan_spec *chan, enum iio_event_type type,533		enum iio_event_direction dir)534{535	struct opt3001 *opt = iio_priv(iio);536 537	return opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS;538}539 540static int opt3001_write_event_config(struct iio_dev *iio,541		const struct iio_chan_spec *chan, enum iio_event_type type,542		enum iio_event_direction dir, int state)543{544	struct opt3001 *opt = iio_priv(iio);545	int ret;546	u16 mode;547	u16 reg;548 549	if (state && opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)550		return 0;551 552	if (!state && opt->mode == OPT3001_CONFIGURATION_M_SHUTDOWN)553		return 0;554 555	mutex_lock(&opt->lock);556 557	mode = state ? OPT3001_CONFIGURATION_M_CONTINUOUS558		: OPT3001_CONFIGURATION_M_SHUTDOWN;559 560	ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);561	if (ret < 0) {562		dev_err(opt->dev, "failed to read register %02x\n",563				OPT3001_CONFIGURATION);564		goto err;565	}566 567	reg = ret;568	opt3001_set_mode(opt, &reg, mode);569 570	ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,571			reg);572	if (ret < 0) {573		dev_err(opt->dev, "failed to write register %02x\n",574				OPT3001_CONFIGURATION);575		goto err;576	}577 578err:579	mutex_unlock(&opt->lock);580 581	return ret;582}583 584static const struct iio_info opt3001_info = {585	.attrs = &opt3001_attribute_group,586	.read_raw = opt3001_read_raw,587	.write_raw = opt3001_write_raw,588	.read_event_value = opt3001_read_event_value,589	.write_event_value = opt3001_write_event_value,590	.read_event_config = opt3001_read_event_config,591	.write_event_config = opt3001_write_event_config,592};593 594static int opt3001_read_id(struct opt3001 *opt)595{596	char manufacturer[2];597	u16 device_id;598	int ret;599 600	ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_MANUFACTURER_ID);601	if (ret < 0) {602		dev_err(opt->dev, "failed to read register %02x\n",603				OPT3001_MANUFACTURER_ID);604		return ret;605	}606 607	manufacturer[0] = ret >> 8;608	manufacturer[1] = ret & 0xff;609 610	ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_DEVICE_ID);611	if (ret < 0) {612		dev_err(opt->dev, "failed to read register %02x\n",613				OPT3001_DEVICE_ID);614		return ret;615	}616 617	device_id = ret;618 619	dev_info(opt->dev, "Found %c%c OPT%04x\n", manufacturer[0],620			manufacturer[1], device_id);621 622	return 0;623}624 625static int opt3001_configure(struct opt3001 *opt)626{627	int ret;628	u16 reg;629 630	ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);631	if (ret < 0) {632		dev_err(opt->dev, "failed to read register %02x\n",633				OPT3001_CONFIGURATION);634		return ret;635	}636 637	reg = ret;638 639	/* Enable automatic full-scale setting mode */640	reg &= ~OPT3001_CONFIGURATION_RN_MASK;641	reg |= OPT3001_CONFIGURATION_RN_AUTO;642 643	/* Reflect status of the device's integration time setting */644	if (reg & OPT3001_CONFIGURATION_CT)645		opt->int_time = OPT3001_INT_TIME_LONG;646	else647		opt->int_time = OPT3001_INT_TIME_SHORT;648 649	/* Ensure device is in shutdown initially */650	opt3001_set_mode(opt, &reg, OPT3001_CONFIGURATION_M_SHUTDOWN);651 652	/* Configure for latched window-style comparison operation */653	reg |= OPT3001_CONFIGURATION_L;654	reg &= ~OPT3001_CONFIGURATION_POL;655	reg &= ~OPT3001_CONFIGURATION_ME;656	reg &= ~OPT3001_CONFIGURATION_FC_MASK;657 658	ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,659			reg);660	if (ret < 0) {661		dev_err(opt->dev, "failed to write register %02x\n",662				OPT3001_CONFIGURATION);663		return ret;664	}665 666	ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_LOW_LIMIT);667	if (ret < 0) {668		dev_err(opt->dev, "failed to read register %02x\n",669				OPT3001_LOW_LIMIT);670		return ret;671	}672 673	opt->low_thresh_mantissa = OPT3001_REG_MANTISSA(ret);674	opt->low_thresh_exp = OPT3001_REG_EXPONENT(ret);675 676	ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_HIGH_LIMIT);677	if (ret < 0) {678		dev_err(opt->dev, "failed to read register %02x\n",679				OPT3001_HIGH_LIMIT);680		return ret;681	}682 683	opt->high_thresh_mantissa = OPT3001_REG_MANTISSA(ret);684	opt->high_thresh_exp = OPT3001_REG_EXPONENT(ret);685 686	return 0;687}688 689static irqreturn_t opt3001_irq(int irq, void *_iio)690{691	struct iio_dev *iio = _iio;692	struct opt3001 *opt = iio_priv(iio);693	int ret;694	bool wake_result_ready_queue = false;695 696	if (!opt->ok_to_ignore_lock)697		mutex_lock(&opt->lock);698 699	ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);700	if (ret < 0) {701		dev_err(opt->dev, "failed to read register %02x\n",702				OPT3001_CONFIGURATION);703		goto out;704	}705 706	if ((ret & OPT3001_CONFIGURATION_M_MASK) ==707			OPT3001_CONFIGURATION_M_CONTINUOUS) {708		if (ret & OPT3001_CONFIGURATION_FH)709			iio_push_event(iio,710					IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0,711							IIO_EV_TYPE_THRESH,712							IIO_EV_DIR_RISING),713					iio_get_time_ns(iio));714		if (ret & OPT3001_CONFIGURATION_FL)715			iio_push_event(iio,716					IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0,717							IIO_EV_TYPE_THRESH,718							IIO_EV_DIR_FALLING),719					iio_get_time_ns(iio));720	} else if (ret & OPT3001_CONFIGURATION_CRF) {721		ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT);722		if (ret < 0) {723			dev_err(opt->dev, "failed to read register %02x\n",724					OPT3001_RESULT);725			goto out;726		}727		opt->result = ret;728		opt->result_ready = true;729		wake_result_ready_queue = true;730	}731 732out:733	if (!opt->ok_to_ignore_lock)734		mutex_unlock(&opt->lock);735 736	if (wake_result_ready_queue)737		wake_up(&opt->result_ready_queue);738 739	return IRQ_HANDLED;740}741 742static int opt3001_probe(struct i2c_client *client)743{744	struct device *dev = &client->dev;745 746	struct iio_dev *iio;747	struct opt3001 *opt;748	int irq = client->irq;749	int ret;750 751	iio = devm_iio_device_alloc(dev, sizeof(*opt));752	if (!iio)753		return -ENOMEM;754 755	opt = iio_priv(iio);756	opt->client = client;757	opt->dev = dev;758 759	mutex_init(&opt->lock);760	init_waitqueue_head(&opt->result_ready_queue);761	i2c_set_clientdata(client, iio);762 763	ret = opt3001_read_id(opt);764	if (ret)765		return ret;766 767	ret = opt3001_configure(opt);768	if (ret)769		return ret;770 771	iio->name = client->name;772	iio->channels = opt3001_channels;773	iio->num_channels = ARRAY_SIZE(opt3001_channels);774	iio->modes = INDIO_DIRECT_MODE;775	iio->info = &opt3001_info;776 777	ret = devm_iio_device_register(dev, iio);778	if (ret) {779		dev_err(dev, "failed to register IIO device\n");780		return ret;781	}782 783	/* Make use of INT pin only if valid IRQ no. is given */784	if (irq > 0) {785		ret = request_threaded_irq(irq, NULL, opt3001_irq,786				IRQF_TRIGGER_FALLING | IRQF_ONESHOT,787				"opt3001", iio);788		if (ret) {789			dev_err(dev, "failed to request IRQ #%d\n", irq);790			return ret;791		}792		opt->use_irq = true;793	} else {794		dev_dbg(opt->dev, "enabling interrupt-less operation\n");795	}796 797	return 0;798}799 800static void opt3001_remove(struct i2c_client *client)801{802	struct iio_dev *iio = i2c_get_clientdata(client);803	struct opt3001 *opt = iio_priv(iio);804	int ret;805	u16 reg;806 807	if (opt->use_irq)808		free_irq(client->irq, iio);809 810	ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);811	if (ret < 0) {812		dev_err(opt->dev, "failed to read register %02x\n",813				OPT3001_CONFIGURATION);814		return;815	}816 817	reg = ret;818	opt3001_set_mode(opt, &reg, OPT3001_CONFIGURATION_M_SHUTDOWN);819 820	ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,821			reg);822	if (ret < 0) {823		dev_err(opt->dev, "failed to write register %02x\n",824				OPT3001_CONFIGURATION);825	}826}827 828static const struct i2c_device_id opt3001_id[] = {829	{ "opt3001" },830	{ } /* Terminating Entry */831};832MODULE_DEVICE_TABLE(i2c, opt3001_id);833 834static const struct of_device_id opt3001_of_match[] = {835	{ .compatible = "ti,opt3001" },836	{ }837};838MODULE_DEVICE_TABLE(of, opt3001_of_match);839 840static struct i2c_driver opt3001_driver = {841	.probe = opt3001_probe,842	.remove = opt3001_remove,843	.id_table = opt3001_id,844 845	.driver = {846		.name = "opt3001",847		.of_match_table = opt3001_of_match,848	},849};850 851module_i2c_driver(opt3001_driver);852 853MODULE_LICENSE("GPL v2");854MODULE_AUTHOR("Andreas Dannenberg <dannenberg@ti.com>");855MODULE_DESCRIPTION("Texas Instruments OPT3001 Light Sensor Driver");856