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1/*2 * Broadcom NetXtreme-E RoCE driver.3 *4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term5 * Broadcom refers to Broadcom Limited and/or its subsidiaries.6 *7 * This software is available to you under a choice of one of two8 * licenses. You may choose to be licensed under the terms of the GNU9 * General Public License (GPL) Version 2, available from the file10 * COPYING in the main directory of this source tree, or the11 * BSD license below:12 *13 * Redistribution and use in source and binary forms, with or without14 * modification, are permitted provided that the following conditions15 * are met:16 *17 * 1. Redistributions of source code must retain the above copyright18 * notice, this list of conditions and the following disclaimer.19 * 2. Redistributions in binary form must reproduce the above copyright20 * notice, this list of conditions and the following disclaimer in21 * the documentation and/or other materials provided with the22 * distribution.23 *24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.35 *36 * Description: Slow Path Operators (header)37 *38 */39 40#ifndef __BNXT_RE_H__41#define __BNXT_RE_H__42#include <rdma/uverbs_ioctl.h>43#include "hw_counters.h"44#include <linux/hashtable.h>45#define ROCE_DRV_MODULE_NAME "bnxt_re"46 47#define BNXT_RE_DESC "Broadcom NetXtreme-C/E RoCE Driver"48 49#define BNXT_RE_PAGE_SHIFT_1G (30)50#define BNXT_RE_PAGE_SIZE_SUPPORTED 0x7FFFF000 /* 4kb - 1G */51 52#define BNXT_RE_MAX_MR_SIZE_LOW BIT_ULL(BNXT_RE_PAGE_SHIFT_1G)53#define BNXT_RE_MAX_MR_SIZE_HIGH BIT_ULL(39)54#define BNXT_RE_MAX_MR_SIZE BNXT_RE_MAX_MR_SIZE_HIGH55 56#define BNXT_RE_MAX_QPC_COUNT (64 * 1024)57#define BNXT_RE_MAX_MRW_COUNT (64 * 1024)58#define BNXT_RE_MAX_SRQC_COUNT (64 * 1024)59#define BNXT_RE_MAX_CQ_COUNT (64 * 1024)60#define BNXT_RE_MAX_MRW_COUNT_64K (64 * 1024)61#define BNXT_RE_MAX_MRW_COUNT_256K (256 * 1024)62 63/* Number of MRs to reserve for PF, leaving remainder for VFs */64#define BNXT_RE_RESVD_MR_FOR_PF (32 * 1024)65#define BNXT_RE_MAX_GID_PER_VF 12866 67/*68 * Percentage of resources of each type reserved for PF.69 * Remaining resources are divided equally among VFs.70 * [0, 100]71 */72#define BNXT_RE_PCT_RSVD_FOR_PF 5073 74#define BNXT_RE_UD_QP_HW_STALL 0x40000075 76#define BNXT_RE_RQ_WQE_THRESHOLD 3277 78/*79 * Setting the default ack delay value to 16, which means80 * the default timeout is approx. 260ms(4 usec * 2 ^(timeout))81 */82 83#define BNXT_RE_DEFAULT_ACK_DELAY 1684 85struct bnxt_re_ring_attr {86 dma_addr_t *dma_arr;87 int pages;88 int type;89 u32 depth;90 u32 lrid; /* Logical ring id */91 u8 mode;92};93 94/*95 * Data structure and defines to handle96 * recovery97 */98#define BNXT_RE_PRE_RECOVERY_REMOVE 0x199#define BNXT_RE_COMPLETE_REMOVE 0x2100#define BNXT_RE_POST_RECOVERY_INIT 0x4101#define BNXT_RE_COMPLETE_INIT 0x8102 103struct bnxt_re_sqp_entries {104 struct bnxt_qplib_sge sge;105 u64 wrid;106 /* For storing the actual qp1 cqe */107 struct bnxt_qplib_cqe cqe;108 struct bnxt_re_qp *qp1_qp;109};110 111#define BNXT_RE_MAX_GSI_SQP_ENTRIES 1024112struct bnxt_re_gsi_context {113 struct bnxt_re_qp *gsi_qp;114 struct bnxt_re_qp *gsi_sqp;115 struct bnxt_re_ah *gsi_sah;116 struct bnxt_re_sqp_entries *sqp_tbl;117};118 119struct bnxt_re_en_dev_info {120 struct bnxt_en_dev *en_dev;121 struct bnxt_re_dev *rdev;122};123 124#define BNXT_RE_AEQ_IDX 0125#define BNXT_RE_NQ_IDX 1126#define BNXT_RE_GEN_P5_MAX_VF 64127 128struct bnxt_re_pacing {129 u64 dbr_db_fifo_reg_off;130 void *dbr_page;131 u64 dbr_bar_addr;132 u32 pacing_algo_th;133 u32 do_pacing_save;134 u32 dbq_pacing_time; /* ms */135 u32 dbr_def_do_pacing;136 bool dbr_pacing;137 struct mutex dbq_lock; /* synchronize db pacing algo */138};139 140#define BNXT_RE_MAX_DBR_DO_PACING 0xFFFF141#define BNXT_RE_DBR_PACING_TIME 5 /* ms */142#define BNXT_RE_PACING_ALGO_THRESHOLD 250 /* Entries in DB FIFO */143#define BNXT_RE_PACING_ALARM_TH_MULTIPLE 2 /* Multiple of pacing algo threshold */144/* Default do_pacing value when there is no congestion */145#define BNXT_RE_DBR_DO_PACING_NO_CONGESTION 0x7F /* 1 in 512 probability */146 147#define BNXT_RE_MAX_FIFO_DEPTH_P5 0x2c00148#define BNXT_RE_MAX_FIFO_DEPTH_P7 0x8000149 150#define BNXT_RE_MAX_FIFO_DEPTH(ctx) \151 (bnxt_qplib_is_chip_gen_p7((ctx)) ? \152 BNXT_RE_MAX_FIFO_DEPTH_P7 :\153 BNXT_RE_MAX_FIFO_DEPTH_P5)154 155#define BNXT_RE_GRC_FIFO_REG_BASE 0x2000156 157#define MAX_CQ_HASH_BITS (16)158#define MAX_SRQ_HASH_BITS (16)159struct bnxt_re_dev {160 struct ib_device ibdev;161 struct list_head list;162 unsigned long flags;163#define BNXT_RE_FLAG_NETDEV_REGISTERED 0164#define BNXT_RE_FLAG_HAVE_L2_REF 3165#define BNXT_RE_FLAG_RCFW_CHANNEL_EN 4166#define BNXT_RE_FLAG_QOS_WORK_REG 5167#define BNXT_RE_FLAG_RESOURCES_ALLOCATED 7168#define BNXT_RE_FLAG_RESOURCES_INITIALIZED 8169#define BNXT_RE_FLAG_ERR_DEVICE_DETACHED 17170#define BNXT_RE_FLAG_ISSUE_ROCE_STATS 29171 struct net_device *netdev;172 struct auxiliary_device *adev;173 struct notifier_block nb;174 unsigned int version, major, minor;175 struct bnxt_qplib_chip_ctx *chip_ctx;176 struct bnxt_en_dev *en_dev;177 int num_msix;178 179 int id;180 181 struct delayed_work worker;182 u8 cur_prio_map;183 184 /* FP Notification Queue (CQ & SRQ) */185 struct tasklet_struct nq_task;186 187 /* RCFW Channel */188 struct bnxt_qplib_rcfw rcfw;189 190 /* NQ */191 struct bnxt_qplib_nq nq[BNXT_MAX_ROCE_MSIX];192 193 /* Device Resources */194 struct bnxt_qplib_dev_attr dev_attr;195 struct bnxt_qplib_ctx qplib_ctx;196 struct bnxt_qplib_res qplib_res;197 struct bnxt_qplib_dpi dpi_privileged;198 199 struct mutex qp_lock; /* protect qp list */200 struct list_head qp_list;201 202 /* Max of 2 lossless traffic class supported per port */203 u16 cosq[2];204 205 /* QP for handling QP1 packets */206 struct bnxt_re_gsi_context gsi_ctx;207 struct bnxt_re_stats stats;208 atomic_t nq_alloc_cnt;209 u32 is_virtfn;210 u32 num_vfs;211 struct bnxt_re_pacing pacing;212 struct work_struct dbq_fifo_check_work;213 struct delayed_work dbq_pacing_work;214 DECLARE_HASHTABLE(cq_hash, MAX_CQ_HASH_BITS);215 DECLARE_HASHTABLE(srq_hash, MAX_SRQ_HASH_BITS);216};217 218#define to_bnxt_re_dev(ptr, member) \219 container_of((ptr), struct bnxt_re_dev, member)220 221#define BNXT_RE_ROCE_V1_PACKET 0222#define BNXT_RE_ROCEV2_IPV4_PACKET 2223#define BNXT_RE_ROCEV2_IPV6_PACKET 3224 225#define BNXT_RE_CHECK_RC(x) ((x) && ((x) != -ETIMEDOUT))226void bnxt_re_pacing_alert(struct bnxt_re_dev *rdev);227 228static inline struct device *rdev_to_dev(struct bnxt_re_dev *rdev)229{230 if (rdev)231 return &rdev->ibdev.dev;232 return NULL;233}234 235extern const struct uapi_definition bnxt_re_uapi_defs[];236 237static inline void bnxt_re_set_pacing_dev_state(struct bnxt_re_dev *rdev)238{239 rdev->qplib_res.pacing_data->dev_err_state =240 test_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags);241}242#endif243