brintos

brintos / linux-shallow public Read only

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1#ifndef _QIB_7220_H2#define _QIB_7220_H3/*4 * Copyright (c) 2007, 2009, 2010 QLogic Corporation. All rights reserved.5 *6 * This software is available to you under a choice of one of two7 * licenses.  You may choose to be licensed under the terms of the GNU8 * General Public License (GPL) Version 2, available from the file9 * COPYING in the main directory of this source tree, or the10 * OpenIB.org BSD license below:11 *12 *     Redistribution and use in source and binary forms, with or13 *     without modification, are permitted provided that the following14 *     conditions are met:15 *16 *      - Redistributions of source code must retain the above17 *        copyright notice, this list of conditions and the following18 *        disclaimer.19 *20 *      - Redistributions in binary form must reproduce the above21 *        copyright notice, this list of conditions and the following22 *        disclaimer in the documentation and/or other materials23 *        provided with the distribution.24 *25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE32 * SOFTWARE.33 */34 35/* grab register-defs auto-generated by HW */36#include "qib_7220_regs.h"37 38/* The number of eager receive TIDs for context zero. */39#define IBA7220_KRCVEGRCNT      2048U40 41#define IB_7220_LT_STATE_CFGRCVFCFG      0x0942#define IB_7220_LT_STATE_CFGWAITRMT      0x0a43#define IB_7220_LT_STATE_TXREVLANES      0x0d44#define IB_7220_LT_STATE_CFGENH          0x1045 46struct qib_chip_specific {47	u64 __iomem *cregbase;48	u64 *cntrs;49	u64 *portcntrs;50	spinlock_t sdepb_lock; /* serdes EPB bus */51	spinlock_t rcvmod_lock; /* protect rcvctrl shadow changes */52	spinlock_t gpio_lock; /* RMW of shadows/regs for ExtCtrl and GPIO */53	u64 hwerrmask;54	u64 errormask;55	u64 gpio_out; /* shadow of kr_gpio_out, for rmw ops */56	u64 gpio_mask; /* shadow the gpio mask register */57	u64 extctrl; /* shadow the gpio output enable, etc... */58	u32 ncntrs;59	u32 nportcntrs;60	u32 cntrnamelen;61	u32 portcntrnamelen;62	u32 numctxts;63	u32 rcvegrcnt;64	u32 autoneg_tries;65	u32 serdes_first_init_done;66	u32 sdmabufcnt;67	u32 lastbuf_for_pio;68	u32 updthresh; /* current AvailUpdThld */69	u32 updthresh_dflt; /* default AvailUpdThld */70	u8 presets_needed;71	u8 relock_timer_active;72	char emsgbuf[128];73	char sdmamsgbuf[192];74	char bitsmsgbuf[64];75	struct timer_list relock_timer;76	unsigned int relock_interval; /* in jiffies */77	struct qib_devdata *dd;78};79 80struct qib_chippport_specific {81	struct qib_pportdata pportdata;82	wait_queue_head_t autoneg_wait;83	struct delayed_work autoneg_work;84	struct timer_list chase_timer;85	/*86	 * these 5 fields are used to establish deltas for IB symbol87	 * errors and linkrecovery errors.  They can be reported on88	 * some chips during link negotiation prior to INIT, and with89	 * DDR when faking DDR negotiations with non-IBTA switches.90	 * The chip counters are adjusted at driver unload if there is91	 * a non-zero delta.92	 */93	u64 ibdeltainprog;94	u64 ibsymdelta;95	u64 ibsymsnap;96	u64 iblnkerrdelta;97	u64 iblnkerrsnap;98	u64 ibcctrl; /* kr_ibcctrl shadow */99	u64 ibcddrctrl; /* kr_ibcddrctrl shadow */100	unsigned long chase_end;101	u32 last_delay_mult;102};103 104/*105 * This header file provides the declarations and common definitions106 * for (mostly) manipulation of the SerDes blocks within the IBA7220.107 * the functions declared should only be called from within other108 * 7220-related files such as qib_iba7220.c or qib_sd7220.c.109 */110int qib_sd7220_presets(struct qib_devdata *dd);111int qib_sd7220_init(struct qib_devdata *dd);112void qib_sd7220_clr_ibpar(struct qib_devdata *);113/*114 * Below used for sdnum parameter, selecting one of the two sections115 * used for PCIe, or the single SerDes used for IB, which is the116 * only one currently used117 */118#define IB_7220_SERDES 2119 120static inline u32 qib_read_kreg32(const struct qib_devdata *dd,121				  const u16 regno)122{123	if (!dd->kregbase || !(dd->flags & QIB_PRESENT))124		return -1;125	return readl((u32 __iomem *)&dd->kregbase[regno]);126}127 128static inline u64 qib_read_kreg64(const struct qib_devdata *dd,129				  const u16 regno)130{131	if (!dd->kregbase || !(dd->flags & QIB_PRESENT))132		return -1;133 134	return readq(&dd->kregbase[regno]);135}136 137static inline void qib_write_kreg(const struct qib_devdata *dd,138				  const u16 regno, u64 value)139{140	if (dd->kregbase)141		writeq(value, &dd->kregbase[regno]);142}143 144void set_7220_relock_poll(struct qib_devdata *, int);145void shutdown_7220_relock_poll(struct qib_devdata *);146void toggle_7220_rclkrls(struct qib_devdata *);147 148 149#endif /* _QIB_7220_H */150