brintos

brintos / linux-shallow public Read only

0
0
Text · 14.0 KiB · b6ddf1d Raw
560 lines · c
1// SPDX-License-Identifier: GPL-2.02/*3 * Device driver for the via ADB on (many) Mac II-class machines4 *5 * Based on the original ADB keyboard handler Copyright (c) 1997 Alan Cox6 * Also derived from code Copyright (C) 1996 Paul Mackerras.7 *8 * With various updates provided over the years by Michael Schmitz,9 * Guideo Koerber and others.10 *11 * Rewrite for Unified ADB by Joshua M. Thompson (funaho@jurai.org)12 *13 * 1999-08-02 (jmt) - Initial rewrite for Unified ADB.14 * 2000-03-29 Tony Mantler <tonym@mac.linux-m68k.org>15 *            - Big overhaul, should actually work now.16 * 2006-12-31 Finn Thain - Another overhaul.17 *18 * Suggested reading:19 *   Inside Macintosh, ch. 5 ADB Manager20 *   Guide to the Macinstosh Family Hardware, ch. 8 Apple Desktop Bus21 *   Rockwell R6522 VIA datasheet22 *23 * Apple's "ADB Analyzer" bus sniffer is invaluable:24 *   ftp://ftp.apple.com/developer/Tool_Chest/Devices_-_Hardware/Apple_Desktop_Bus/25 */26#include <linux/types.h>27#include <linux/errno.h>28#include <linux/kernel.h>29#include <linux/delay.h>30#include <linux/adb.h>31#include <linux/interrupt.h>32#include <linux/init.h>33#include <asm/macintosh.h>34#include <asm/macints.h>35#include <asm/mac_via.h>36 37static volatile unsigned char *via;38 39/* VIA registers - spaced 0x200 bytes apart */40#define RS		0x200		/* skip between registers */41#define B		0		/* B-side data */42#define A		RS		/* A-side data */43#define DIRB		(2*RS)		/* B-side direction (1=output) */44#define DIRA		(3*RS)		/* A-side direction (1=output) */45#define T1CL		(4*RS)		/* Timer 1 ctr/latch (low 8 bits) */46#define T1CH		(5*RS)		/* Timer 1 counter (high 8 bits) */47#define T1LL		(6*RS)		/* Timer 1 latch (low 8 bits) */48#define T1LH		(7*RS)		/* Timer 1 latch (high 8 bits) */49#define T2CL		(8*RS)		/* Timer 2 ctr/latch (low 8 bits) */50#define T2CH		(9*RS)		/* Timer 2 counter (high 8 bits) */51#define SR		(10*RS)		/* Shift register */52#define ACR		(11*RS)		/* Auxiliary control register */53#define PCR		(12*RS)		/* Peripheral control register */54#define IFR		(13*RS)		/* Interrupt flag register */55#define IER		(14*RS)		/* Interrupt enable register */56#define ANH		(15*RS)		/* A-side data, no handshake */57 58/* Bits in B data register: all active low */59#define CTLR_IRQ	0x08		/* Controller rcv status (input) */60#define ST_MASK		0x30		/* mask for selecting ADB state bits */61 62/* Bits in ACR */63#define SR_CTRL		0x1c		/* Shift register control bits */64#define SR_EXT		0x0c		/* Shift on external clock */65#define SR_OUT		0x10		/* Shift out if 1 */66 67/* Bits in IFR and IER */68#define IER_SET		0x80		/* set bits in IER */69#define IER_CLR		0		/* clear bits in IER */70#define SR_INT		0x04		/* Shift register full/empty */71 72/* ADB transaction states according to GMHW */73#define ST_CMD		0x00		/* ADB state: command byte */74#define ST_EVEN		0x10		/* ADB state: even data byte */75#define ST_ODD		0x20		/* ADB state: odd data byte */76#define ST_IDLE		0x30		/* ADB state: idle, nothing to send */77 78/* ADB command byte structure */79#define ADDR_MASK	0xF080#define CMD_MASK	0x0F81#define OP_MASK		0x0C82#define TALK		0x0C83 84static int macii_init_via(void);85static void macii_start(void);86static irqreturn_t macii_interrupt(int irq, void *arg);87static void macii_queue_poll(void);88 89static int macii_probe(void);90static int macii_init(void);91static int macii_send_request(struct adb_request *req, int sync);92static int macii_write(struct adb_request *req);93static int macii_autopoll(int devs);94static void macii_poll(void);95static int macii_reset_bus(void);96 97struct adb_driver via_macii_driver = {98	.name         = "Mac II",99	.probe        = macii_probe,100	.init         = macii_init,101	.send_request = macii_send_request,102	.autopoll     = macii_autopoll,103	.poll         = macii_poll,104	.reset_bus    = macii_reset_bus,105};106 107static enum macii_state {108	idle,109	sending,110	reading,111} macii_state;112 113static struct adb_request *current_req; /* first request struct in the queue */114static struct adb_request *last_req;     /* last request struct in the queue */115static unsigned char reply_buf[16];        /* storage for autopolled replies */116static unsigned char *reply_ptr;     /* next byte in reply_buf or req->reply */117static bool reading_reply;       /* store reply in reply_buf else req->reply */118static int data_index;      /* index of the next byte to send from req->data */119static int reply_len; /* number of bytes received in reply_buf or req->reply */120static int status;          /* VIA's ADB status bits captured upon interrupt */121static bool bus_timeout;                   /* no data was sent by the device */122static bool srq_asserted;    /* have to poll for the device that asserted it */123static u8 last_cmd;              /* the most recent command byte transmitted */124static u8 last_talk_cmd;    /* the most recent Talk command byte transmitted */125static u8 last_poll_cmd; /* the most recent Talk R0 command byte transmitted */126static unsigned int autopoll_devs;  /* bits set are device addresses to poll */127 128/* Check for MacII style ADB */129static int macii_probe(void)130{131	if (macintosh_config->adb_type != MAC_ADB_II)132		return -ENODEV;133 134	via = via1;135 136	pr_info("adb: Mac II ADB Driver v1.0 for Unified ADB\n");137	return 0;138}139 140/* Initialize the driver */141static int macii_init(void)142{143	int err;144 145	err = macii_init_via();146	if (err)147		return err;148 149	err = request_irq(IRQ_MAC_ADB, macii_interrupt, 0, "ADB",150			  macii_interrupt);151	if (err)152		return err;153 154	macii_state = idle;155	return 0;156}157 158/* initialize the hardware */159static int macii_init_via(void)160{161	unsigned char x;162 163	/* We want CTLR_IRQ as input and ST_EVEN | ST_ODD as output lines. */164	via[DIRB] = (via[DIRB] | ST_EVEN | ST_ODD) & ~CTLR_IRQ;165 166	/* Set up state: idle */167	via[B] |= ST_IDLE;168 169	/* Shift register on input */170	via[ACR] = (via[ACR] & ~SR_CTRL) | SR_EXT;171 172	/* Wipe any pending data and int */173	x = via[SR];174 175	return 0;176}177 178/* Send an ADB poll (Talk Register 0 command prepended to the request queue) */179static void macii_queue_poll(void)180{181	static struct adb_request req;182	unsigned char poll_command;183	unsigned int poll_addr;184 185	/* This only polls devices in the autopoll list, which assumes that186	 * unprobed devices never assert SRQ. That could happen if a device was187	 * plugged in after the adb bus scan. Unplugging it again will resolve188	 * the problem. This behaviour is similar to MacOS.189	 */190	if (!autopoll_devs)191		return;192 193	/* The device most recently polled may not be the best device to poll194	 * right now. Some other device(s) may have signalled SRQ (the active195	 * device won't do that). Or the autopoll list may have been changed.196	 * Try polling the next higher address.197	 */198	poll_addr = (last_poll_cmd & ADDR_MASK) >> 4;199	if ((srq_asserted && last_cmd == last_poll_cmd) ||200	    !(autopoll_devs & (1 << poll_addr))) {201		unsigned int higher_devs;202 203		higher_devs = autopoll_devs & -(1 << (poll_addr + 1));204		poll_addr = ffs(higher_devs ? higher_devs : autopoll_devs) - 1;205	}206 207	/* Send a Talk Register 0 command */208	poll_command = ADB_READREG(poll_addr, 0);209 210	/* No need to repeat this Talk command. The transceiver will do that211	 * as long as it is idle.212	 */213	if (poll_command == last_cmd)214		return;215 216	adb_request(&req, NULL, ADBREQ_NOSEND, 1, poll_command);217 218	req.sent = 0;219	req.complete = 0;220	req.reply_len = 0;221	req.next = current_req;222 223	if (WARN_ON(current_req)) {224		current_req = &req;225	} else {226		current_req = &req;227		last_req = &req;228	}229}230 231/* Send an ADB request; if sync, poll out the reply 'till it's done */232static int macii_send_request(struct adb_request *req, int sync)233{234	int err;235 236	err = macii_write(req);237	if (err)238		return err;239 240	if (sync)241		while (!req->complete)242			macii_poll();243 244	return 0;245}246 247/* Send an ADB request (append to request queue) */248static int macii_write(struct adb_request *req)249{250	unsigned long flags;251 252	if (req->nbytes < 2 || req->data[0] != ADB_PACKET || req->nbytes > 15) {253		req->complete = 1;254		return -EINVAL;255	}256 257	req->next = NULL;258	req->sent = 0;259	req->complete = 0;260	req->reply_len = 0;261 262	local_irq_save(flags);263 264	if (current_req != NULL) {265		last_req->next = req;266		last_req = req;267	} else {268		current_req = req;269		last_req = req;270		if (macii_state == idle)271			macii_start();272	}273 274	local_irq_restore(flags);275 276	return 0;277}278 279/* Start auto-polling */280static int macii_autopoll(int devs)281{282	unsigned long flags;283 284	local_irq_save(flags);285 286	/* bit 1 == device 1, and so on. */287	autopoll_devs = (unsigned int)devs & 0xFFFE;288 289	if (!current_req) {290		macii_queue_poll();291		if (current_req && macii_state == idle)292			macii_start();293	}294 295	local_irq_restore(flags);296 297	return 0;298}299 300/* Prod the chip without interrupts */301static void macii_poll(void)302{303	macii_interrupt(0, NULL);304}305 306/* Reset the bus */307static int macii_reset_bus(void)308{309	struct adb_request req;310 311	/* Command = 0, Address = ignored */312	adb_request(&req, NULL, ADBREQ_NOSEND, 1, ADB_BUSRESET);313	macii_send_request(&req, 1);314 315	/* Don't want any more requests during the Global Reset low time. */316	udelay(3000);317 318	return 0;319}320 321/* Start sending ADB packet */322static void macii_start(void)323{324	struct adb_request *req;325 326	req = current_req;327 328	/* Now send it. Be careful though, that first byte of the request329	 * is actually ADB_PACKET; the real data begins at index 1!330	 * And req->nbytes is the number of bytes of real data plus one.331	 */332 333	/* Output mode */334	via[ACR] |= SR_OUT;335	/* Load data */336	via[SR] = req->data[1];337	/* set ADB state to 'command' */338	via[B] = (via[B] & ~ST_MASK) | ST_CMD;339 340	macii_state = sending;341	data_index = 2;342 343	bus_timeout = false;344	srq_asserted = false;345}346 347/*348 * The notorious ADB interrupt handler - does all of the protocol handling.349 * Relies on the ADB controller sending and receiving data, thereby350 * generating shift register interrupts (SR_INT) for us. This means there has351 * to be activity on the ADB bus. The chip will poll to achieve this.352 *353 * The VIA Port B output signalling works as follows. After the ADB transceiver354 * sees a transition on the PB4 and PB5 lines it will crank over the VIA shift355 * register which eventually raises the SR_INT interrupt. The PB4/PB5 outputs356 * are toggled with each byte as the ADB transaction progresses.357 *358 * Request with no reply expected (and empty transceiver buffer):359 *     CMD -> IDLE360 * Request with expected reply packet (or with buffered autopoll packet):361 *     CMD -> EVEN -> ODD -> EVEN -> ... -> IDLE362 * Unsolicited packet:363 *     IDLE -> EVEN -> ODD -> EVEN -> ... -> IDLE364 */365static irqreturn_t macii_interrupt(int irq, void *arg)366{367	int x;368	struct adb_request *req;369	unsigned long flags;370 371	local_irq_save(flags);372 373	if (!arg) {374		/* Clear the SR IRQ flag when polling. */375		if (via[IFR] & SR_INT)376			via[IFR] = SR_INT;377		else {378			local_irq_restore(flags);379			return IRQ_NONE;380		}381	}382 383	status = via[B] & (ST_MASK | CTLR_IRQ);384 385	switch (macii_state) {386	case idle:387		WARN_ON((status & ST_MASK) != ST_IDLE);388 389		reply_ptr = reply_buf;390		reading_reply = false;391 392		bus_timeout = false;393		srq_asserted = false;394 395		x = via[SR];396 397		if (!(status & CTLR_IRQ)) {398			/* /CTLR_IRQ asserted in idle state means we must399			 * read an autopoll reply from the transceiver buffer.400			 */401			macii_state = reading;402			*reply_ptr = x;403			reply_len = 1;404		} else {405			/* bus timeout */406			reply_len = 0;407			break;408		}409 410		/* set ADB state = even for first data byte */411		via[B] = (via[B] & ~ST_MASK) | ST_EVEN;412		break;413 414	case sending:415		req = current_req;416 417		if (status == (ST_CMD | CTLR_IRQ)) {418			/* /CTLR_IRQ de-asserted after the command byte means419			 * the host can continue with the transaction.420			 */421 422			/* Store command byte */423			last_cmd = req->data[1];424			if ((last_cmd & OP_MASK) == TALK) {425				last_talk_cmd = last_cmd;426				if ((last_cmd & CMD_MASK) == ADB_READREG(0, 0))427					last_poll_cmd = last_cmd;428			}429		}430 431		if (status == ST_CMD) {432			/* /CTLR_IRQ asserted after the command byte means we433			 * must read an autopoll reply. The first byte was434			 * lost because the shift register was an output.435			 */436			macii_state = reading;437 438			reading_reply = false;439			reply_ptr = reply_buf;440			*reply_ptr = last_talk_cmd;441			reply_len = 1;442 443			/* reset to shift in */444			via[ACR] &= ~SR_OUT;445			x = via[SR];446		} else if (data_index >= req->nbytes) {447			req->sent = 1;448 449			if (req->reply_expected) {450				macii_state = reading;451 452				reading_reply = true;453				reply_ptr = req->reply;454				*reply_ptr = req->data[1];455				reply_len = 1;456 457				via[ACR] &= ~SR_OUT;458				x = via[SR];459			} else if ((req->data[1] & OP_MASK) == TALK) {460				macii_state = reading;461 462				reading_reply = false;463				reply_ptr = reply_buf;464				*reply_ptr = req->data[1];465				reply_len = 1;466 467				via[ACR] &= ~SR_OUT;468				x = via[SR];469 470				req->complete = 1;471				current_req = req->next;472				if (req->done)473					(*req->done)(req);474			} else {475				macii_state = idle;476 477				req->complete = 1;478				current_req = req->next;479				if (req->done)480					(*req->done)(req);481				break;482			}483		} else {484			via[SR] = req->data[data_index++];485		}486 487		if ((via[B] & ST_MASK) == ST_CMD) {488			/* just sent the command byte, set to EVEN */489			via[B] = (via[B] & ~ST_MASK) | ST_EVEN;490		} else {491			/* invert state bits, toggle ODD/EVEN */492			via[B] ^= ST_MASK;493		}494		break;495 496	case reading:497		x = via[SR];498		WARN_ON((status & ST_MASK) == ST_CMD ||499			(status & ST_MASK) == ST_IDLE);500 501		if (!(status & CTLR_IRQ)) {502			if (status == ST_EVEN && reply_len == 1) {503				bus_timeout = true;504			} else if (status == ST_ODD && reply_len == 2) {505				srq_asserted = true;506			} else {507				macii_state = idle;508 509				if (bus_timeout)510					reply_len = 0;511 512				if (reading_reply) {513					struct adb_request *req = current_req;514 515					req->reply_len = reply_len;516 517					req->complete = 1;518					current_req = req->next;519					if (req->done)520						(*req->done)(req);521				} else if (reply_len && autopoll_devs &&522					   reply_buf[0] == last_poll_cmd) {523					adb_input(reply_buf, reply_len, 1);524				}525				break;526			}527		}528 529		if (reply_len < ARRAY_SIZE(reply_buf)) {530			reply_ptr++;531			*reply_ptr = x;532			reply_len++;533		}534 535		/* invert state bits, toggle ODD/EVEN */536		via[B] ^= ST_MASK;537		break;538 539	default:540		break;541	}542 543	if (macii_state == idle) {544		if (!current_req)545			macii_queue_poll();546 547		if (current_req)548			macii_start();549 550		if (macii_state == idle) {551			via[ACR] &= ~SR_OUT;552			x = via[SR];553			via[B] = (via[B] & ~ST_MASK) | ST_IDLE;554		}555	}556 557	local_irq_restore(flags);558	return IRQ_HANDLED;559}560