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1// SPDX-License-Identifier: GPL-2.0-or-later2/*3 * Montage Technology M88DS3103/M88RS6000 demodulator driver4 *5 * Copyright (C) 2013 Antti Palosaari <crope@iki.fi>6 */7 8#include "m88ds3103_priv.h"9 10static const struct dvb_frontend_ops m88ds3103_ops;11 12/* write single register with mask */13static int m88ds3103_update_bits(struct m88ds3103_dev *dev,14 u8 reg, u8 mask, u8 val)15{16 int ret;17 u8 tmp;18 19 /* no need for read if whole reg is written */20 if (mask != 0xff) {21 ret = regmap_bulk_read(dev->regmap, reg, &tmp, 1);22 if (ret)23 return ret;24 25 val &= mask;26 tmp &= ~mask;27 val |= tmp;28 }29 30 return regmap_bulk_write(dev->regmap, reg, &val, 1);31}32 33/* write reg val table using reg addr auto increment */34static int m88ds3103_wr_reg_val_tab(struct m88ds3103_dev *dev,35 const struct m88ds3103_reg_val *tab, int tab_len)36{37 struct i2c_client *client = dev->client;38 int ret, i, j;39 u8 buf[83];40 41 dev_dbg(&client->dev, "tab_len=%d\n", tab_len);42 43 if (tab_len > 86) {44 ret = -EINVAL;45 goto err;46 }47 48 for (i = 0, j = 0; i < tab_len; i++, j++) {49 buf[j] = tab[i].val;50 51 if (i == tab_len - 1 || tab[i].reg != tab[i + 1].reg - 1 ||52 !((j + 1) % (dev->cfg->i2c_wr_max - 1))) {53 ret = regmap_bulk_write(dev->regmap, tab[i].reg - j, buf, j + 1);54 if (ret)55 goto err;56 57 j = -1;58 }59 }60 61 return 0;62err:63 dev_dbg(&client->dev, "failed=%d\n", ret);64 return ret;65}66 67/*68 * m88ds3103b demod has an internal device related to clocking. First the i2c69 * gate must be opened, for one transaction, then writes will be allowed.70 */71static int m88ds3103b_dt_write(struct m88ds3103_dev *dev, int reg, int data)72{73 struct i2c_client *client = dev->client;74 u8 buf[] = {reg, data};75 u8 val;76 int ret;77 struct i2c_msg msg = {78 .addr = dev->dt_addr, .flags = 0, .buf = buf, .len = 279 };80 81 m88ds3103_update_bits(dev, 0x11, 0x01, 0x00);82 83 val = 0x11;84 ret = regmap_write(dev->regmap, 0x03, val);85 if (ret)86 dev_dbg(&client->dev, "fail=%d\n", ret);87 88 ret = i2c_transfer(dev->dt_client->adapter, &msg, 1);89 if (ret != 1) {90 dev_err(&client->dev, "0x%02x (ret=%i, reg=0x%02x, value=0x%02x)\n",91 dev->dt_addr, ret, reg, data);92 93 m88ds3103_update_bits(dev, 0x11, 0x01, 0x01);94 return -EREMOTEIO;95 }96 m88ds3103_update_bits(dev, 0x11, 0x01, 0x01);97 98 dev_dbg(&client->dev, "0x%02x reg 0x%02x, value 0x%02x\n",99 dev->dt_addr, reg, data);100 101 return 0;102}103 104/*105 * m88ds3103b demod has an internal device related to clocking. First the i2c106 * gate must be opened, for two transactions, then reads will be allowed.107 */108static int m88ds3103b_dt_read(struct m88ds3103_dev *dev, u8 reg)109{110 struct i2c_client *client = dev->client;111 int ret;112 u8 val;113 u8 b0[] = { reg };114 u8 b1[] = { 0 };115 struct i2c_msg msg[] = {116 {117 .addr = dev->dt_addr,118 .flags = 0,119 .buf = b0,120 .len = 1121 },122 {123 .addr = dev->dt_addr,124 .flags = I2C_M_RD,125 .buf = b1,126 .len = 1127 }128 };129 130 m88ds3103_update_bits(dev, 0x11, 0x01, 0x00);131 132 val = 0x12;133 ret = regmap_write(dev->regmap, 0x03, val);134 if (ret)135 dev_dbg(&client->dev, "fail=%d\n", ret);136 137 ret = i2c_transfer(dev->dt_client->adapter, msg, 2);138 if (ret != 2) {139 dev_err(&client->dev, "0x%02x (ret=%d, reg=0x%02x)\n",140 dev->dt_addr, ret, reg);141 142 m88ds3103_update_bits(dev, 0x11, 0x01, 0x01);143 return -EREMOTEIO;144 }145 m88ds3103_update_bits(dev, 0x11, 0x01, 0x01);146 147 dev_dbg(&client->dev, "0x%02x reg 0x%02x, value 0x%02x\n",148 dev->dt_addr, reg, b1[0]);149 150 return b1[0];151}152 153/*154 * Get the demodulator AGC PWM voltage setting supplied to the tuner.155 */156int m88ds3103_get_agc_pwm(struct dvb_frontend *fe, u8 *_agc_pwm)157{158 struct m88ds3103_dev *dev = fe->demodulator_priv;159 unsigned tmp;160 int ret;161 162 ret = regmap_read(dev->regmap, 0x3f, &tmp);163 if (ret == 0)164 *_agc_pwm = tmp;165 return ret;166}167EXPORT_SYMBOL(m88ds3103_get_agc_pwm);168 169static int m88ds3103_read_status(struct dvb_frontend *fe,170 enum fe_status *status)171{172 struct m88ds3103_dev *dev = fe->demodulator_priv;173 struct i2c_client *client = dev->client;174 struct dtv_frontend_properties *c = &fe->dtv_property_cache;175 int ret, i, itmp;176 unsigned int utmp;177 u8 buf[3];178 179 *status = 0;180 181 if (!dev->warm) {182 ret = -EAGAIN;183 goto err;184 }185 186 switch (c->delivery_system) {187 case SYS_DVBS:188 ret = regmap_read(dev->regmap, 0xd1, &utmp);189 if (ret)190 goto err;191 192 if ((utmp & 0x07) == 0x07)193 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |194 FE_HAS_VITERBI | FE_HAS_SYNC |195 FE_HAS_LOCK;196 break;197 case SYS_DVBS2:198 ret = regmap_read(dev->regmap, 0x0d, &utmp);199 if (ret)200 goto err;201 202 if ((utmp & 0x8f) == 0x8f)203 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |204 FE_HAS_VITERBI | FE_HAS_SYNC |205 FE_HAS_LOCK;206 break;207 default:208 dev_dbg(&client->dev, "invalid delivery_system\n");209 ret = -EINVAL;210 goto err;211 }212 213 dev->fe_status = *status;214 dev_dbg(&client->dev, "lock=%02x status=%02x\n", utmp, *status);215 216 /* CNR */217 if (dev->fe_status & FE_HAS_VITERBI) {218 unsigned int cnr, noise, signal, noise_tot, signal_tot;219 220 cnr = 0;221 /* more iterations for more accurate estimation */222 #define M88DS3103_SNR_ITERATIONS 3223 224 switch (c->delivery_system) {225 case SYS_DVBS:226 itmp = 0;227 228 for (i = 0; i < M88DS3103_SNR_ITERATIONS; i++) {229 ret = regmap_read(dev->regmap, 0xff, &utmp);230 if (ret)231 goto err;232 233 itmp += utmp;234 }235 236 /* use of single register limits max value to 15 dB */237 /* SNR(X) dB = 10 * ln(X) / ln(10) dB */238 itmp = DIV_ROUND_CLOSEST(itmp, 8 * M88DS3103_SNR_ITERATIONS);239 if (itmp)240 cnr = div_u64((u64) 10000 * intlog2(itmp), intlog2(10));241 break;242 case SYS_DVBS2:243 noise_tot = 0;244 signal_tot = 0;245 246 for (i = 0; i < M88DS3103_SNR_ITERATIONS; i++) {247 ret = regmap_bulk_read(dev->regmap, 0x8c, buf, 3);248 if (ret)249 goto err;250 251 noise = buf[1] << 6; /* [13:6] */252 noise |= buf[0] & 0x3f; /* [5:0] */253 noise >>= 2;254 signal = buf[2] * buf[2];255 signal >>= 1;256 257 noise_tot += noise;258 signal_tot += signal;259 }260 261 noise = noise_tot / M88DS3103_SNR_ITERATIONS;262 signal = signal_tot / M88DS3103_SNR_ITERATIONS;263 264 /* SNR(X) dB = 10 * log10(X) dB */265 if (signal > noise) {266 itmp = signal / noise;267 cnr = div_u64((u64) 10000 * intlog10(itmp), (1 << 24));268 }269 break;270 default:271 dev_dbg(&client->dev, "invalid delivery_system\n");272 ret = -EINVAL;273 goto err;274 }275 276 if (cnr) {277 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;278 c->cnr.stat[0].svalue = cnr;279 } else {280 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;281 }282 } else {283 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;284 }285 286 /* BER */287 if (dev->fe_status & FE_HAS_LOCK) {288 unsigned int utmp, post_bit_error, post_bit_count;289 290 switch (c->delivery_system) {291 case SYS_DVBS:292 ret = regmap_write(dev->regmap, 0xf9, 0x04);293 if (ret)294 goto err;295 296 ret = regmap_read(dev->regmap, 0xf8, &utmp);297 if (ret)298 goto err;299 300 /* measurement ready? */301 if (!(utmp & 0x10)) {302 ret = regmap_bulk_read(dev->regmap, 0xf6, buf, 2);303 if (ret)304 goto err;305 306 post_bit_error = buf[1] << 8 | buf[0] << 0;307 post_bit_count = 0x800000;308 dev->post_bit_error += post_bit_error;309 dev->post_bit_count += post_bit_count;310 dev->dvbv3_ber = post_bit_error;311 312 /* restart measurement */313 utmp |= 0x10;314 ret = regmap_write(dev->regmap, 0xf8, utmp);315 if (ret)316 goto err;317 }318 break;319 case SYS_DVBS2:320 ret = regmap_bulk_read(dev->regmap, 0xd5, buf, 3);321 if (ret)322 goto err;323 324 utmp = buf[2] << 16 | buf[1] << 8 | buf[0] << 0;325 326 /* enough data? */327 if (utmp > 4000) {328 ret = regmap_bulk_read(dev->regmap, 0xf7, buf, 2);329 if (ret)330 goto err;331 332 post_bit_error = buf[1] << 8 | buf[0] << 0;333 post_bit_count = 32 * utmp; /* TODO: FEC */334 dev->post_bit_error += post_bit_error;335 dev->post_bit_count += post_bit_count;336 dev->dvbv3_ber = post_bit_error;337 338 /* restart measurement */339 ret = regmap_write(dev->regmap, 0xd1, 0x01);340 if (ret)341 goto err;342 343 ret = regmap_write(dev->regmap, 0xf9, 0x01);344 if (ret)345 goto err;346 347 ret = regmap_write(dev->regmap, 0xf9, 0x00);348 if (ret)349 goto err;350 351 ret = regmap_write(dev->regmap, 0xd1, 0x00);352 if (ret)353 goto err;354 }355 break;356 default:357 dev_dbg(&client->dev, "invalid delivery_system\n");358 ret = -EINVAL;359 goto err;360 }361 362 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;363 c->post_bit_error.stat[0].uvalue = dev->post_bit_error;364 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;365 c->post_bit_count.stat[0].uvalue = dev->post_bit_count;366 } else {367 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;368 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;369 }370 371 return 0;372err:373 dev_dbg(&client->dev, "failed=%d\n", ret);374 return ret;375}376 377static int m88ds3103b_select_mclk(struct m88ds3103_dev *dev)378{379 struct i2c_client *client = dev->client;380 struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;381 u32 adc_Freq_MHz[3] = {96, 93, 99};382 u8 reg16_list[3] = {96, 92, 100}, reg16, reg15;383 u32 offset_MHz[3];384 u32 max_offset = 0;385 u32 old_setting = dev->mclk;386 u32 tuner_freq_MHz = c->frequency / 1000;387 u8 i;388 char big_symbol = 0;389 390 big_symbol = (c->symbol_rate > 45010000) ? 1 : 0;391 392 if (big_symbol) {393 reg16 = 115;394 } else {395 reg16 = 96;396 397 /* TODO: IS THIS NECESSARY ? */398 for (i = 0; i < 3; i++) {399 offset_MHz[i] = tuner_freq_MHz % adc_Freq_MHz[i];400 401 if (offset_MHz[i] > (adc_Freq_MHz[i] / 2))402 offset_MHz[i] = adc_Freq_MHz[i] - offset_MHz[i];403 404 if (offset_MHz[i] > max_offset) {405 max_offset = offset_MHz[i];406 reg16 = reg16_list[i];407 dev->mclk = adc_Freq_MHz[i] * 1000 * 1000;408 409 if (big_symbol)410 dev->mclk /= 2;411 412 dev_dbg(&client->dev, "modifying mclk %u -> %u\n",413 old_setting, dev->mclk);414 }415 }416 }417 418 if (dev->mclk == 93000000)419 regmap_write(dev->regmap, 0xA0, 0x42);420 else if (dev->mclk == 96000000)421 regmap_write(dev->regmap, 0xA0, 0x44);422 else if (dev->mclk == 99000000)423 regmap_write(dev->regmap, 0xA0, 0x46);424 else if (dev->mclk == 110250000)425 regmap_write(dev->regmap, 0xA0, 0x4E);426 else427 regmap_write(dev->regmap, 0xA0, 0x44);428 429 reg15 = m88ds3103b_dt_read(dev, 0x15);430 431 m88ds3103b_dt_write(dev, 0x05, 0x40);432 m88ds3103b_dt_write(dev, 0x11, 0x08);433 434 if (big_symbol)435 reg15 |= 0x02;436 else437 reg15 &= ~0x02;438 439 m88ds3103b_dt_write(dev, 0x15, reg15);440 m88ds3103b_dt_write(dev, 0x16, reg16);441 442 usleep_range(5000, 5500);443 444 m88ds3103b_dt_write(dev, 0x05, 0x00);445 m88ds3103b_dt_write(dev, 0x11, (u8)(big_symbol ? 0x0E : 0x0A));446 447 usleep_range(5000, 5500);448 449 return 0;450}451 452static int m88ds3103b_set_mclk(struct m88ds3103_dev *dev, u32 mclk_khz)453{454 u8 reg15, reg16, reg1D, reg1E, reg1F, tmp;455 u8 sm, f0 = 0, f1 = 0, f2 = 0, f3 = 0;456 u16 pll_div_fb, N;457 u32 div;458 459 reg15 = m88ds3103b_dt_read(dev, 0x15);460 reg16 = m88ds3103b_dt_read(dev, 0x16);461 reg1D = m88ds3103b_dt_read(dev, 0x1D);462 463 if (dev->cfg->ts_mode != M88DS3103_TS_SERIAL) {464 if (reg16 == 92)465 tmp = 93;466 else if (reg16 == 100)467 tmp = 99;468 else469 tmp = 96;470 471 mclk_khz *= tmp;472 mclk_khz /= 96;473 }474 475 pll_div_fb = (reg15 & 0x01) << 8;476 pll_div_fb += reg16;477 pll_div_fb += 32;478 479 div = 9000 * pll_div_fb * 4;480 div /= mclk_khz;481 482 if (dev->cfg->ts_mode == M88DS3103_TS_SERIAL) {483 if (div <= 32) {484 N = 2;485 486 f0 = 0;487 f1 = div / N;488 f2 = div - f1;489 f3 = 0;490 } else if (div <= 34) {491 N = 3;492 493 f0 = div / N;494 f1 = (div - f0) / (N - 1);495 f2 = div - f0 - f1;496 f3 = 0;497 } else if (div <= 64) {498 N = 4;499 500 f0 = div / N;501 f1 = (div - f0) / (N - 1);502 f2 = (div - f0 - f1) / (N - 2);503 f3 = div - f0 - f1 - f2;504 } else {505 N = 4;506 507 f0 = 16;508 f1 = 16;509 f2 = 16;510 f3 = 16;511 }512 513 if (f0 == 16)514 f0 = 0;515 else if ((f0 < 8) && (f0 != 0))516 f0 = 8;517 518 if (f1 == 16)519 f1 = 0;520 else if ((f1 < 8) && (f1 != 0))521 f1 = 8;522 523 if (f2 == 16)524 f2 = 0;525 else if ((f2 < 8) && (f2 != 0))526 f2 = 8;527 528 if (f3 == 16)529 f3 = 0;530 else if ((f3 < 8) && (f3 != 0))531 f3 = 8;532 } else {533 if (div <= 32) {534 N = 2;535 536 f0 = 0;537 f1 = div / N;538 f2 = div - f1;539 f3 = 0;540 } else if (div <= 48) {541 N = 3;542 543 f0 = div / N;544 f1 = (div - f0) / (N - 1);545 f2 = div - f0 - f1;546 f3 = 0;547 } else if (div <= 64) {548 N = 4;549 550 f0 = div / N;551 f1 = (div - f0) / (N - 1);552 f2 = (div - f0 - f1) / (N - 2);553 f3 = div - f0 - f1 - f2;554 } else {555 N = 4;556 557 f0 = 16;558 f1 = 16;559 f2 = 16;560 f3 = 16;561 }562 563 if (f0 == 16)564 f0 = 0;565 else if ((f0 < 9) && (f0 != 0))566 f0 = 9;567 568 if (f1 == 16)569 f1 = 0;570 else if ((f1 < 9) && (f1 != 0))571 f1 = 9;572 573 if (f2 == 16)574 f2 = 0;575 else if ((f2 < 9) && (f2 != 0))576 f2 = 9;577 578 if (f3 == 16)579 f3 = 0;580 else if ((f3 < 9) && (f3 != 0))581 f3 = 9;582 }583 584 sm = N - 1;585 586 /* Write to registers */587 //reg15 &= 0x01;588 //reg15 |= (pll_div_fb >> 8) & 0x01;589 590 //reg16 = pll_div_fb & 0xFF;591 592 reg1D &= ~0x03;593 reg1D |= sm;594 reg1D |= 0x80;595 596 reg1E = ((f3 << 4) + f2) & 0xFF;597 reg1F = ((f1 << 4) + f0) & 0xFF;598 599 m88ds3103b_dt_write(dev, 0x05, 0x40);600 m88ds3103b_dt_write(dev, 0x11, 0x08);601 m88ds3103b_dt_write(dev, 0x1D, reg1D);602 m88ds3103b_dt_write(dev, 0x1E, reg1E);603 m88ds3103b_dt_write(dev, 0x1F, reg1F);604 605 m88ds3103b_dt_write(dev, 0x17, 0xc1);606 m88ds3103b_dt_write(dev, 0x17, 0x81);607 608 usleep_range(5000, 5500);609 610 m88ds3103b_dt_write(dev, 0x05, 0x00);611 m88ds3103b_dt_write(dev, 0x11, 0x0A);612 613 usleep_range(5000, 5500);614 615 return 0;616}617 618static int m88ds3103_set_frontend(struct dvb_frontend *fe)619{620 struct m88ds3103_dev *dev = fe->demodulator_priv;621 struct i2c_client *client = dev->client;622 struct dtv_frontend_properties *c = &fe->dtv_property_cache;623 int ret, len;624 const struct m88ds3103_reg_val *init;625 u8 u8tmp, u8tmp1 = 0, u8tmp2 = 0; /* silence compiler warning */626 u8 buf[3];627 u16 u16tmp;628 u32 tuner_frequency_khz, target_mclk, u32tmp;629 s32 s32tmp;630 static const struct reg_sequence reset_buf[] = {631 {0x07, 0x80}, {0x07, 0x00}632 };633 634 dev_dbg(&client->dev,635 "delivery_system=%d modulation=%d frequency=%u symbol_rate=%d inversion=%d pilot=%d rolloff=%d\n",636 c->delivery_system, c->modulation, c->frequency, c->symbol_rate,637 c->inversion, c->pilot, c->rolloff);638 639 if (!dev->warm) {640 ret = -EAGAIN;641 goto err;642 }643 644 /* reset */645 ret = regmap_multi_reg_write(dev->regmap, reset_buf, 2);646 if (ret)647 goto err;648 649 /* Disable demod clock path */650 if (dev->chip_id == M88RS6000_CHIP_ID) {651 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B) {652 ret = regmap_read(dev->regmap, 0xb2, &u32tmp);653 if (ret)654 goto err;655 if (u32tmp == 0x01) {656 ret = regmap_write(dev->regmap, 0x00, 0x00);657 if (ret)658 goto err;659 ret = regmap_write(dev->regmap, 0xb2, 0x00);660 if (ret)661 goto err;662 }663 }664 665 ret = regmap_write(dev->regmap, 0x06, 0xe0);666 if (ret)667 goto err;668 }669 670 /* program tuner */671 if (fe->ops.tuner_ops.set_params) {672 ret = fe->ops.tuner_ops.set_params(fe);673 if (ret)674 goto err;675 }676 677 if (fe->ops.tuner_ops.get_frequency) {678 ret = fe->ops.tuner_ops.get_frequency(fe, &tuner_frequency_khz);679 if (ret)680 goto err;681 } else {682 /*683 * Use nominal target frequency as tuner driver does not provide684 * actual frequency used. Carrier offset calculation is not685 * valid.686 */687 tuner_frequency_khz = c->frequency;688 }689 690 /* set M88RS6000/DS3103B demod main mclk and ts mclk from tuner die */691 if (dev->chip_id == M88RS6000_CHIP_ID) {692 if (c->symbol_rate > 45010000)693 dev->mclk = 110250000;694 else695 dev->mclk = 96000000;696 697 if (c->delivery_system == SYS_DVBS)698 target_mclk = 96000000;699 else700 target_mclk = 144000000;701 702 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B) {703 m88ds3103b_select_mclk(dev);704 m88ds3103b_set_mclk(dev, target_mclk / 1000);705 }706 707 /* Enable demod clock path */708 ret = regmap_write(dev->regmap, 0x06, 0x00);709 if (ret)710 goto err;711 usleep_range(10000, 20000);712 } else {713 /* set M88DS3103 mclk and ts mclk. */714 dev->mclk = 96000000;715 716 switch (dev->cfg->ts_mode) {717 case M88DS3103_TS_SERIAL:718 case M88DS3103_TS_SERIAL_D7:719 target_mclk = dev->cfg->ts_clk;720 break;721 case M88DS3103_TS_PARALLEL:722 case M88DS3103_TS_CI:723 if (c->delivery_system == SYS_DVBS)724 target_mclk = 96000000;725 else {726 if (c->symbol_rate < 18000000)727 target_mclk = 96000000;728 else if (c->symbol_rate < 28000000)729 target_mclk = 144000000;730 else731 target_mclk = 192000000;732 }733 break;734 default:735 dev_dbg(&client->dev, "invalid ts_mode\n");736 ret = -EINVAL;737 goto err;738 }739 740 switch (target_mclk) {741 case 96000000:742 u8tmp1 = 0x02; /* 0b10 */743 u8tmp2 = 0x01; /* 0b01 */744 break;745 case 144000000:746 u8tmp1 = 0x00; /* 0b00 */747 u8tmp2 = 0x01; /* 0b01 */748 break;749 case 192000000:750 u8tmp1 = 0x03; /* 0b11 */751 u8tmp2 = 0x00; /* 0b00 */752 break;753 }754 ret = m88ds3103_update_bits(dev, 0x22, 0xc0, u8tmp1 << 6);755 if (ret)756 goto err;757 ret = m88ds3103_update_bits(dev, 0x24, 0xc0, u8tmp2 << 6);758 if (ret)759 goto err;760 }761 762 ret = regmap_write(dev->regmap, 0xb2, 0x01);763 if (ret)764 goto err;765 766 ret = regmap_write(dev->regmap, 0x00, 0x01);767 if (ret)768 goto err;769 770 switch (c->delivery_system) {771 case SYS_DVBS:772 if (dev->chip_id == M88RS6000_CHIP_ID) {773 len = ARRAY_SIZE(m88rs6000_dvbs_init_reg_vals);774 init = m88rs6000_dvbs_init_reg_vals;775 } else {776 len = ARRAY_SIZE(m88ds3103_dvbs_init_reg_vals);777 init = m88ds3103_dvbs_init_reg_vals;778 }779 break;780 case SYS_DVBS2:781 if (dev->chip_id == M88RS6000_CHIP_ID) {782 len = ARRAY_SIZE(m88rs6000_dvbs2_init_reg_vals);783 init = m88rs6000_dvbs2_init_reg_vals;784 } else {785 len = ARRAY_SIZE(m88ds3103_dvbs2_init_reg_vals);786 init = m88ds3103_dvbs2_init_reg_vals;787 }788 break;789 default:790 dev_dbg(&client->dev, "invalid delivery_system\n");791 ret = -EINVAL;792 goto err;793 }794 795 /* program init table */796 if (c->delivery_system != dev->delivery_system) {797 ret = m88ds3103_wr_reg_val_tab(dev, init, len);798 if (ret)799 goto err;800 }801 802 if (dev->chip_id == M88RS6000_CHIP_ID) {803 if (c->delivery_system == SYS_DVBS2 &&804 c->symbol_rate <= 5000000) {805 ret = regmap_write(dev->regmap, 0xc0, 0x04);806 if (ret)807 goto err;808 buf[0] = 0x09;809 buf[1] = 0x22;810 buf[2] = 0x88;811 ret = regmap_bulk_write(dev->regmap, 0x8a, buf, 3);812 if (ret)813 goto err;814 }815 ret = m88ds3103_update_bits(dev, 0x9d, 0x08, 0x08);816 if (ret)817 goto err;818 819 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B) {820 buf[0] = m88ds3103b_dt_read(dev, 0x15);821 buf[1] = m88ds3103b_dt_read(dev, 0x16);822 823 if (c->symbol_rate > 45010000) {824 buf[0] &= ~0x03;825 buf[0] |= 0x02;826 buf[0] |= ((147 - 32) >> 8) & 0x01;827 buf[1] = (147 - 32) & 0xFF;828 829 dev->mclk = 110250 * 1000;830 } else {831 buf[0] &= ~0x03;832 buf[0] |= ((128 - 32) >> 8) & 0x01;833 buf[1] = (128 - 32) & 0xFF;834 835 dev->mclk = 96000 * 1000;836 }837 m88ds3103b_dt_write(dev, 0x15, buf[0]);838 m88ds3103b_dt_write(dev, 0x16, buf[1]);839 840 regmap_read(dev->regmap, 0x30, &u32tmp);841 u32tmp &= ~0x80;842 regmap_write(dev->regmap, 0x30, u32tmp & 0xff);843 }844 845 ret = regmap_write(dev->regmap, 0xf1, 0x01);846 if (ret)847 goto err;848 849 if (dev->chiptype != M88DS3103_CHIPTYPE_3103B) {850 ret = m88ds3103_update_bits(dev, 0x30, 0x80, 0x80);851 if (ret)852 goto err;853 }854 }855 856 switch (dev->cfg->ts_mode) {857 case M88DS3103_TS_SERIAL:858 u8tmp1 = 0x00;859 u8tmp = 0x06;860 break;861 case M88DS3103_TS_SERIAL_D7:862 u8tmp1 = 0x20;863 u8tmp = 0x06;864 break;865 case M88DS3103_TS_PARALLEL:866 u8tmp = 0x02;867 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B) {868 u8tmp = 0x01;869 u8tmp1 = 0x01;870 }871 break;872 case M88DS3103_TS_CI:873 u8tmp = 0x03;874 break;875 default:876 dev_dbg(&client->dev, "invalid ts_mode\n");877 ret = -EINVAL;878 goto err;879 }880 881 if (dev->cfg->ts_clk_pol)882 u8tmp |= 0x40;883 884 /* TS mode */885 ret = regmap_write(dev->regmap, 0xfd, u8tmp);886 if (ret)887 goto err;888 889 switch (dev->cfg->ts_mode) {890 case M88DS3103_TS_SERIAL:891 case M88DS3103_TS_SERIAL_D7:892 ret = m88ds3103_update_bits(dev, 0x29, 0x20, u8tmp1);893 if (ret)894 goto err;895 u16tmp = 0;896 u8tmp1 = 0x3f;897 u8tmp2 = 0x3f;898 break;899 case M88DS3103_TS_PARALLEL:900 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B) {901 ret = m88ds3103_update_bits(dev, 0x29, 0x01, u8tmp1);902 if (ret)903 goto err;904 }905 fallthrough;906 default:907 u16tmp = DIV_ROUND_UP(target_mclk, dev->cfg->ts_clk);908 u8tmp1 = u16tmp / 2 - 1;909 u8tmp2 = DIV_ROUND_UP(u16tmp, 2) - 1;910 }911 912 dev_dbg(&client->dev, "target_mclk=%u ts_clk=%u ts_clk_divide_ratio=%u\n",913 target_mclk, dev->cfg->ts_clk, u16tmp);914 915 /* u8tmp1[5:2] => fe[3:0], u8tmp1[1:0] => ea[7:6] */916 /* u8tmp2[5:0] => ea[5:0] */917 u8tmp = (u8tmp1 >> 2) & 0x0f;918 ret = regmap_update_bits(dev->regmap, 0xfe, 0x0f, u8tmp);919 if (ret)920 goto err;921 u8tmp = ((u8tmp1 & 0x03) << 6) | u8tmp2 >> 0;922 ret = regmap_write(dev->regmap, 0xea, u8tmp);923 if (ret)924 goto err;925 926 if (c->symbol_rate <= 3000000)927 u8tmp = 0x20;928 else if (c->symbol_rate <= 10000000)929 u8tmp = 0x10;930 else931 u8tmp = 0x06;932 933 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B)934 m88ds3103b_set_mclk(dev, target_mclk / 1000);935 936 ret = regmap_write(dev->regmap, 0xc3, 0x08);937 if (ret)938 goto err;939 940 ret = regmap_write(dev->regmap, 0xc8, u8tmp);941 if (ret)942 goto err;943 944 ret = regmap_write(dev->regmap, 0xc4, 0x08);945 if (ret)946 goto err;947 948 ret = regmap_write(dev->regmap, 0xc7, 0x00);949 if (ret)950 goto err;951 952 u16tmp = DIV_ROUND_CLOSEST_ULL((u64)c->symbol_rate * 0x10000, dev->mclk);953 buf[0] = (u16tmp >> 0) & 0xff;954 buf[1] = (u16tmp >> 8) & 0xff;955 ret = regmap_bulk_write(dev->regmap, 0x61, buf, 2);956 if (ret)957 goto err;958 959 ret = m88ds3103_update_bits(dev, 0x4d, 0x02, dev->cfg->spec_inv << 1);960 if (ret)961 goto err;962 963 ret = m88ds3103_update_bits(dev, 0x30, 0x10, dev->cfg->agc_inv << 4);964 if (ret)965 goto err;966 967 ret = regmap_write(dev->regmap, 0x33, dev->cfg->agc);968 if (ret)969 goto err;970 971 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B) {972 /* enable/disable 192M LDPC clock */973 ret = m88ds3103_update_bits(dev, 0x29, 0x10,974 (c->delivery_system == SYS_DVBS) ? 0x10 : 0x0);975 if (ret)976 goto err;977 978 ret = m88ds3103_update_bits(dev, 0xc9, 0x08, 0x08);979 if (ret)980 goto err;981 }982 983 dev_dbg(&client->dev, "carrier offset=%d\n",984 (tuner_frequency_khz - c->frequency));985 986 /* Use 32-bit calc as there is no s64 version of DIV_ROUND_CLOSEST() */987 s32tmp = 0x10000 * (tuner_frequency_khz - c->frequency);988 s32tmp = DIV_ROUND_CLOSEST(s32tmp, dev->mclk / 1000);989 buf[0] = (s32tmp >> 0) & 0xff;990 buf[1] = (s32tmp >> 8) & 0xff;991 ret = regmap_bulk_write(dev->regmap, 0x5e, buf, 2);992 if (ret)993 goto err;994 995 ret = regmap_write(dev->regmap, 0x00, 0x00);996 if (ret)997 goto err;998 999 ret = regmap_write(dev->regmap, 0xb2, 0x00);1000 if (ret)1001 goto err;1002 1003 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B) {1004 /* to light up the LOCK led */1005 ret = m88ds3103_update_bits(dev, 0x11, 0x80, 0x00);1006 if (ret)1007 goto err;1008 }1009 1010 dev->delivery_system = c->delivery_system;1011 1012 return 0;1013err:1014 dev_dbg(&client->dev, "failed=%d\n", ret);1015 return ret;1016}1017 1018static int m88ds3103_init(struct dvb_frontend *fe)1019{1020 struct m88ds3103_dev *dev = fe->demodulator_priv;1021 struct i2c_client *client = dev->client;1022 struct dtv_frontend_properties *c = &fe->dtv_property_cache;1023 int ret, len, rem;1024 unsigned int utmp;1025 const struct firmware *firmware;1026 const char *name;1027 1028 dev_dbg(&client->dev, "\n");1029 1030 /* set cold state by default */1031 dev->warm = false;1032 1033 /* wake up device from sleep */1034 ret = m88ds3103_update_bits(dev, 0x08, 0x01, 0x01);1035 if (ret)1036 goto err;1037 ret = m88ds3103_update_bits(dev, 0x04, 0x01, 0x00);1038 if (ret)1039 goto err;1040 ret = m88ds3103_update_bits(dev, 0x23, 0x10, 0x00);1041 if (ret)1042 goto err;1043 1044 /* firmware status */1045 ret = regmap_read(dev->regmap, 0xb9, &utmp);1046 if (ret)1047 goto err;1048 1049 dev_dbg(&client->dev, "firmware=%02x\n", utmp);1050 1051 if (utmp)1052 goto warm;1053 1054 /* global reset, global diseqc reset, global fec reset */1055 ret = regmap_write(dev->regmap, 0x07, 0xe0);1056 if (ret)1057 goto err;1058 ret = regmap_write(dev->regmap, 0x07, 0x00);1059 if (ret)1060 goto err;1061 1062 /* cold state - try to download firmware */1063 dev_info(&client->dev, "found a '%s' in cold state\n",1064 dev->fe.ops.info.name);1065 1066 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B)1067 name = M88DS3103B_FIRMWARE;1068 else if (dev->chip_id == M88RS6000_CHIP_ID)1069 name = M88RS6000_FIRMWARE;1070 else1071 name = M88DS3103_FIRMWARE;1072 1073 /* request the firmware, this will block and timeout */1074 ret = request_firmware(&firmware, name, &client->dev);1075 if (ret) {1076 dev_err(&client->dev, "firmware file '%s' not found\n", name);1077 goto err;1078 }1079 1080 dev_info(&client->dev, "downloading firmware from file '%s'\n", name);1081 1082 ret = regmap_write(dev->regmap, 0xb2, 0x01);1083 if (ret)1084 goto err_release_firmware;1085 1086 for (rem = firmware->size; rem > 0; rem -= (dev->cfg->i2c_wr_max - 1)) {1087 len = min(dev->cfg->i2c_wr_max - 1, rem);1088 ret = regmap_bulk_write(dev->regmap, 0xb0,1089 &firmware->data[firmware->size - rem],1090 len);1091 if (ret) {1092 dev_err(&client->dev, "firmware download failed %d\n",1093 ret);1094 goto err_release_firmware;1095 }1096 }1097 1098 ret = regmap_write(dev->regmap, 0xb2, 0x00);1099 if (ret)1100 goto err_release_firmware;1101 1102 release_firmware(firmware);1103 1104 ret = regmap_read(dev->regmap, 0xb9, &utmp);1105 if (ret)1106 goto err;1107 1108 if (!utmp) {1109 ret = -EINVAL;1110 dev_info(&client->dev, "firmware did not run\n");1111 goto err;1112 }1113 1114 dev_info(&client->dev, "found a '%s' in warm state\n",1115 dev->fe.ops.info.name);1116 dev_info(&client->dev, "firmware version: %X.%X\n",1117 (utmp >> 4) & 0xf, (utmp >> 0 & 0xf));1118 1119 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B) {1120 m88ds3103b_dt_write(dev, 0x21, 0x92);1121 m88ds3103b_dt_write(dev, 0x15, 0x6C);1122 m88ds3103b_dt_write(dev, 0x17, 0xC1);1123 m88ds3103b_dt_write(dev, 0x17, 0x81);1124 }1125warm:1126 /* warm state */1127 dev->warm = true;1128 1129 /* init stats here in order signal app which stats are supported */1130 c->cnr.len = 1;1131 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;1132 c->post_bit_error.len = 1;1133 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;1134 c->post_bit_count.len = 1;1135 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;1136 1137 return 0;1138err_release_firmware:1139 release_firmware(firmware);1140err:1141 dev_dbg(&client->dev, "failed=%d\n", ret);1142 return ret;1143}1144 1145static int m88ds3103_sleep(struct dvb_frontend *fe)1146{1147 struct m88ds3103_dev *dev = fe->demodulator_priv;1148 struct i2c_client *client = dev->client;1149 int ret;1150 unsigned int utmp;1151 1152 dev_dbg(&client->dev, "\n");1153 1154 dev->fe_status = 0;1155 dev->delivery_system = SYS_UNDEFINED;1156 1157 /* TS Hi-Z */1158 if (dev->chip_id == M88RS6000_CHIP_ID)1159 utmp = 0x29;1160 else1161 utmp = 0x27;1162 ret = m88ds3103_update_bits(dev, utmp, 0x01, 0x00);1163 if (ret)1164 goto err;1165 1166 /* sleep */1167 ret = m88ds3103_update_bits(dev, 0x08, 0x01, 0x00);1168 if (ret)1169 goto err;1170 ret = m88ds3103_update_bits(dev, 0x04, 0x01, 0x01);1171 if (ret)1172 goto err;1173 ret = m88ds3103_update_bits(dev, 0x23, 0x10, 0x10);1174 if (ret)1175 goto err;1176 1177 return 0;1178err:1179 dev_dbg(&client->dev, "failed=%d\n", ret);1180 return ret;1181}1182 1183static int m88ds3103_get_frontend(struct dvb_frontend *fe,1184 struct dtv_frontend_properties *c)1185{1186 struct m88ds3103_dev *dev = fe->demodulator_priv;1187 struct i2c_client *client = dev->client;1188 int ret;1189 u8 buf[3];1190 1191 dev_dbg(&client->dev, "\n");1192 1193 if (!dev->warm || !(dev->fe_status & FE_HAS_LOCK)) {1194 ret = 0;1195 goto err;1196 }1197 1198 switch (c->delivery_system) {1199 case SYS_DVBS:1200 ret = regmap_bulk_read(dev->regmap, 0xe0, &buf[0], 1);1201 if (ret)1202 goto err;1203 1204 ret = regmap_bulk_read(dev->regmap, 0xe6, &buf[1], 1);1205 if (ret)1206 goto err;1207 1208 switch ((buf[0] >> 2) & 0x01) {1209 case 0:1210 c->inversion = INVERSION_OFF;1211 break;1212 case 1:1213 c->inversion = INVERSION_ON;1214 break;1215 }1216 1217 switch ((buf[1] >> 5) & 0x07) {1218 case 0:1219 c->fec_inner = FEC_7_8;1220 break;1221 case 1:1222 c->fec_inner = FEC_5_6;1223 break;1224 case 2:1225 c->fec_inner = FEC_3_4;1226 break;1227 case 3:1228 c->fec_inner = FEC_2_3;1229 break;1230 case 4:1231 c->fec_inner = FEC_1_2;1232 break;1233 default:1234 dev_dbg(&client->dev, "invalid fec_inner\n");1235 }1236 1237 c->modulation = QPSK;1238 1239 break;1240 case SYS_DVBS2:1241 ret = regmap_bulk_read(dev->regmap, 0x7e, &buf[0], 1);1242 if (ret)1243 goto err;1244 1245 ret = regmap_bulk_read(dev->regmap, 0x89, &buf[1], 1);1246 if (ret)1247 goto err;1248 1249 ret = regmap_bulk_read(dev->regmap, 0xf2, &buf[2], 1);1250 if (ret)1251 goto err;1252 1253 switch ((buf[0] >> 0) & 0x0f) {1254 case 2:1255 c->fec_inner = FEC_2_5;1256 break;1257 case 3:1258 c->fec_inner = FEC_1_2;1259 break;1260 case 4:1261 c->fec_inner = FEC_3_5;1262 break;1263 case 5:1264 c->fec_inner = FEC_2_3;1265 break;1266 case 6:1267 c->fec_inner = FEC_3_4;1268 break;1269 case 7:1270 c->fec_inner = FEC_4_5;1271 break;1272 case 8:1273 c->fec_inner = FEC_5_6;1274 break;1275 case 9:1276 c->fec_inner = FEC_8_9;1277 break;1278 case 10:1279 c->fec_inner = FEC_9_10;1280 break;1281 default:1282 dev_dbg(&client->dev, "invalid fec_inner\n");1283 }1284 1285 switch ((buf[0] >> 5) & 0x01) {1286 case 0:1287 c->pilot = PILOT_OFF;1288 break;1289 case 1:1290 c->pilot = PILOT_ON;1291 break;1292 }1293 1294 switch ((buf[0] >> 6) & 0x07) {1295 case 0:1296 c->modulation = QPSK;1297 break;1298 case 1:1299 c->modulation = PSK_8;1300 break;1301 case 2:1302 c->modulation = APSK_16;1303 break;1304 case 3:1305 c->modulation = APSK_32;1306 break;1307 default:1308 dev_dbg(&client->dev, "invalid modulation\n");1309 }1310 1311 switch ((buf[1] >> 7) & 0x01) {1312 case 0:1313 c->inversion = INVERSION_OFF;1314 break;1315 case 1:1316 c->inversion = INVERSION_ON;1317 break;1318 }1319 1320 switch ((buf[2] >> 0) & 0x03) {1321 case 0:1322 c->rolloff = ROLLOFF_35;1323 break;1324 case 1:1325 c->rolloff = ROLLOFF_25;1326 break;1327 case 2:1328 c->rolloff = ROLLOFF_20;1329 break;1330 default:1331 dev_dbg(&client->dev, "invalid rolloff\n");1332 }1333 break;1334 default:1335 dev_dbg(&client->dev, "invalid delivery_system\n");1336 ret = -EINVAL;1337 goto err;1338 }1339 1340 ret = regmap_bulk_read(dev->regmap, 0x6d, buf, 2);1341 if (ret)1342 goto err;1343 1344 c->symbol_rate = DIV_ROUND_CLOSEST_ULL((u64)(buf[1] << 8 | buf[0] << 0) * dev->mclk, 0x10000);1345 1346 return 0;1347err:1348 dev_dbg(&client->dev, "failed=%d\n", ret);1349 return ret;1350}1351 1352static int m88ds3103_read_snr(struct dvb_frontend *fe, u16 *snr)1353{1354 struct dtv_frontend_properties *c = &fe->dtv_property_cache;1355 1356 if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL)1357 *snr = div_s64(c->cnr.stat[0].svalue, 100);1358 else1359 *snr = 0;1360 1361 return 0;1362}1363 1364static int m88ds3103_read_ber(struct dvb_frontend *fe, u32 *ber)1365{1366 struct m88ds3103_dev *dev = fe->demodulator_priv;1367 1368 *ber = dev->dvbv3_ber;1369 1370 return 0;1371}1372 1373static int m88ds3103_set_tone(struct dvb_frontend *fe,1374 enum fe_sec_tone_mode fe_sec_tone_mode)1375{1376 struct m88ds3103_dev *dev = fe->demodulator_priv;1377 struct i2c_client *client = dev->client;1378 int ret;1379 unsigned int utmp, tone, reg_a1_mask;1380 1381 dev_dbg(&client->dev, "fe_sec_tone_mode=%d\n", fe_sec_tone_mode);1382 1383 if (!dev->warm) {1384 ret = -EAGAIN;1385 goto err;1386 }1387 1388 switch (fe_sec_tone_mode) {1389 case SEC_TONE_ON:1390 tone = 0;1391 reg_a1_mask = 0x47;1392 break;1393 case SEC_TONE_OFF:1394 tone = 1;1395 reg_a1_mask = 0x00;1396 break;1397 default:1398 dev_dbg(&client->dev, "invalid fe_sec_tone_mode\n");1399 ret = -EINVAL;1400 goto err;1401 }1402 1403 utmp = tone << 7 | dev->cfg->envelope_mode << 5;1404 ret = m88ds3103_update_bits(dev, 0xa2, 0xe0, utmp);1405 if (ret)1406 goto err;1407 1408 utmp = 1 << 2;1409 ret = m88ds3103_update_bits(dev, 0xa1, reg_a1_mask, utmp);1410 if (ret)1411 goto err;1412 1413 return 0;1414err:1415 dev_dbg(&client->dev, "failed=%d\n", ret);1416 return ret;1417}1418 1419static int m88ds3103_set_voltage(struct dvb_frontend *fe,1420 enum fe_sec_voltage fe_sec_voltage)1421{1422 struct m88ds3103_dev *dev = fe->demodulator_priv;1423 struct i2c_client *client = dev->client;1424 int ret;1425 unsigned int utmp;1426 bool voltage_sel, voltage_dis;1427 1428 dev_dbg(&client->dev, "fe_sec_voltage=%d\n", fe_sec_voltage);1429 1430 if (!dev->warm) {1431 ret = -EAGAIN;1432 goto err;1433 }1434 1435 switch (fe_sec_voltage) {1436 case SEC_VOLTAGE_18:1437 voltage_sel = true;1438 voltage_dis = false;1439 break;1440 case SEC_VOLTAGE_13:1441 voltage_sel = false;1442 voltage_dis = false;1443 break;1444 case SEC_VOLTAGE_OFF:1445 voltage_sel = false;1446 voltage_dis = true;1447 break;1448 default:1449 dev_dbg(&client->dev, "invalid fe_sec_voltage\n");1450 ret = -EINVAL;1451 goto err;1452 }1453 1454 /* output pin polarity */1455 voltage_sel ^= dev->cfg->lnb_hv_pol;1456 voltage_dis ^= dev->cfg->lnb_en_pol;1457 1458 utmp = voltage_dis << 1 | voltage_sel << 0;1459 ret = m88ds3103_update_bits(dev, 0xa2, 0x03, utmp);1460 if (ret)1461 goto err;1462 1463 return 0;1464err:1465 dev_dbg(&client->dev, "failed=%d\n", ret);1466 return ret;1467}1468 1469static int m88ds3103_diseqc_send_master_cmd(struct dvb_frontend *fe,1470 struct dvb_diseqc_master_cmd *diseqc_cmd)1471{1472 struct m88ds3103_dev *dev = fe->demodulator_priv;1473 struct i2c_client *client = dev->client;1474 int ret;1475 unsigned int utmp;1476 unsigned long timeout;1477 1478 dev_dbg(&client->dev, "msg=%*ph\n",1479 diseqc_cmd->msg_len, diseqc_cmd->msg);1480 1481 if (!dev->warm) {1482 ret = -EAGAIN;1483 goto err;1484 }1485 1486 if (diseqc_cmd->msg_len < 3 || diseqc_cmd->msg_len > 6) {1487 ret = -EINVAL;1488 goto err;1489 }1490 1491 utmp = dev->cfg->envelope_mode << 5;1492 ret = m88ds3103_update_bits(dev, 0xa2, 0xe0, utmp);1493 if (ret)1494 goto err;1495 1496 ret = regmap_bulk_write(dev->regmap, 0xa3, diseqc_cmd->msg,1497 diseqc_cmd->msg_len);1498 if (ret)1499 goto err;1500 1501 ret = regmap_write(dev->regmap, 0xa1,1502 (diseqc_cmd->msg_len - 1) << 3 | 0x07);1503 if (ret)1504 goto err;1505 1506 /* wait DiSEqC TX ready */1507 #define SEND_MASTER_CMD_TIMEOUT 1201508 timeout = jiffies + msecs_to_jiffies(SEND_MASTER_CMD_TIMEOUT);1509 1510 /* DiSEqC message period is 13.5 ms per byte */1511 utmp = diseqc_cmd->msg_len * 13500;1512 usleep_range(utmp - 4000, utmp);1513 1514 for (utmp = 1; !time_after(jiffies, timeout) && utmp;) {1515 ret = regmap_read(dev->regmap, 0xa1, &utmp);1516 if (ret)1517 goto err;1518 utmp = (utmp >> 6) & 0x1;1519 }1520 1521 if (utmp == 0) {1522 dev_dbg(&client->dev, "diseqc tx took %u ms\n",1523 jiffies_to_msecs(jiffies) -1524 (jiffies_to_msecs(timeout) - SEND_MASTER_CMD_TIMEOUT));1525 } else {1526 dev_dbg(&client->dev, "diseqc tx timeout\n");1527 1528 ret = m88ds3103_update_bits(dev, 0xa1, 0xc0, 0x40);1529 if (ret)1530 goto err;1531 }1532 1533 ret = m88ds3103_update_bits(dev, 0xa2, 0xc0, 0x80);1534 if (ret)1535 goto err;1536 1537 if (utmp == 1) {1538 ret = -ETIMEDOUT;1539 goto err;1540 }1541 1542 return 0;1543err:1544 dev_dbg(&client->dev, "failed=%d\n", ret);1545 return ret;1546}1547 1548static int m88ds3103_diseqc_send_burst(struct dvb_frontend *fe,1549 enum fe_sec_mini_cmd fe_sec_mini_cmd)1550{1551 struct m88ds3103_dev *dev = fe->demodulator_priv;1552 struct i2c_client *client = dev->client;1553 int ret;1554 unsigned int utmp, burst;1555 unsigned long timeout;1556 1557 dev_dbg(&client->dev, "fe_sec_mini_cmd=%d\n", fe_sec_mini_cmd);1558 1559 if (!dev->warm) {1560 ret = -EAGAIN;1561 goto err;1562 }1563 1564 utmp = dev->cfg->envelope_mode << 5;1565 ret = m88ds3103_update_bits(dev, 0xa2, 0xe0, utmp);1566 if (ret)1567 goto err;1568 1569 switch (fe_sec_mini_cmd) {1570 case SEC_MINI_A:1571 burst = 0x02;1572 break;1573 case SEC_MINI_B:1574 burst = 0x01;1575 break;1576 default:1577 dev_dbg(&client->dev, "invalid fe_sec_mini_cmd\n");1578 ret = -EINVAL;1579 goto err;1580 }1581 1582 ret = regmap_write(dev->regmap, 0xa1, burst);1583 if (ret)1584 goto err;1585 1586 /* wait DiSEqC TX ready */1587 #define SEND_BURST_TIMEOUT 401588 timeout = jiffies + msecs_to_jiffies(SEND_BURST_TIMEOUT);1589 1590 /* DiSEqC ToneBurst period is 12.5 ms */1591 usleep_range(8500, 12500);1592 1593 for (utmp = 1; !time_after(jiffies, timeout) && utmp;) {1594 ret = regmap_read(dev->regmap, 0xa1, &utmp);1595 if (ret)1596 goto err;1597 utmp = (utmp >> 6) & 0x1;1598 }1599 1600 if (utmp == 0) {1601 dev_dbg(&client->dev, "diseqc tx took %u ms\n",1602 jiffies_to_msecs(jiffies) -1603 (jiffies_to_msecs(timeout) - SEND_BURST_TIMEOUT));1604 } else {1605 dev_dbg(&client->dev, "diseqc tx timeout\n");1606 1607 ret = m88ds3103_update_bits(dev, 0xa1, 0xc0, 0x40);1608 if (ret)1609 goto err;1610 }1611 1612 ret = m88ds3103_update_bits(dev, 0xa2, 0xc0, 0x80);1613 if (ret)1614 goto err;1615 1616 if (utmp == 1) {1617 ret = -ETIMEDOUT;1618 goto err;1619 }1620 1621 return 0;1622err:1623 dev_dbg(&client->dev, "failed=%d\n", ret);1624 return ret;1625}1626 1627static int m88ds3103_get_tune_settings(struct dvb_frontend *fe,1628 struct dvb_frontend_tune_settings *s)1629{1630 s->min_delay_ms = 3000;1631 1632 return 0;1633}1634 1635static void m88ds3103_release(struct dvb_frontend *fe)1636{1637 struct m88ds3103_dev *dev = fe->demodulator_priv;1638 struct i2c_client *client = dev->client;1639 1640 i2c_unregister_device(client);1641}1642 1643static int m88ds3103_select(struct i2c_mux_core *muxc, u32 chan)1644{1645 struct m88ds3103_dev *dev = i2c_mux_priv(muxc);1646 struct i2c_client *client = dev->client;1647 int ret;1648 struct i2c_msg msg = {1649 .addr = client->addr,1650 .flags = 0,1651 .len = 2,1652 .buf = "\x03\x11",1653 };1654 1655 /* Open tuner I2C repeater for 1 xfer, closes automatically */1656 ret = __i2c_transfer(client->adapter, &msg, 1);1657 if (ret != 1) {1658 dev_warn(&client->dev, "i2c wr failed=%d\n", ret);1659 if (ret >= 0)1660 ret = -EREMOTEIO;1661 return ret;1662 }1663 1664 return 0;1665}1666 1667/*1668 * XXX: That is wrapper to m88ds3103_probe() via driver core in order to provide1669 * proper I2C client for legacy media attach binding.1670 * New users must use I2C client binding directly!1671 */1672struct dvb_frontend *m88ds3103_attach(const struct m88ds3103_config *cfg,1673 struct i2c_adapter *i2c,1674 struct i2c_adapter **tuner_i2c_adapter)1675{1676 struct i2c_client *client;1677 struct i2c_board_info board_info;1678 struct m88ds3103_platform_data pdata = {};1679 1680 pdata.clk = cfg->clock;1681 pdata.i2c_wr_max = cfg->i2c_wr_max;1682 pdata.ts_mode = cfg->ts_mode;1683 pdata.ts_clk = cfg->ts_clk;1684 pdata.ts_clk_pol = cfg->ts_clk_pol;1685 pdata.spec_inv = cfg->spec_inv;1686 pdata.agc = cfg->agc;1687 pdata.agc_inv = cfg->agc_inv;1688 pdata.clk_out = cfg->clock_out;1689 pdata.envelope_mode = cfg->envelope_mode;1690 pdata.lnb_hv_pol = cfg->lnb_hv_pol;1691 pdata.lnb_en_pol = cfg->lnb_en_pol;1692 pdata.attach_in_use = true;1693 1694 memset(&board_info, 0, sizeof(board_info));1695 strscpy(board_info.type, "m88ds3103", I2C_NAME_SIZE);1696 board_info.addr = cfg->i2c_addr;1697 board_info.platform_data = &pdata;1698 client = i2c_new_client_device(i2c, &board_info);1699 if (!i2c_client_has_driver(client))1700 return NULL;1701 1702 *tuner_i2c_adapter = pdata.get_i2c_adapter(client);1703 return pdata.get_dvb_frontend(client);1704}1705EXPORT_SYMBOL_GPL(m88ds3103_attach);1706 1707static const struct dvb_frontend_ops m88ds3103_ops = {1708 .delsys = {SYS_DVBS, SYS_DVBS2},1709 .info = {1710 .name = "Montage Technology M88DS3103",1711 .frequency_min_hz = 950 * MHz,1712 .frequency_max_hz = 2150 * MHz,1713 .frequency_tolerance_hz = 5 * MHz,1714 .symbol_rate_min = 1000000,1715 .symbol_rate_max = 45000000,1716 .caps = FE_CAN_INVERSION_AUTO |1717 FE_CAN_FEC_1_2 |1718 FE_CAN_FEC_2_3 |1719 FE_CAN_FEC_3_4 |1720 FE_CAN_FEC_4_5 |1721 FE_CAN_FEC_5_6 |1722 FE_CAN_FEC_6_7 |1723 FE_CAN_FEC_7_8 |1724 FE_CAN_FEC_8_9 |1725 FE_CAN_FEC_AUTO |1726 FE_CAN_QPSK |1727 FE_CAN_RECOVER |1728 FE_CAN_2G_MODULATION1729 },1730 1731 .release = m88ds3103_release,1732 1733 .get_tune_settings = m88ds3103_get_tune_settings,1734 1735 .init = m88ds3103_init,1736 .sleep = m88ds3103_sleep,1737 1738 .set_frontend = m88ds3103_set_frontend,1739 .get_frontend = m88ds3103_get_frontend,1740 1741 .read_status = m88ds3103_read_status,1742 .read_snr = m88ds3103_read_snr,1743 .read_ber = m88ds3103_read_ber,1744 1745 .diseqc_send_master_cmd = m88ds3103_diseqc_send_master_cmd,1746 .diseqc_send_burst = m88ds3103_diseqc_send_burst,1747 1748 .set_tone = m88ds3103_set_tone,1749 .set_voltage = m88ds3103_set_voltage,1750};1751 1752static struct dvb_frontend *m88ds3103_get_dvb_frontend(struct i2c_client *client)1753{1754 struct m88ds3103_dev *dev = i2c_get_clientdata(client);1755 1756 dev_dbg(&client->dev, "\n");1757 1758 return &dev->fe;1759}1760 1761static struct i2c_adapter *m88ds3103_get_i2c_adapter(struct i2c_client *client)1762{1763 struct m88ds3103_dev *dev = i2c_get_clientdata(client);1764 1765 dev_dbg(&client->dev, "\n");1766 1767 return dev->muxc->adapter[0];1768}1769 1770static int m88ds3103_probe(struct i2c_client *client)1771{1772 const struct i2c_device_id *id = i2c_client_get_device_id(client);1773 struct m88ds3103_dev *dev;1774 struct m88ds3103_platform_data *pdata = client->dev.platform_data;1775 int ret;1776 unsigned int utmp;1777 1778 dev = kzalloc(sizeof(*dev), GFP_KERNEL);1779 if (!dev) {1780 ret = -ENOMEM;1781 goto err;1782 }1783 1784 dev->client = client;1785 dev->config.clock = pdata->clk;1786 dev->config.i2c_wr_max = pdata->i2c_wr_max;1787 dev->config.ts_mode = pdata->ts_mode;1788 dev->config.ts_clk = pdata->ts_clk * 1000;1789 dev->config.ts_clk_pol = pdata->ts_clk_pol;1790 dev->config.spec_inv = pdata->spec_inv;1791 dev->config.agc_inv = pdata->agc_inv;1792 dev->config.clock_out = pdata->clk_out;1793 dev->config.envelope_mode = pdata->envelope_mode;1794 dev->config.agc = pdata->agc;1795 dev->config.lnb_hv_pol = pdata->lnb_hv_pol;1796 dev->config.lnb_en_pol = pdata->lnb_en_pol;1797 dev->cfg = &dev->config;1798 /* create regmap */1799 dev->regmap_config.reg_bits = 8;1800 dev->regmap_config.val_bits = 8;1801 dev->regmap_config.lock_arg = dev;1802 dev->regmap = devm_regmap_init_i2c(client, &dev->regmap_config);1803 if (IS_ERR(dev->regmap)) {1804 ret = PTR_ERR(dev->regmap);1805 goto err_kfree;1806 }1807 1808 /* 0x00: chip id[6:0], 0x01: chip ver[7:0], 0x02: chip ver[15:8] */1809 ret = regmap_read(dev->regmap, 0x00, &utmp);1810 if (ret)1811 goto err_kfree;1812 1813 dev->chip_id = utmp >> 1;1814 dev->chiptype = (u8)id->driver_data;1815 1816 dev_dbg(&client->dev, "chip_id=%02x\n", dev->chip_id);1817 1818 switch (dev->chip_id) {1819 case M88RS6000_CHIP_ID:1820 case M88DS3103_CHIP_ID:1821 break;1822 default:1823 ret = -ENODEV;1824 dev_err(&client->dev, "Unknown device. Chip_id=%02x\n", dev->chip_id);1825 goto err_kfree;1826 }1827 1828 switch (dev->cfg->clock_out) {1829 case M88DS3103_CLOCK_OUT_DISABLED:1830 utmp = 0x80;1831 break;1832 case M88DS3103_CLOCK_OUT_ENABLED:1833 utmp = 0x00;1834 break;1835 case M88DS3103_CLOCK_OUT_ENABLED_DIV2:1836 utmp = 0x10;1837 break;1838 default:1839 ret = -EINVAL;1840 goto err_kfree;1841 }1842 1843 if (!pdata->ts_clk) {1844 ret = -EINVAL;1845 goto err_kfree;1846 }1847 1848 /* 0x29 register is defined differently for m88rs6000. */1849 /* set internal tuner address to 0x21 */1850 if (dev->chip_id == M88RS6000_CHIP_ID)1851 utmp = 0x00;1852 1853 ret = regmap_write(dev->regmap, 0x29, utmp);1854 if (ret)1855 goto err_kfree;1856 1857 /* sleep */1858 ret = m88ds3103_update_bits(dev, 0x08, 0x01, 0x00);1859 if (ret)1860 goto err_kfree;1861 ret = m88ds3103_update_bits(dev, 0x04, 0x01, 0x01);1862 if (ret)1863 goto err_kfree;1864 ret = m88ds3103_update_bits(dev, 0x23, 0x10, 0x10);1865 if (ret)1866 goto err_kfree;1867 1868 /* create mux i2c adapter for tuner */1869 dev->muxc = i2c_mux_alloc(client->adapter, &client->dev, 1, 0, 0,1870 m88ds3103_select, NULL);1871 if (!dev->muxc) {1872 ret = -ENOMEM;1873 goto err_kfree;1874 }1875 dev->muxc->priv = dev;1876 ret = i2c_mux_add_adapter(dev->muxc, 0, 0);1877 if (ret)1878 goto err_kfree;1879 1880 /* create dvb_frontend */1881 memcpy(&dev->fe.ops, &m88ds3103_ops, sizeof(struct dvb_frontend_ops));1882 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B)1883 strscpy(dev->fe.ops.info.name, "Montage Technology M88DS3103B",1884 sizeof(dev->fe.ops.info.name));1885 else if (dev->chip_id == M88RS6000_CHIP_ID)1886 strscpy(dev->fe.ops.info.name, "Montage Technology M88RS6000",1887 sizeof(dev->fe.ops.info.name));1888 if (!pdata->attach_in_use)1889 dev->fe.ops.release = NULL;1890 dev->fe.demodulator_priv = dev;1891 i2c_set_clientdata(client, dev);1892 1893 /* setup callbacks */1894 pdata->get_dvb_frontend = m88ds3103_get_dvb_frontend;1895 pdata->get_i2c_adapter = m88ds3103_get_i2c_adapter;1896 1897 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B) {1898 /* enable i2c repeater for tuner */1899 m88ds3103_update_bits(dev, 0x11, 0x01, 0x01);1900 1901 /* get frontend address */1902 ret = regmap_read(dev->regmap, 0x29, &utmp);1903 if (ret)1904 goto err_del_adapters;1905 dev->dt_addr = ((utmp & 0x80) == 0) ? 0x42 >> 1 : 0x40 >> 1;1906 dev_dbg(&client->dev, "dt addr is 0x%02x\n", dev->dt_addr);1907 1908 dev->dt_client = i2c_new_dummy_device(client->adapter,1909 dev->dt_addr);1910 if (IS_ERR(dev->dt_client)) {1911 ret = PTR_ERR(dev->dt_client);1912 goto err_del_adapters;1913 }1914 }1915 1916 return 0;1917 1918err_del_adapters:1919 i2c_mux_del_adapters(dev->muxc);1920err_kfree:1921 kfree(dev);1922err:1923 dev_dbg(&client->dev, "failed=%d\n", ret);1924 return ret;1925}1926 1927static void m88ds3103_remove(struct i2c_client *client)1928{1929 struct m88ds3103_dev *dev = i2c_get_clientdata(client);1930 1931 dev_dbg(&client->dev, "\n");1932 1933 i2c_unregister_device(dev->dt_client);1934 1935 i2c_mux_del_adapters(dev->muxc);1936 1937 kfree(dev);1938}1939 1940static const struct i2c_device_id m88ds3103_id_table[] = {1941 {"m88ds3103", M88DS3103_CHIPTYPE_3103},1942 {"m88rs6000", M88DS3103_CHIPTYPE_RS6000},1943 {"m88ds3103b", M88DS3103_CHIPTYPE_3103B},1944 {}1945};1946MODULE_DEVICE_TABLE(i2c, m88ds3103_id_table);1947 1948static struct i2c_driver m88ds3103_driver = {1949 .driver = {1950 .name = "m88ds3103",1951 .suppress_bind_attrs = true,1952 },1953 .probe = m88ds3103_probe,1954 .remove = m88ds3103_remove,1955 .id_table = m88ds3103_id_table,1956};1957 1958module_i2c_driver(m88ds3103_driver);1959 1960MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");1961MODULE_DESCRIPTION("Montage Technology M88DS3103 DVB-S/S2 demodulator driver");1962MODULE_LICENSE("GPL");1963MODULE_FIRMWARE(M88DS3103_FIRMWARE);1964MODULE_FIRMWARE(M88RS6000_FIRMWARE);1965MODULE_FIRMWARE(M88DS3103B_FIRMWARE);1966