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1/* SPDX-License-Identifier: GPL-2.0-or-later */2/*3 * Driver for Zarlink DVB-T MT352 demodulator4 *5 * Written by Holger Waechtler <holger@qanu.de>6 * and Daniel Mack <daniel@qanu.de>7 *8 * AVerMedia AVerTV DVB-T 771 support by9 * Wolfram Joost <dbox2@frokaschwei.de>10 *11 * Support for Samsung TDTC9251DH01C(M) tuner12 * Copyright (C) 2004 Antonio Mancuso <antonio.mancuso@digitaltelevision.it>13 * Amauri Celani <acelani@essegi.net>14 *15 * DVICO FusionHDTV DVB-T1 and DVICO FusionHDTV DVB-T Lite support by16 * Christopher Pascoe <c.pascoe@itee.uq.edu.au>17 */18 19#ifndef _MT352_PRIV_20#define _MT352_PRIV_21 22#define ID_MT352 0x1323 24#define msb(x) (((x) >> 8) & 0xff)25#define lsb(x) ((x) & 0xff)26 27enum mt352_reg_addr {28 STATUS_0 = 0x00,29 STATUS_1 = 0x01,30 STATUS_2 = 0x02,31 STATUS_3 = 0x03,32 STATUS_4 = 0x04,33 INTERRUPT_0 = 0x05,34 INTERRUPT_1 = 0x06,35 INTERRUPT_2 = 0x07,36 INTERRUPT_3 = 0x08,37 SNR = 0x09,38 VIT_ERR_CNT_2 = 0x0A,39 VIT_ERR_CNT_1 = 0x0B,40 VIT_ERR_CNT_0 = 0x0C,41 RS_ERR_CNT_2 = 0x0D,42 RS_ERR_CNT_1 = 0x0E,43 RS_ERR_CNT_0 = 0x0F,44 RS_UBC_1 = 0x10,45 RS_UBC_0 = 0x11,46 AGC_GAIN_3 = 0x12,47 AGC_GAIN_2 = 0x13,48 AGC_GAIN_1 = 0x14,49 AGC_GAIN_0 = 0x15,50 FREQ_OFFSET_2 = 0x17,51 FREQ_OFFSET_1 = 0x18,52 FREQ_OFFSET_0 = 0x19,53 TIMING_OFFSET_1 = 0x1A,54 TIMING_OFFSET_0 = 0x1B,55 CHAN_FREQ_1 = 0x1C,56 CHAN_FREQ_0 = 0x1D,57 TPS_RECEIVED_1 = 0x1E,58 TPS_RECEIVED_0 = 0x1F,59 TPS_CURRENT_1 = 0x20,60 TPS_CURRENT_0 = 0x21,61 TPS_CELL_ID_1 = 0x22,62 TPS_CELL_ID_0 = 0x23,63 TPS_MISC_DATA_2 = 0x24,64 TPS_MISC_DATA_1 = 0x25,65 TPS_MISC_DATA_0 = 0x26,66 RESET = 0x50,67 TPS_GIVEN_1 = 0x51,68 TPS_GIVEN_0 = 0x52,69 ACQ_CTL = 0x53,70 TRL_NOMINAL_RATE_1 = 0x54,71 TRL_NOMINAL_RATE_0 = 0x55,72 INPUT_FREQ_1 = 0x56,73 INPUT_FREQ_0 = 0x57,74 TUNER_ADDR = 0x58,75 CHAN_START_1 = 0x59,76 CHAN_START_0 = 0x5A,77 CONT_1 = 0x5B,78 CONT_0 = 0x5C,79 TUNER_GO = 0x5D,80 STATUS_EN_0 = 0x5F,81 STATUS_EN_1 = 0x60,82 INTERRUPT_EN_0 = 0x61,83 INTERRUPT_EN_1 = 0x62,84 INTERRUPT_EN_2 = 0x63,85 INTERRUPT_EN_3 = 0x64,86 AGC_TARGET = 0x67,87 AGC_CTL = 0x68,88 CAPT_RANGE = 0x75,89 SNR_SELECT_1 = 0x79,90 SNR_SELECT_0 = 0x7A,91 RS_ERR_PER_1 = 0x7C,92 RS_ERR_PER_0 = 0x7D,93 CHIP_ID = 0x7F,94 CHAN_STOP_1 = 0x80,95 CHAN_STOP_0 = 0x81,96 CHAN_STEP_1 = 0x82,97 CHAN_STEP_0 = 0x83,98 FEC_LOCK_TIME = 0x85,99 OFDM_LOCK_TIME = 0x86,100 ACQ_DELAY = 0x87,101 SCAN_CTL = 0x88,102 CLOCK_CTL = 0x89,103 CONFIG = 0x8A,104 MCLK_RATIO = 0x8B,105 GPP_CTL = 0x8C,106 ADC_CTL_1 = 0x8E,107 ADC_CTL_0 = 0x8F108};109 110/* here we assume 1/6MHz == 166.66kHz stepsize */111#define IF_FREQUENCYx6 217 /* 6 * 36.16666666667MHz */112 113#endif /* _MT352_PRIV_ */114