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1// SPDX-License-Identifier: GPL-2.0-or-later2/*3 Samsung S5H1409 VSB/QAM demodulator driver4 5 Copyright (C) 2006 Steven Toth <stoth@linuxtv.org>6 7 8*/9 10#include <linux/kernel.h>11#include <linux/init.h>12#include <linux/module.h>13#include <linux/string.h>14#include <linux/slab.h>15#include <linux/delay.h>16#include <media/dvb_frontend.h>17#include "s5h1409.h"18 19struct s5h1409_state {20 21 struct i2c_adapter *i2c;22 23 /* configuration settings */24 const struct s5h1409_config *config;25 26 struct dvb_frontend frontend;27 28 /* previous uncorrected block counter */29 enum fe_modulation current_modulation;30 31 u32 current_frequency;32 int if_freq;33 34 u32 is_qam_locked;35 36 /* QAM tuning state goes through the following state transitions */37#define QAM_STATE_UNTUNED 038#define QAM_STATE_TUNING_STARTED 139#define QAM_STATE_INTERLEAVE_SET 240#define QAM_STATE_QAM_OPTIMIZED_L1 341#define QAM_STATE_QAM_OPTIMIZED_L2 442#define QAM_STATE_QAM_OPTIMIZED_L3 543 u8 qam_state;44};45 46static int debug;47module_param(debug, int, 0644);48MODULE_PARM_DESC(debug, "Enable verbose debug messages");49 50#define dprintk if (debug) printk51 52/* Register values to initialise the demod, this will set VSB by default */53static struct init_tab {54 u8 reg;55 u16 data;56} init_tab[] = {57 { 0x00, 0x0071, },58 { 0x01, 0x3213, },59 { 0x09, 0x0025, },60 { 0x1c, 0x001d, },61 { 0x1f, 0x002d, },62 { 0x20, 0x001d, },63 { 0x22, 0x0022, },64 { 0x23, 0x0020, },65 { 0x29, 0x110f, },66 { 0x2a, 0x10b4, },67 { 0x2b, 0x10ae, },68 { 0x2c, 0x0031, },69 { 0x31, 0x010d, },70 { 0x32, 0x0100, },71 { 0x44, 0x0510, },72 { 0x54, 0x0104, },73 { 0x58, 0x2222, },74 { 0x59, 0x1162, },75 { 0x5a, 0x3211, },76 { 0x5d, 0x0370, },77 { 0x5e, 0x0296, },78 { 0x61, 0x0010, },79 { 0x63, 0x4a00, },80 { 0x65, 0x0800, },81 { 0x71, 0x0003, },82 { 0x72, 0x0470, },83 { 0x81, 0x0002, },84 { 0x82, 0x0600, },85 { 0x86, 0x0002, },86 { 0x8a, 0x2c38, },87 { 0x8b, 0x2a37, },88 { 0x92, 0x302f, },89 { 0x93, 0x3332, },90 { 0x96, 0x000c, },91 { 0x99, 0x0101, },92 { 0x9c, 0x2e37, },93 { 0x9d, 0x2c37, },94 { 0x9e, 0x2c37, },95 { 0xab, 0x0100, },96 { 0xac, 0x1003, },97 { 0xad, 0x103f, },98 { 0xe2, 0x0100, },99 { 0xe3, 0x1000, },100 { 0x28, 0x1010, },101 { 0xb1, 0x000e, },102};103 104/* VSB SNR lookup table */105static struct vsb_snr_tab {106 u16 val;107 u16 data;108} vsb_snr_tab[] = {109 { 924, 300, },110 { 923, 300, },111 { 918, 295, },112 { 915, 290, },113 { 911, 285, },114 { 906, 280, },115 { 901, 275, },116 { 896, 270, },117 { 891, 265, },118 { 885, 260, },119 { 879, 255, },120 { 873, 250, },121 { 864, 245, },122 { 858, 240, },123 { 850, 235, },124 { 841, 230, },125 { 832, 225, },126 { 823, 220, },127 { 812, 215, },128 { 802, 210, },129 { 788, 205, },130 { 778, 200, },131 { 767, 195, },132 { 753, 190, },133 { 740, 185, },134 { 725, 180, },135 { 707, 175, },136 { 689, 170, },137 { 671, 165, },138 { 656, 160, },139 { 637, 155, },140 { 616, 150, },141 { 542, 145, },142 { 519, 140, },143 { 507, 135, },144 { 497, 130, },145 { 492, 125, },146 { 474, 120, },147 { 300, 111, },148 { 0, 0, },149};150 151/* QAM64 SNR lookup table */152static struct qam64_snr_tab {153 u16 val;154 u16 data;155} qam64_snr_tab[] = {156 { 1, 0, },157 { 12, 300, },158 { 15, 290, },159 { 18, 280, },160 { 22, 270, },161 { 23, 268, },162 { 24, 266, },163 { 25, 264, },164 { 27, 262, },165 { 28, 260, },166 { 29, 258, },167 { 30, 256, },168 { 32, 254, },169 { 33, 252, },170 { 34, 250, },171 { 35, 249, },172 { 36, 248, },173 { 37, 247, },174 { 38, 246, },175 { 39, 245, },176 { 40, 244, },177 { 41, 243, },178 { 42, 241, },179 { 43, 240, },180 { 44, 239, },181 { 45, 238, },182 { 46, 237, },183 { 47, 236, },184 { 48, 235, },185 { 49, 234, },186 { 50, 233, },187 { 51, 232, },188 { 52, 231, },189 { 53, 230, },190 { 55, 229, },191 { 56, 228, },192 { 57, 227, },193 { 58, 226, },194 { 59, 225, },195 { 60, 224, },196 { 62, 223, },197 { 63, 222, },198 { 65, 221, },199 { 66, 220, },200 { 68, 219, },201 { 69, 218, },202 { 70, 217, },203 { 72, 216, },204 { 73, 215, },205 { 75, 214, },206 { 76, 213, },207 { 78, 212, },208 { 80, 211, },209 { 81, 210, },210 { 83, 209, },211 { 84, 208, },212 { 85, 207, },213 { 87, 206, },214 { 89, 205, },215 { 91, 204, },216 { 93, 203, },217 { 95, 202, },218 { 96, 201, },219 { 104, 200, },220 { 255, 0, },221};222 223/* QAM256 SNR lookup table */224static struct qam256_snr_tab {225 u16 val;226 u16 data;227} qam256_snr_tab[] = {228 { 1, 0, },229 { 12, 400, },230 { 13, 390, },231 { 15, 380, },232 { 17, 360, },233 { 19, 350, },234 { 22, 348, },235 { 23, 346, },236 { 24, 344, },237 { 25, 342, },238 { 26, 340, },239 { 27, 336, },240 { 28, 334, },241 { 29, 332, },242 { 30, 330, },243 { 31, 328, },244 { 32, 326, },245 { 33, 325, },246 { 34, 322, },247 { 35, 320, },248 { 37, 318, },249 { 39, 316, },250 { 40, 314, },251 { 41, 312, },252 { 42, 310, },253 { 43, 308, },254 { 46, 306, },255 { 47, 304, },256 { 49, 302, },257 { 51, 300, },258 { 53, 298, },259 { 54, 297, },260 { 55, 296, },261 { 56, 295, },262 { 57, 294, },263 { 59, 293, },264 { 60, 292, },265 { 61, 291, },266 { 63, 290, },267 { 64, 289, },268 { 65, 288, },269 { 66, 287, },270 { 68, 286, },271 { 69, 285, },272 { 71, 284, },273 { 72, 283, },274 { 74, 282, },275 { 75, 281, },276 { 76, 280, },277 { 77, 279, },278 { 78, 278, },279 { 81, 277, },280 { 83, 276, },281 { 84, 275, },282 { 86, 274, },283 { 87, 273, },284 { 89, 272, },285 { 90, 271, },286 { 92, 270, },287 { 93, 269, },288 { 95, 268, },289 { 96, 267, },290 { 98, 266, },291 { 100, 265, },292 { 102, 264, },293 { 104, 263, },294 { 105, 262, },295 { 106, 261, },296 { 110, 260, },297 { 255, 0, },298};299 300/* 8 bit registers, 16 bit values */301static int s5h1409_writereg(struct s5h1409_state *state, u8 reg, u16 data)302{303 int ret;304 u8 buf[] = { reg, data >> 8, data & 0xff };305 306 struct i2c_msg msg = { .addr = state->config->demod_address,307 .flags = 0, .buf = buf, .len = 3 };308 309 ret = i2c_transfer(state->i2c, &msg, 1);310 311 if (ret != 1)312 printk(KERN_ERR "%s: error (reg == 0x%02x, val == 0x%04x, ret == %i)\n",313 __func__, reg, data, ret);314 315 return (ret != 1) ? -1 : 0;316}317 318static u16 s5h1409_readreg(struct s5h1409_state *state, u8 reg)319{320 int ret;321 u8 b0[] = { reg };322 u8 b1[] = { 0, 0 };323 324 struct i2c_msg msg[] = {325 { .addr = state->config->demod_address, .flags = 0,326 .buf = b0, .len = 1 },327 { .addr = state->config->demod_address, .flags = I2C_M_RD,328 .buf = b1, .len = 2 } };329 330 ret = i2c_transfer(state->i2c, msg, 2);331 332 if (ret != 2)333 printk("%s: readreg error (ret == %i)\n", __func__, ret);334 return (b1[0] << 8) | b1[1];335}336 337static int s5h1409_softreset(struct dvb_frontend *fe)338{339 struct s5h1409_state *state = fe->demodulator_priv;340 341 dprintk("%s()\n", __func__);342 343 s5h1409_writereg(state, 0xf5, 0);344 s5h1409_writereg(state, 0xf5, 1);345 state->is_qam_locked = 0;346 state->qam_state = QAM_STATE_UNTUNED;347 return 0;348}349 350#define S5H1409_VSB_IF_FREQ 5380351#define S5H1409_QAM_IF_FREQ (state->config->qam_if)352 353static int s5h1409_set_if_freq(struct dvb_frontend *fe, int KHz)354{355 struct s5h1409_state *state = fe->demodulator_priv;356 357 dprintk("%s(%d KHz)\n", __func__, KHz);358 359 switch (KHz) {360 case 4000:361 s5h1409_writereg(state, 0x87, 0x014b);362 s5h1409_writereg(state, 0x88, 0x0cb5);363 s5h1409_writereg(state, 0x89, 0x03e2);364 break;365 case 5380:366 case 44000:367 default:368 s5h1409_writereg(state, 0x87, 0x01be);369 s5h1409_writereg(state, 0x88, 0x0436);370 s5h1409_writereg(state, 0x89, 0x054d);371 break;372 }373 state->if_freq = KHz;374 375 return 0;376}377 378static int s5h1409_set_spectralinversion(struct dvb_frontend *fe, int inverted)379{380 struct s5h1409_state *state = fe->demodulator_priv;381 382 dprintk("%s(%d)\n", __func__, inverted);383 384 if (inverted == 1)385 return s5h1409_writereg(state, 0x1b, 0x1101); /* Inverted */386 else387 return s5h1409_writereg(state, 0x1b, 0x0110); /* Normal */388}389 390static int s5h1409_enable_modulation(struct dvb_frontend *fe,391 enum fe_modulation m)392{393 struct s5h1409_state *state = fe->demodulator_priv;394 395 dprintk("%s(0x%08x)\n", __func__, m);396 397 switch (m) {398 case VSB_8:399 dprintk("%s() VSB_8\n", __func__);400 if (state->if_freq != S5H1409_VSB_IF_FREQ)401 s5h1409_set_if_freq(fe, S5H1409_VSB_IF_FREQ);402 s5h1409_writereg(state, 0xf4, 0);403 break;404 case QAM_64:405 case QAM_256:406 case QAM_AUTO:407 dprintk("%s() QAM_AUTO (64/256)\n", __func__);408 if (state->if_freq != S5H1409_QAM_IF_FREQ)409 s5h1409_set_if_freq(fe, S5H1409_QAM_IF_FREQ);410 s5h1409_writereg(state, 0xf4, 1);411 s5h1409_writereg(state, 0x85, 0x110);412 break;413 default:414 dprintk("%s() Invalid modulation\n", __func__);415 return -EINVAL;416 }417 418 state->current_modulation = m;419 s5h1409_softreset(fe);420 421 return 0;422}423 424static int s5h1409_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)425{426 struct s5h1409_state *state = fe->demodulator_priv;427 428 dprintk("%s(%d)\n", __func__, enable);429 430 if (enable)431 return s5h1409_writereg(state, 0xf3, 1);432 else433 return s5h1409_writereg(state, 0xf3, 0);434}435 436static int s5h1409_set_gpio(struct dvb_frontend *fe, int enable)437{438 struct s5h1409_state *state = fe->demodulator_priv;439 440 dprintk("%s(%d)\n", __func__, enable);441 442 if (enable)443 return s5h1409_writereg(state, 0xe3,444 s5h1409_readreg(state, 0xe3) | 0x1100);445 else446 return s5h1409_writereg(state, 0xe3,447 s5h1409_readreg(state, 0xe3) & 0xfeff);448}449 450static int s5h1409_sleep(struct dvb_frontend *fe, int enable)451{452 struct s5h1409_state *state = fe->demodulator_priv;453 454 dprintk("%s(%d)\n", __func__, enable);455 456 return s5h1409_writereg(state, 0xf2, enable);457}458 459static int s5h1409_register_reset(struct dvb_frontend *fe)460{461 struct s5h1409_state *state = fe->demodulator_priv;462 463 dprintk("%s()\n", __func__);464 465 return s5h1409_writereg(state, 0xfa, 0);466}467 468static void s5h1409_set_qam_amhum_mode(struct dvb_frontend *fe)469{470 struct s5h1409_state *state = fe->demodulator_priv;471 u16 reg;472 473 if (state->qam_state < QAM_STATE_INTERLEAVE_SET) {474 /* We should not perform amhum optimization until475 the interleave mode has been configured */476 return;477 }478 479 if (state->qam_state == QAM_STATE_QAM_OPTIMIZED_L3) {480 /* We've already reached the maximum optimization level, so481 don't bother banging on the status registers */482 return;483 }484 485 /* QAM EQ lock check */486 reg = s5h1409_readreg(state, 0xf0);487 488 if ((reg >> 13) & 0x1) {489 reg &= 0xff;490 491 s5h1409_writereg(state, 0x96, 0x000c);492 if (reg < 0x68) {493 if (state->qam_state < QAM_STATE_QAM_OPTIMIZED_L3) {494 dprintk("%s() setting QAM state to OPT_L3\n",495 __func__);496 s5h1409_writereg(state, 0x93, 0x3130);497 s5h1409_writereg(state, 0x9e, 0x2836);498 state->qam_state = QAM_STATE_QAM_OPTIMIZED_L3;499 }500 } else {501 if (state->qam_state < QAM_STATE_QAM_OPTIMIZED_L2) {502 dprintk("%s() setting QAM state to OPT_L2\n",503 __func__);504 s5h1409_writereg(state, 0x93, 0x3332);505 s5h1409_writereg(state, 0x9e, 0x2c37);506 state->qam_state = QAM_STATE_QAM_OPTIMIZED_L2;507 }508 }509 510 } else {511 if (state->qam_state < QAM_STATE_QAM_OPTIMIZED_L1) {512 dprintk("%s() setting QAM state to OPT_L1\n", __func__);513 s5h1409_writereg(state, 0x96, 0x0008);514 s5h1409_writereg(state, 0x93, 0x3332);515 s5h1409_writereg(state, 0x9e, 0x2c37);516 state->qam_state = QAM_STATE_QAM_OPTIMIZED_L1;517 }518 }519}520 521static void s5h1409_set_qam_amhum_mode_legacy(struct dvb_frontend *fe)522{523 struct s5h1409_state *state = fe->demodulator_priv;524 u16 reg;525 526 if (state->is_qam_locked)527 return;528 529 /* QAM EQ lock check */530 reg = s5h1409_readreg(state, 0xf0);531 532 if ((reg >> 13) & 0x1) {533 534 state->is_qam_locked = 1;535 reg &= 0xff;536 537 s5h1409_writereg(state, 0x96, 0x00c);538 if ((reg < 0x38) || (reg > 0x68)) {539 s5h1409_writereg(state, 0x93, 0x3332);540 s5h1409_writereg(state, 0x9e, 0x2c37);541 } else {542 s5h1409_writereg(state, 0x93, 0x3130);543 s5h1409_writereg(state, 0x9e, 0x2836);544 }545 546 } else {547 s5h1409_writereg(state, 0x96, 0x0008);548 s5h1409_writereg(state, 0x93, 0x3332);549 s5h1409_writereg(state, 0x9e, 0x2c37);550 }551}552 553static void s5h1409_set_qam_interleave_mode(struct dvb_frontend *fe)554{555 struct s5h1409_state *state = fe->demodulator_priv;556 u16 reg, reg1, reg2;557 558 if (state->qam_state >= QAM_STATE_INTERLEAVE_SET) {559 /* We've done the optimization already */560 return;561 }562 563 reg = s5h1409_readreg(state, 0xf1);564 565 /* Master lock */566 if ((reg >> 15) & 0x1) {567 if (state->qam_state == QAM_STATE_UNTUNED ||568 state->qam_state == QAM_STATE_TUNING_STARTED) {569 dprintk("%s() setting QAM state to INTERLEAVE_SET\n",570 __func__);571 reg1 = s5h1409_readreg(state, 0xb2);572 reg2 = s5h1409_readreg(state, 0xad);573 574 s5h1409_writereg(state, 0x96, 0x0020);575 s5h1409_writereg(state, 0xad,576 (((reg1 & 0xf000) >> 4) | (reg2 & 0xf0ff)));577 state->qam_state = QAM_STATE_INTERLEAVE_SET;578 }579 } else {580 if (state->qam_state == QAM_STATE_UNTUNED) {581 dprintk("%s() setting QAM state to TUNING_STARTED\n",582 __func__);583 s5h1409_writereg(state, 0x96, 0x08);584 s5h1409_writereg(state, 0xab,585 s5h1409_readreg(state, 0xab) | 0x1001);586 state->qam_state = QAM_STATE_TUNING_STARTED;587 }588 }589}590 591static void s5h1409_set_qam_interleave_mode_legacy(struct dvb_frontend *fe)592{593 struct s5h1409_state *state = fe->demodulator_priv;594 u16 reg, reg1, reg2;595 596 reg = s5h1409_readreg(state, 0xf1);597 598 /* Master lock */599 if ((reg >> 15) & 0x1) {600 if (state->qam_state != 2) {601 state->qam_state = 2;602 reg1 = s5h1409_readreg(state, 0xb2);603 reg2 = s5h1409_readreg(state, 0xad);604 605 s5h1409_writereg(state, 0x96, 0x20);606 s5h1409_writereg(state, 0xad,607 (((reg1 & 0xf000) >> 4) | (reg2 & 0xf0ff)));608 s5h1409_writereg(state, 0xab,609 s5h1409_readreg(state, 0xab) & 0xeffe);610 }611 } else {612 if (state->qam_state != 1) {613 state->qam_state = 1;614 s5h1409_writereg(state, 0x96, 0x08);615 s5h1409_writereg(state, 0xab,616 s5h1409_readreg(state, 0xab) | 0x1001);617 }618 }619}620 621/* Talk to the demod, set the FEC, GUARD, QAM settings etc */622static int s5h1409_set_frontend(struct dvb_frontend *fe)623{624 struct dtv_frontend_properties *p = &fe->dtv_property_cache;625 struct s5h1409_state *state = fe->demodulator_priv;626 627 dprintk("%s(frequency=%d)\n", __func__, p->frequency);628 629 s5h1409_softreset(fe);630 631 state->current_frequency = p->frequency;632 633 s5h1409_enable_modulation(fe, p->modulation);634 635 if (fe->ops.tuner_ops.set_params) {636 if (fe->ops.i2c_gate_ctrl)637 fe->ops.i2c_gate_ctrl(fe, 1);638 fe->ops.tuner_ops.set_params(fe);639 if (fe->ops.i2c_gate_ctrl)640 fe->ops.i2c_gate_ctrl(fe, 0);641 }642 643 /* Issue a reset to the demod so it knows to resync against the644 newly tuned frequency */645 s5h1409_softreset(fe);646 647 /* Optimize the demod for QAM */648 if (state->current_modulation != VSB_8) {649 /* This almost certainly applies to all boards, but for now650 only do it for the HVR-1600. Once the other boards are651 tested, the "legacy" versions can just go away */652 if (state->config->hvr1600_opt == S5H1409_HVR1600_OPTIMIZE) {653 s5h1409_set_qam_interleave_mode(fe);654 s5h1409_set_qam_amhum_mode(fe);655 } else {656 s5h1409_set_qam_amhum_mode_legacy(fe);657 s5h1409_set_qam_interleave_mode_legacy(fe);658 }659 }660 661 return 0;662}663 664static int s5h1409_set_mpeg_timing(struct dvb_frontend *fe, int mode)665{666 struct s5h1409_state *state = fe->demodulator_priv;667 u16 val;668 669 dprintk("%s(%d)\n", __func__, mode);670 671 val = s5h1409_readreg(state, 0xac) & 0xcfff;672 switch (mode) {673 case S5H1409_MPEGTIMING_CONTINUOUS_INVERTING_CLOCK:674 val |= 0x0000;675 break;676 case S5H1409_MPEGTIMING_CONTINUOUS_NONINVERTING_CLOCK:677 dprintk("%s(%d) Mode1 or Defaulting\n", __func__, mode);678 val |= 0x1000;679 break;680 case S5H1409_MPEGTIMING_NONCONTINUOUS_INVERTING_CLOCK:681 val |= 0x2000;682 break;683 case S5H1409_MPEGTIMING_NONCONTINUOUS_NONINVERTING_CLOCK:684 val |= 0x3000;685 break;686 default:687 return -EINVAL;688 }689 690 /* Configure MPEG Signal Timing charactistics */691 return s5h1409_writereg(state, 0xac, val);692}693 694/* Reset the demod hardware and reset all of the configuration registers695 to a default state. */696static int s5h1409_init(struct dvb_frontend *fe)697{698 int i;699 700 struct s5h1409_state *state = fe->demodulator_priv;701 dprintk("%s()\n", __func__);702 703 s5h1409_sleep(fe, 0);704 s5h1409_register_reset(fe);705 706 for (i = 0; i < ARRAY_SIZE(init_tab); i++)707 s5h1409_writereg(state, init_tab[i].reg, init_tab[i].data);708 709 /* The datasheet says that after initialisation, VSB is default */710 state->current_modulation = VSB_8;711 712 /* Optimize for the HVR-1600 if appropriate. Note that some of these713 may get folded into the generic case after testing with other714 devices */715 if (state->config->hvr1600_opt == S5H1409_HVR1600_OPTIMIZE) {716 /* VSB AGC REF */717 s5h1409_writereg(state, 0x09, 0x0050);718 719 /* Unknown but Windows driver does it... */720 s5h1409_writereg(state, 0x21, 0x0001);721 s5h1409_writereg(state, 0x50, 0x030e);722 723 /* QAM AGC REF */724 s5h1409_writereg(state, 0x82, 0x0800);725 }726 727 if (state->config->output_mode == S5H1409_SERIAL_OUTPUT)728 s5h1409_writereg(state, 0xab,729 s5h1409_readreg(state, 0xab) | 0x100); /* Serial */730 else731 s5h1409_writereg(state, 0xab,732 s5h1409_readreg(state, 0xab) & 0xfeff); /* Parallel */733 734 s5h1409_set_spectralinversion(fe, state->config->inversion);735 s5h1409_set_if_freq(fe, state->if_freq);736 s5h1409_set_gpio(fe, state->config->gpio);737 s5h1409_set_mpeg_timing(fe, state->config->mpeg_timing);738 s5h1409_softreset(fe);739 740 /* Note: Leaving the I2C gate closed. */741 s5h1409_i2c_gate_ctrl(fe, 0);742 743 return 0;744}745 746static int s5h1409_read_status(struct dvb_frontend *fe, enum fe_status *status)747{748 struct s5h1409_state *state = fe->demodulator_priv;749 u16 reg;750 u32 tuner_status = 0;751 752 *status = 0;753 754 /* Optimize the demod for QAM */755 if (state->current_modulation != VSB_8) {756 /* This almost certainly applies to all boards, but for now757 only do it for the HVR-1600. Once the other boards are758 tested, the "legacy" versions can just go away */759 if (state->config->hvr1600_opt == S5H1409_HVR1600_OPTIMIZE) {760 s5h1409_set_qam_interleave_mode(fe);761 s5h1409_set_qam_amhum_mode(fe);762 }763 }764 765 /* Get the demodulator status */766 reg = s5h1409_readreg(state, 0xf1);767 if (reg & 0x1000)768 *status |= FE_HAS_VITERBI;769 if (reg & 0x8000)770 *status |= FE_HAS_LOCK | FE_HAS_SYNC;771 772 switch (state->config->status_mode) {773 case S5H1409_DEMODLOCKING:774 if (*status & FE_HAS_VITERBI)775 *status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;776 break;777 case S5H1409_TUNERLOCKING:778 /* Get the tuner status */779 if (fe->ops.tuner_ops.get_status) {780 if (fe->ops.i2c_gate_ctrl)781 fe->ops.i2c_gate_ctrl(fe, 1);782 783 fe->ops.tuner_ops.get_status(fe, &tuner_status);784 785 if (fe->ops.i2c_gate_ctrl)786 fe->ops.i2c_gate_ctrl(fe, 0);787 }788 if (tuner_status)789 *status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;790 break;791 }792 793 dprintk("%s() status 0x%08x\n", __func__, *status);794 795 return 0;796}797 798static int s5h1409_qam256_lookup_snr(struct dvb_frontend *fe, u16 *snr, u16 v)799{800 int i, ret = -EINVAL;801 dprintk("%s()\n", __func__);802 803 for (i = 0; i < ARRAY_SIZE(qam256_snr_tab); i++) {804 if (v < qam256_snr_tab[i].val) {805 *snr = qam256_snr_tab[i].data;806 ret = 0;807 break;808 }809 }810 return ret;811}812 813static int s5h1409_qam64_lookup_snr(struct dvb_frontend *fe, u16 *snr, u16 v)814{815 int i, ret = -EINVAL;816 dprintk("%s()\n", __func__);817 818 for (i = 0; i < ARRAY_SIZE(qam64_snr_tab); i++) {819 if (v < qam64_snr_tab[i].val) {820 *snr = qam64_snr_tab[i].data;821 ret = 0;822 break;823 }824 }825 return ret;826}827 828static int s5h1409_vsb_lookup_snr(struct dvb_frontend *fe, u16 *snr, u16 v)829{830 int i, ret = -EINVAL;831 dprintk("%s()\n", __func__);832 833 for (i = 0; i < ARRAY_SIZE(vsb_snr_tab); i++) {834 if (v > vsb_snr_tab[i].val) {835 *snr = vsb_snr_tab[i].data;836 ret = 0;837 break;838 }839 }840 dprintk("%s() snr=%d\n", __func__, *snr);841 return ret;842}843 844static int s5h1409_read_snr(struct dvb_frontend *fe, u16 *snr)845{846 struct s5h1409_state *state = fe->demodulator_priv;847 u16 reg;848 dprintk("%s()\n", __func__);849 850 switch (state->current_modulation) {851 case QAM_64:852 reg = s5h1409_readreg(state, 0xf0) & 0xff;853 return s5h1409_qam64_lookup_snr(fe, snr, reg);854 case QAM_256:855 reg = s5h1409_readreg(state, 0xf0) & 0xff;856 return s5h1409_qam256_lookup_snr(fe, snr, reg);857 case VSB_8:858 reg = s5h1409_readreg(state, 0xf1) & 0x3ff;859 return s5h1409_vsb_lookup_snr(fe, snr, reg);860 default:861 break;862 }863 864 return -EINVAL;865}866 867static int s5h1409_read_signal_strength(struct dvb_frontend *fe,868 u16 *signal_strength)869{870 /* borrowed from lgdt330x.c871 *872 * Calculate strength from SNR up to 35dB873 * Even though the SNR can go higher than 35dB,874 * there is some comfort factor in having a range of875 * strong signals that can show at 100%876 */877 u16 snr;878 u32 tmp;879 int ret = s5h1409_read_snr(fe, &snr);880 881 *signal_strength = 0;882 883 if (0 == ret) {884 /* The following calculation method was chosen885 * purely for the sake of code re-use from the886 * other demod drivers that use this method */887 888 /* Convert from SNR in dB * 10 to 8.24 fixed-point */889 tmp = (snr * ((1 << 24) / 10));890 891 /* Convert from 8.24 fixed-point to892 * scale the range 0 - 35*2^24 into 0 - 65535*/893 if (tmp >= 8960 * 0x10000)894 *signal_strength = 0xffff;895 else896 *signal_strength = tmp / 8960;897 }898 899 return ret;900}901 902static int s5h1409_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)903{904 struct s5h1409_state *state = fe->demodulator_priv;905 906 *ucblocks = s5h1409_readreg(state, 0xb5);907 908 return 0;909}910 911static int s5h1409_read_ber(struct dvb_frontend *fe, u32 *ber)912{913 return s5h1409_read_ucblocks(fe, ber);914}915 916static int s5h1409_get_frontend(struct dvb_frontend *fe,917 struct dtv_frontend_properties *p)918{919 struct s5h1409_state *state = fe->demodulator_priv;920 921 p->frequency = state->current_frequency;922 p->modulation = state->current_modulation;923 924 return 0;925}926 927static int s5h1409_get_tune_settings(struct dvb_frontend *fe,928 struct dvb_frontend_tune_settings *tune)929{930 tune->min_delay_ms = 1000;931 return 0;932}933 934static void s5h1409_release(struct dvb_frontend *fe)935{936 struct s5h1409_state *state = fe->demodulator_priv;937 kfree(state);938}939 940static const struct dvb_frontend_ops s5h1409_ops;941 942struct dvb_frontend *s5h1409_attach(const struct s5h1409_config *config,943 struct i2c_adapter *i2c)944{945 struct s5h1409_state *state = NULL;946 u16 reg;947 948 /* allocate memory for the internal state */949 state = kzalloc(sizeof(struct s5h1409_state), GFP_KERNEL);950 if (state == NULL)951 goto error;952 953 /* setup the state */954 state->config = config;955 state->i2c = i2c;956 state->current_modulation = 0;957 state->if_freq = S5H1409_VSB_IF_FREQ;958 959 /* check if the demod exists */960 reg = s5h1409_readreg(state, 0x04);961 if ((reg != 0x0066) && (reg != 0x007f))962 goto error;963 964 /* create dvb_frontend */965 memcpy(&state->frontend.ops, &s5h1409_ops,966 sizeof(struct dvb_frontend_ops));967 state->frontend.demodulator_priv = state;968 969 if (s5h1409_init(&state->frontend) != 0) {970 printk(KERN_ERR "%s: Failed to initialize correctly\n",971 __func__);972 goto error;973 }974 975 /* Note: Leaving the I2C gate open here. */976 s5h1409_i2c_gate_ctrl(&state->frontend, 1);977 978 return &state->frontend;979 980error:981 kfree(state);982 return NULL;983}984EXPORT_SYMBOL_GPL(s5h1409_attach);985 986static const struct dvb_frontend_ops s5h1409_ops = {987 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },988 .info = {989 .name = "Samsung S5H1409 QAM/8VSB Frontend",990 .frequency_min_hz = 54 * MHz,991 .frequency_max_hz = 858 * MHz,992 .frequency_stepsize_hz = 62500,993 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB994 },995 996 .init = s5h1409_init,997 .i2c_gate_ctrl = s5h1409_i2c_gate_ctrl,998 .set_frontend = s5h1409_set_frontend,999 .get_frontend = s5h1409_get_frontend,1000 .get_tune_settings = s5h1409_get_tune_settings,1001 .read_status = s5h1409_read_status,1002 .read_ber = s5h1409_read_ber,1003 .read_signal_strength = s5h1409_read_signal_strength,1004 .read_snr = s5h1409_read_snr,1005 .read_ucblocks = s5h1409_read_ucblocks,1006 .release = s5h1409_release,1007};1008 1009MODULE_DESCRIPTION("Samsung S5H1409 QAM-B/ATSC Demodulator driver");1010MODULE_AUTHOR("Steven Toth");1011MODULE_LICENSE("GPL");1012