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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * Sharp VA3A5JZ921 One Seg Broadcast Module driver4 * This device is labeled as just S. 921 at the top of the frontend can5 *6 * Copyright (C) 2009-2010 Mauro Carvalho Chehab7 * Copyright (C) 2009-2010 Douglas Landgraf <dougsland@redhat.com>8 *9 * Developed for Leadership SBTVD 1seg device sold in Brazil10 *11 * Frontend module based on cx24123 driver, getting some info from12 * the old s921 driver.13 *14 * FIXME: Need to port to DVB v5.2 API15 */16 17#include <linux/kernel.h>18#include <asm/div64.h>19 20#include <media/dvb_frontend.h>21#include "s921.h"22 23static int debug = 1;24module_param(debug, int, 0644);25MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");26 27#define rc(args...) do { \28 printk(KERN_ERR "s921: " args); \29} while (0)30 31#define dprintk(args...) \32 do { \33 if (debug) { \34 printk(KERN_DEBUG "s921: %s: ", __func__); \35 printk(args); \36 } \37 } while (0)38 39struct s921_state {40 struct i2c_adapter *i2c;41 const struct s921_config *config;42 43 struct dvb_frontend frontend;44 45 /* The Demod can't easily provide these, we cache them */46 u32 currentfreq;47};48 49/*50 * Various tuner defaults need to be established for a given frequency kHz.51 * fixme: The bounds on the bands do not match the doc in real life.52 * fixme: Some of them have been moved, other might need adjustment.53 */54static struct s921_bandselect_val {55 u32 freq_low;56 u8 band_reg;57} s921_bandselect[] = {58 { 0, 0x7b },59 { 485140000, 0x5b },60 { 515140000, 0x3b },61 { 545140000, 0x1b },62 { 599140000, 0xfb },63 { 623140000, 0xdb },64 { 659140000, 0xbb },65 { 713140000, 0x9b },66};67 68struct regdata {69 u8 reg;70 u8 data;71};72 73static struct regdata s921_init[] = {74 { 0x01, 0x80 }, /* Probably, a reset sequence */75 { 0x01, 0x40 },76 { 0x01, 0x80 },77 { 0x01, 0x40 },78 79 { 0x02, 0x00 },80 { 0x03, 0x40 },81 { 0x04, 0x01 },82 { 0x05, 0x00 },83 { 0x06, 0x00 },84 { 0x07, 0x00 },85 { 0x08, 0x00 },86 { 0x09, 0x00 },87 { 0x0a, 0x00 },88 { 0x0b, 0x5a },89 { 0x0c, 0x00 },90 { 0x0d, 0x00 },91 { 0x0f, 0x00 },92 { 0x13, 0x1b },93 { 0x14, 0x80 },94 { 0x15, 0x40 },95 { 0x17, 0x70 },96 { 0x18, 0x01 },97 { 0x19, 0x12 },98 { 0x1a, 0x01 },99 { 0x1b, 0x12 },100 { 0x1c, 0xa0 },101 { 0x1d, 0x00 },102 { 0x1e, 0x0a },103 { 0x1f, 0x08 },104 { 0x20, 0x40 },105 { 0x21, 0xff },106 { 0x22, 0x4c },107 { 0x23, 0x4e },108 { 0x24, 0x4c },109 { 0x25, 0x00 },110 { 0x26, 0x00 },111 { 0x27, 0xf4 },112 { 0x28, 0x60 },113 { 0x29, 0x88 },114 { 0x2a, 0x40 },115 { 0x2b, 0x40 },116 { 0x2c, 0xff },117 { 0x2d, 0x00 },118 { 0x2e, 0xff },119 { 0x2f, 0x00 },120 { 0x30, 0x20 },121 { 0x31, 0x06 },122 { 0x32, 0x0c },123 { 0x34, 0x0f },124 { 0x37, 0xfe },125 { 0x38, 0x00 },126 { 0x39, 0x63 },127 { 0x3a, 0x10 },128 { 0x3b, 0x10 },129 { 0x47, 0x00 },130 { 0x49, 0xe5 },131 { 0x4b, 0x00 },132 { 0x50, 0xc0 },133 { 0x52, 0x20 },134 { 0x54, 0x5a },135 { 0x55, 0x5b },136 { 0x56, 0x40 },137 { 0x57, 0x70 },138 { 0x5c, 0x50 },139 { 0x5d, 0x00 },140 { 0x62, 0x17 },141 { 0x63, 0x2f },142 { 0x64, 0x6f },143 { 0x68, 0x00 },144 { 0x69, 0x89 },145 { 0x6a, 0x00 },146 { 0x6b, 0x00 },147 { 0x6c, 0x00 },148 { 0x6d, 0x00 },149 { 0x6e, 0x00 },150 { 0x70, 0x10 },151 { 0x71, 0x00 },152 { 0x75, 0x00 },153 { 0x76, 0x30 },154 { 0x77, 0x01 },155 { 0xaf, 0x00 },156 { 0xb0, 0xa0 },157 { 0xb2, 0x3d },158 { 0xb3, 0x25 },159 { 0xb4, 0x8b },160 { 0xb5, 0x4b },161 { 0xb6, 0x3f },162 { 0xb7, 0xff },163 { 0xb8, 0xff },164 { 0xb9, 0xfc },165 { 0xba, 0x00 },166 { 0xbb, 0x00 },167 { 0xbc, 0x00 },168 { 0xd0, 0x30 },169 { 0xe4, 0x84 },170 { 0xf0, 0x48 },171 { 0xf1, 0x19 },172 { 0xf2, 0x5a },173 { 0xf3, 0x8e },174 { 0xf4, 0x2d },175 { 0xf5, 0x07 },176 { 0xf6, 0x5a },177 { 0xf7, 0xba },178 { 0xf8, 0xd7 },179};180 181static struct regdata s921_prefreq[] = {182 { 0x47, 0x60 },183 { 0x68, 0x00 },184 { 0x69, 0x89 },185 { 0xf0, 0x48 },186 { 0xf1, 0x19 },187};188 189static struct regdata s921_postfreq[] = {190 { 0xf5, 0xae },191 { 0xf6, 0xb7 },192 { 0xf7, 0xba },193 { 0xf8, 0xd7 },194 { 0x68, 0x0a },195 { 0x69, 0x09 },196};197 198static int s921_i2c_writereg(struct s921_state *state,199 u8 i2c_addr, int reg, int data)200{201 u8 buf[] = { reg, data };202 struct i2c_msg msg = {203 .addr = i2c_addr, .flags = 0, .buf = buf, .len = 2204 };205 int rc;206 207 rc = i2c_transfer(state->i2c, &msg, 1);208 if (rc != 1) {209 printk("%s: writereg rcor(rc == %i, reg == 0x%02x, data == 0x%02x)\n",210 __func__, rc, reg, data);211 return rc;212 }213 214 return 0;215}216 217static int s921_i2c_writeregdata(struct s921_state *state, u8 i2c_addr,218 struct regdata *rd, int size)219{220 int i, rc;221 222 for (i = 0; i < size; i++) {223 rc = s921_i2c_writereg(state, i2c_addr, rd[i].reg, rd[i].data);224 if (rc < 0)225 return rc;226 }227 return 0;228}229 230static int s921_i2c_readreg(struct s921_state *state, u8 i2c_addr, u8 reg)231{232 u8 val;233 int rc;234 struct i2c_msg msg[] = {235 { .addr = i2c_addr, .flags = 0, .buf = ®, .len = 1 },236 { .addr = i2c_addr, .flags = I2C_M_RD, .buf = &val, .len = 1 }237 };238 239 rc = i2c_transfer(state->i2c, msg, 2);240 241 if (rc != 2) {242 rc("%s: reg=0x%x (rcor=%d)\n", __func__, reg, rc);243 return rc;244 }245 246 return val;247}248 249#define s921_readreg(state, reg) \250 s921_i2c_readreg(state, state->config->demod_address, reg)251#define s921_writereg(state, reg, val) \252 s921_i2c_writereg(state, state->config->demod_address, reg, val)253#define s921_writeregdata(state, regdata) \254 s921_i2c_writeregdata(state, state->config->demod_address, \255 regdata, ARRAY_SIZE(regdata))256 257static int s921_pll_tune(struct dvb_frontend *fe)258{259 struct dtv_frontend_properties *p = &fe->dtv_property_cache;260 struct s921_state *state = fe->demodulator_priv;261 int band, rc, i;262 unsigned long f_offset;263 u8 f_switch;264 u64 offset;265 266 dprintk("frequency=%i\n", p->frequency);267 268 for (band = 0; band < ARRAY_SIZE(s921_bandselect); band++)269 if (p->frequency < s921_bandselect[band].freq_low)270 break;271 band--;272 273 if (band < 0) {274 rc("%s: frequency out of range\n", __func__);275 return -EINVAL;276 }277 278 f_switch = s921_bandselect[band].band_reg;279 280 offset = ((u64)p->frequency) * 258;281 do_div(offset, 6000000);282 f_offset = ((unsigned long)offset) + 2321;283 284 rc = s921_writeregdata(state, s921_prefreq);285 if (rc < 0)286 return rc;287 288 rc = s921_writereg(state, 0xf2, (f_offset >> 8) & 0xff);289 if (rc < 0)290 return rc;291 292 rc = s921_writereg(state, 0xf3, f_offset & 0xff);293 if (rc < 0)294 return rc;295 296 rc = s921_writereg(state, 0xf4, f_switch);297 if (rc < 0)298 return rc;299 300 rc = s921_writeregdata(state, s921_postfreq);301 if (rc < 0)302 return rc;303 304 for (i = 0 ; i < 6; i++) {305 rc = s921_readreg(state, 0x80);306 dprintk("status 0x80: %02x\n", rc);307 }308 rc = s921_writereg(state, 0x01, 0x40);309 if (rc < 0)310 return rc;311 312 rc = s921_readreg(state, 0x01);313 dprintk("status 0x01: %02x\n", rc);314 315 rc = s921_readreg(state, 0x80);316 dprintk("status 0x80: %02x\n", rc);317 318 rc = s921_readreg(state, 0x80);319 dprintk("status 0x80: %02x\n", rc);320 321 rc = s921_readreg(state, 0x32);322 dprintk("status 0x32: %02x\n", rc);323 324 dprintk("pll tune band=%d, pll=%d\n", f_switch, (int)f_offset);325 326 return 0;327}328 329static int s921_initfe(struct dvb_frontend *fe)330{331 struct s921_state *state = fe->demodulator_priv;332 int rc;333 334 dprintk("\n");335 336 rc = s921_writeregdata(state, s921_init);337 if (rc < 0)338 return rc;339 340 return 0;341}342 343static int s921_read_status(struct dvb_frontend *fe, enum fe_status *status)344{345 struct s921_state *state = fe->demodulator_priv;346 int regstatus, rc;347 348 *status = 0;349 350 rc = s921_readreg(state, 0x81);351 if (rc < 0)352 return rc;353 354 regstatus = rc << 8;355 356 rc = s921_readreg(state, 0x82);357 if (rc < 0)358 return rc;359 360 regstatus |= rc;361 362 dprintk("status = %04x\n", regstatus);363 364 /* Full Sync - We don't know what each bit means on regs 0x81/0x82 */365 if ((regstatus & 0xff) == 0x40) {366 *status = FE_HAS_SIGNAL |367 FE_HAS_CARRIER |368 FE_HAS_VITERBI |369 FE_HAS_SYNC |370 FE_HAS_LOCK;371 } else if (regstatus & 0x40) {372 /* This is close to Full Sync, but not enough to get useful info */373 *status = FE_HAS_SIGNAL |374 FE_HAS_CARRIER |375 FE_HAS_VITERBI |376 FE_HAS_SYNC;377 }378 379 return 0;380}381 382static int s921_read_signal_strength(struct dvb_frontend *fe, u16 *strength)383{384 enum fe_status status;385 struct s921_state *state = fe->demodulator_priv;386 int rc;387 388 /* FIXME: Use the proper register for it... 0x80? */389 rc = s921_read_status(fe, &status);390 if (rc < 0)391 return rc;392 393 *strength = (status & FE_HAS_LOCK) ? 0xffff : 0;394 395 dprintk("strength = 0x%04x\n", *strength);396 397 rc = s921_readreg(state, 0x01);398 dprintk("status 0x01: %02x\n", rc);399 400 rc = s921_readreg(state, 0x80);401 dprintk("status 0x80: %02x\n", rc);402 403 rc = s921_readreg(state, 0x32);404 dprintk("status 0x32: %02x\n", rc);405 406 return 0;407}408 409static int s921_set_frontend(struct dvb_frontend *fe)410{411 struct dtv_frontend_properties *p = &fe->dtv_property_cache;412 struct s921_state *state = fe->demodulator_priv;413 int rc;414 415 dprintk("\n");416 417 /* FIXME: We don't know how to use non-auto mode */418 419 rc = s921_pll_tune(fe);420 if (rc < 0)421 return rc;422 423 state->currentfreq = p->frequency;424 425 return 0;426}427 428static int s921_get_frontend(struct dvb_frontend *fe,429 struct dtv_frontend_properties *p)430{431 struct s921_state *state = fe->demodulator_priv;432 433 /* FIXME: Probably it is possible to get it from regs f1 and f2 */434 p->frequency = state->currentfreq;435 p->delivery_system = SYS_ISDBT;436 437 return 0;438}439 440static int s921_tune(struct dvb_frontend *fe,441 bool re_tune,442 unsigned int mode_flags,443 unsigned int *delay,444 enum fe_status *status)445{446 int rc = 0;447 448 dprintk("\n");449 450 if (re_tune)451 rc = s921_set_frontend(fe);452 453 if (!(mode_flags & FE_TUNE_MODE_ONESHOT))454 s921_read_status(fe, status);455 456 return rc;457}458 459static enum dvbfe_algo s921_get_algo(struct dvb_frontend *fe)460{461 return DVBFE_ALGO_HW;462}463 464static void s921_release(struct dvb_frontend *fe)465{466 struct s921_state *state = fe->demodulator_priv;467 468 dprintk("\n");469 kfree(state);470}471 472static const struct dvb_frontend_ops s921_ops;473 474struct dvb_frontend *s921_attach(const struct s921_config *config,475 struct i2c_adapter *i2c)476{477 /* allocate memory for the internal state */478 struct s921_state *state =479 kzalloc(sizeof(struct s921_state), GFP_KERNEL);480 481 dprintk("\n");482 if (!state) {483 rc("Unable to kzalloc\n");484 return NULL;485 }486 487 /* setup the state */488 state->config = config;489 state->i2c = i2c;490 491 /* create dvb_frontend */492 memcpy(&state->frontend.ops, &s921_ops,493 sizeof(struct dvb_frontend_ops));494 state->frontend.demodulator_priv = state;495 496 return &state->frontend;497}498EXPORT_SYMBOL_GPL(s921_attach);499 500static const struct dvb_frontend_ops s921_ops = {501 .delsys = { SYS_ISDBT },502 /* Use dib8000 values per default */503 .info = {504 .name = "Sharp S921",505 .frequency_min_hz = 470 * MHz,506 /*507 * Max should be 770MHz instead, according with Sharp docs,508 * but Leadership doc says it works up to 806 MHz. This is509 * required to get channel 69, used in Brazil510 */511 .frequency_max_hz = 806 * MHz,512 .caps = FE_CAN_INVERSION_AUTO |513 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |514 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |515 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |516 FE_CAN_QAM_AUTO | FE_CAN_TRANSMISSION_MODE_AUTO |517 FE_CAN_GUARD_INTERVAL_AUTO | FE_CAN_RECOVER |518 FE_CAN_HIERARCHY_AUTO,519 },520 521 .release = s921_release,522 523 .init = s921_initfe,524 .set_frontend = s921_set_frontend,525 .get_frontend = s921_get_frontend,526 .read_status = s921_read_status,527 .read_signal_strength = s921_read_signal_strength,528 .tune = s921_tune,529 .get_frontend_algo = s921_get_algo,530};531 532MODULE_DESCRIPTION("DVB Frontend module for Sharp S921 hardware");533MODULE_AUTHOR("Mauro Carvalho Chehab");534MODULE_AUTHOR("Douglas Landgraf <dougsland@redhat.com>");535MODULE_LICENSE("GPL");536