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1/* SPDX-License-Identifier: GPL-2.0-or-later */2/*3 * Driver for Silicon Labs SI2165 DVB-C/-T Demodulator4 *5 * Copyright (C) 2013-2017 Matthias Schwarzott <zzam@gentoo.org>6 */7 8#ifndef _DVB_SI2165_PRIV9#define _DVB_SI2165_PRIV10 11#define SI2165_FIRMWARE_REV_D "dvb-demod-si2165.fw"12 13struct si2165_config {14 /* i2c addr15 * possible values: 0x64,0x65,0x66,0x6716 */17 u8 i2c_addr;18 19 /* external clock or XTAL */20 u8 chip_mode;21 22 /* frequency of external clock or xtal in Hz23 * possible values: 4000000, 16000000, 20000000, 240000000, 2700000024 */25 u32 ref_freq_hz;26 27 /* invert the spectrum */28 bool inversion;29};30 31#define STATISTICS_PERIOD_PKT_COUNT 30000u32#define STATISTICS_PERIOD_BIT_COUNT (STATISTICS_PERIOD_PKT_COUNT * 204 * 8)33 34#define REG_CHIP_MODE 0x000035#define REG_CHIP_REVCODE 0x002336#define REV_CHIP_TYPE 0x011837#define REG_CHIP_INIT 0x005038#define REG_INIT_DONE 0x005439#define REG_START_INIT 0x009640#define REG_PLL_DIVL 0x00a041#define REG_RST_ALL 0x00c042#define REG_LOCK_TIMEOUT 0x00c443#define REG_AUTO_RESET 0x00cb44#define REG_OVERSAMP 0x00e445#define REG_IF_FREQ_SHIFT 0x00e846#define REG_DVB_STANDARD 0x00ec47#define REG_DSP_CLOCK 0x010448#define REG_ADC_RI8 0x012349#define REG_ADC_RI1 0x012a50#define REG_ADC_RI2 0x012b51#define REG_ADC_RI3 0x012c52#define REG_ADC_RI4 0x012d53#define REG_ADC_RI5 0x012e54#define REG_ADC_RI6 0x012f55#define REG_AGC_CRESTF_DBX8 0x015056#define REG_AGC_UNFREEZE_THR 0x015b57#define REG_AGC2_MIN 0x016e58#define REG_AGC2_KACQ 0x016c59#define REG_AGC2_KLOC 0x016d60#define REG_AGC2_OUTPUT 0x017061#define REG_AGC2_CLKDIV 0x017162#define REG_AGC_IF_TRI 0x018b63#define REG_AGC_IF_SLR 0x019064#define REG_AAF_CRESTF_DBX8 0x01a065#define REG_ACI_CRESTF_DBX8 0x01c866#define REG_SWEEP_STEP 0x023267#define REG_KP_LOCK 0x023a68#define REG_UNKNOWN_24C 0x024c69#define REG_CENTRAL_TAP 0x026170#define REG_C_N 0x026c71#define REG_EQ_AUTO_CONTROL 0x027872#define REG_UNKNOWN_27C 0x027c73#define REG_START_SYNCHRO 0x02e074#define REG_REQ_CONSTELLATION 0x02f475#define REG_T_BANDWIDTH 0x030876#define REG_FREQ_SYNC_RANGE 0x030c77#define REG_IMPULSIVE_NOISE_REM 0x031c78#define REG_WDOG_AND_BOOT 0x034179#define REG_PATCH_VERSION 0x034480#define REG_ADDR_JUMP 0x034881#define REG_UNKNOWN_350 0x035082#define REG_EN_RST_ERROR 0x035c83#define REG_DCOM_CONTROL_BYTE 0x036484#define REG_DCOM_ADDR 0x036885#define REG_DCOM_DATA 0x036c86#define REG_RST_CRC 0x037987#define REG_GP_REG0_LSB 0x038488#define REG_GP_REG0_MSB 0x038789#define REG_CRC 0x037a90#define REG_CHECK_SIGNAL 0x03a891#define REG_CBER_RST 0x042492#define REG_CBER_BIT 0x042893#define REG_CBER_ERR 0x043094#define REG_CBER_AVAIL 0x043495#define REG_PS_LOCK 0x044096#define REG_UNCOR_CNT 0x046897#define REG_BER_RST 0x046c98#define REG_BER_PKT 0x047099#define REG_BER_BIT 0x0478100#define REG_BER_AVAIL 0x047c101#define REG_FEC_LOCK 0x04e0102#define REG_TS_DATA_MODE 0x04e4103#define REG_TS_CLK_MODE 0x04e5104#define REG_TS_TRI 0x04ef105#define REG_TS_SLR 0x04f4106#define REG_RSSI_ENABLE 0x0641107#define REG_RSSI_PAD_CTRL 0x0646108#define REG_TS_PARALLEL_MODE 0x08f8109 110#endif /* _DVB_SI2165_PRIV */111