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1// SPDX-License-Identifier: GPL-2.0-or-later2/*3 TDA10021 - Single Chip Cable Channel Receiver driver module4 used on the Siemens DVB-C cards5 6 Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>7 Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>8 Support for TDA100219 10*/11 12#include <linux/delay.h>13#include <linux/errno.h>14#include <linux/init.h>15#include <linux/kernel.h>16#include <linux/module.h>17#include <linux/string.h>18#include <linux/slab.h>19 20#include <media/dvb_frontend.h>21#include "tda1002x.h"22 23 24struct tda10021_state {25 struct i2c_adapter* i2c;26 /* configuration settings */27 const struct tda1002x_config* config;28 struct dvb_frontend frontend;29 30 u8 pwm;31 u8 reg0;32};33 34 35#if 036#define dprintk(x...) printk(x)37#else38#define dprintk(x...)39#endif40 41static int verbose;42 43#define XIN 57840000UL44 45#define FIN (XIN >> 4)46 47static int tda10021_inittab_size = 0x40;48static u8 tda10021_inittab[0x40]=49{50 0x73, 0x6a, 0x23, 0x0a, 0x02, 0x37, 0x77, 0x1a,51 0x37, 0x6a, 0x17, 0x8a, 0x1e, 0x86, 0x43, 0x40,52 0xb8, 0x3f, 0xa1, 0x00, 0xcd, 0x01, 0x00, 0xff,53 0x11, 0x00, 0x7c, 0x31, 0x30, 0x20, 0x00, 0x00,54 0x02, 0x00, 0x00, 0x7d, 0x00, 0x00, 0x00, 0x00,55 0x07, 0x00, 0x33, 0x11, 0x0d, 0x95, 0x08, 0x58,56 0x00, 0x00, 0x80, 0x00, 0x80, 0xff, 0x00, 0x00,57 0x04, 0x2d, 0x2f, 0xff, 0x00, 0x00, 0x00, 0x00,58};59 60static int _tda10021_writereg (struct tda10021_state* state, u8 reg, u8 data)61{62 u8 buf[] = { reg, data };63 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };64 int ret;65 66 ret = i2c_transfer (state->i2c, &msg, 1);67 if (ret != 1)68 printk("DVB: TDA10021(%d): %s, writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",69 state->frontend.dvb->num, __func__, reg, data, ret);70 71 msleep(10);72 return (ret != 1) ? -EREMOTEIO : 0;73}74 75static u8 tda10021_readreg (struct tda10021_state* state, u8 reg)76{77 u8 b0 [] = { reg };78 u8 b1 [] = { 0 };79 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },80 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };81 int ret;82 83 ret = i2c_transfer (state->i2c, msg, 2);84 // Don't print an error message if the id is read.85 if (ret != 2 && reg != 0x1a)86 printk("DVB: TDA10021: %s: readreg error (ret == %i)\n",87 __func__, ret);88 return b1[0];89}90 91//get access to tuner92static int lock_tuner(struct tda10021_state* state)93{94 u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] | 0x80 };95 struct i2c_msg msg = {.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};96 97 if(i2c_transfer(state->i2c, &msg, 1) != 1)98 {99 printk("tda10021: lock tuner fails\n");100 return -EREMOTEIO;101 }102 return 0;103}104 105//release access from tuner106static int unlock_tuner(struct tda10021_state* state)107{108 u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] & 0x7f };109 struct i2c_msg msg_post={.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};110 111 if(i2c_transfer(state->i2c, &msg_post, 1) != 1)112 {113 printk("tda10021: unlock tuner fails\n");114 return -EREMOTEIO;115 }116 return 0;117}118 119static int tda10021_setup_reg0(struct tda10021_state *state, u8 reg0,120 enum fe_spectral_inversion inversion)121{122 reg0 |= state->reg0 & 0x63;123 124 if ((INVERSION_ON == inversion) ^ (state->config->invert == 0))125 reg0 &= ~0x20;126 else127 reg0 |= 0x20;128 129 _tda10021_writereg (state, 0x00, reg0 & 0xfe);130 _tda10021_writereg (state, 0x00, reg0 | 0x01);131 132 state->reg0 = reg0;133 return 0;134}135 136static int tda10021_set_symbolrate (struct tda10021_state* state, u32 symbolrate)137{138 s32 BDR;139 s32 BDRI;140 s16 SFIL = 0;141 u16 NDEC = 0;142 u32 tmp, ratio;143 144 if (symbolrate > XIN / 2)145 symbolrate = XIN / 2;146 else if (symbolrate < 500000)147 symbolrate = 500000;148 149 if (symbolrate < XIN / 16)150 NDEC = 1;151 if (symbolrate < XIN / 32)152 NDEC = 2;153 if (symbolrate < XIN / 64)154 NDEC = 3;155 156 if (symbolrate < XIN * 10 / 123)157 SFIL = 1;158 if (symbolrate < XIN * 10 / 160)159 SFIL = 0;160 if (symbolrate < XIN * 10 / 246)161 SFIL = 1;162 if (symbolrate < XIN * 10 / 320)163 SFIL = 0;164 if (symbolrate < XIN * 10 / 492)165 SFIL = 1;166 if (symbolrate < XIN * 10 / 640)167 SFIL = 0;168 if (symbolrate < XIN * 10 / 984)169 SFIL = 1;170 171 symbolrate <<= NDEC;172 ratio = (symbolrate << 4) / FIN;173 tmp = ((symbolrate << 4) % FIN) << 8;174 ratio = (ratio << 8) + tmp / FIN;175 tmp = (tmp % FIN) << 8;176 ratio = (ratio << 8) + DIV_ROUND_CLOSEST(tmp, FIN);177 178 BDR = ratio;179 BDRI = (((XIN << 5) / symbolrate) + 1) / 2;180 181 if (BDRI > 0xFF)182 BDRI = 0xFF;183 184 SFIL = (SFIL << 4) | tda10021_inittab[0x0E];185 186 NDEC = (NDEC << 6) | tda10021_inittab[0x03];187 188 _tda10021_writereg (state, 0x03, NDEC);189 _tda10021_writereg (state, 0x0a, BDR&0xff);190 _tda10021_writereg (state, 0x0b, (BDR>> 8)&0xff);191 _tda10021_writereg (state, 0x0c, (BDR>>16)&0x3f);192 193 _tda10021_writereg (state, 0x0d, BDRI);194 _tda10021_writereg (state, 0x0e, SFIL);195 196 return 0;197}198 199static int tda10021_init (struct dvb_frontend *fe)200{201 struct tda10021_state* state = fe->demodulator_priv;202 int i;203 204 dprintk("DVB: TDA10021(%d): init chip\n", fe->adapter->num);205 206 //_tda10021_writereg (fe, 0, 0);207 208 for (i=0; i<tda10021_inittab_size; i++)209 _tda10021_writereg (state, i, tda10021_inittab[i]);210 211 _tda10021_writereg (state, 0x34, state->pwm);212 213 //Comment by markus214 //0x2A[3-0] == PDIV -> P multiplaying factor (P=PDIV+1)(default 0)215 //0x2A[4] == BYPPLL -> Power down mode (default 1)216 //0x2A[5] == LCK -> PLL Lock Flag217 //0x2A[6] == POLAXIN -> Polarity of the input reference clock (default 0)218 219 //Activate PLL220 _tda10021_writereg(state, 0x2a, tda10021_inittab[0x2a] & 0xef);221 return 0;222}223 224struct qam_params {225 u8 conf, agcref, lthr, mseth, aref;226};227 228static int tda10021_set_parameters(struct dvb_frontend *fe)229{230 struct dtv_frontend_properties *c = &fe->dtv_property_cache;231 u32 delsys = c->delivery_system;232 unsigned qam = c->modulation;233 bool is_annex_c;234 u32 reg0x3d;235 struct tda10021_state* state = fe->demodulator_priv;236 static const struct qam_params qam_params[] = {237 /* Modulation Conf AGCref LTHR MSETH AREF */238 [QPSK] = { 0x14, 0x78, 0x78, 0x8c, 0x96 },239 [QAM_16] = { 0x00, 0x8c, 0x87, 0xa2, 0x91 },240 [QAM_32] = { 0x04, 0x8c, 0x64, 0x74, 0x96 },241 [QAM_64] = { 0x08, 0x6a, 0x46, 0x43, 0x6a },242 [QAM_128] = { 0x0c, 0x78, 0x36, 0x34, 0x7e },243 [QAM_256] = { 0x10, 0x5c, 0x26, 0x23, 0x6b },244 };245 246 switch (delsys) {247 case SYS_DVBC_ANNEX_A:248 is_annex_c = false;249 break;250 case SYS_DVBC_ANNEX_C:251 is_annex_c = true;252 break;253 default:254 return -EINVAL;255 }256 257 /*258 * gcc optimizes the code below the same way as it would code:259 * "if (qam > 5) return -EINVAL;"260 * Yet, the code is clearer, as it shows what QAM standards are261 * supported by the driver, and avoids the usage of magic numbers on262 * it.263 */264 switch (qam) {265 case QPSK:266 case QAM_16:267 case QAM_32:268 case QAM_64:269 case QAM_128:270 case QAM_256:271 break;272 default:273 return -EINVAL;274 }275 276 if (c->inversion != INVERSION_ON && c->inversion != INVERSION_OFF)277 return -EINVAL;278 279 /*printk("tda10021: set frequency to %d qam=%d symrate=%d\n", p->frequency,qam,p->symbol_rate);*/280 281 if (fe->ops.tuner_ops.set_params) {282 fe->ops.tuner_ops.set_params(fe);283 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);284 }285 286 tda10021_set_symbolrate(state, c->symbol_rate);287 _tda10021_writereg(state, 0x34, state->pwm);288 289 _tda10021_writereg(state, 0x01, qam_params[qam].agcref);290 _tda10021_writereg(state, 0x05, qam_params[qam].lthr);291 _tda10021_writereg(state, 0x08, qam_params[qam].mseth);292 _tda10021_writereg(state, 0x09, qam_params[qam].aref);293 294 /*295 * Bit 0 == 0 means roll-off = 0.15 (Annex A)296 * == 1 means roll-off = 0.13 (Annex C)297 */298 reg0x3d = tda10021_readreg (state, 0x3d);299 if (is_annex_c)300 _tda10021_writereg (state, 0x3d, 0x01 | reg0x3d);301 else302 _tda10021_writereg (state, 0x3d, 0xfe & reg0x3d);303 tda10021_setup_reg0(state, qam_params[qam].conf, c->inversion);304 305 return 0;306}307 308static int tda10021_read_status(struct dvb_frontend *fe,309 enum fe_status *status)310{311 struct tda10021_state* state = fe->demodulator_priv;312 int sync;313 314 *status = 0;315 //0x11[0] == EQALGO -> Equalizer algorithms state316 //0x11[1] == CARLOCK -> Carrier locked317 //0x11[2] == FSYNC -> Frame synchronisation318 //0x11[3] == FEL -> Front End locked319 //0x11[6] == NODVB -> DVB Mode Information320 sync = tda10021_readreg (state, 0x11);321 322 if (sync & 2)323 *status |= FE_HAS_SIGNAL|FE_HAS_CARRIER;324 325 if (sync & 4)326 *status |= FE_HAS_SYNC|FE_HAS_VITERBI;327 328 if (sync & 8)329 *status |= FE_HAS_LOCK;330 331 return 0;332}333 334static int tda10021_read_ber(struct dvb_frontend* fe, u32* ber)335{336 struct tda10021_state* state = fe->demodulator_priv;337 338 u32 _ber = tda10021_readreg(state, 0x14) |339 (tda10021_readreg(state, 0x15) << 8) |340 ((tda10021_readreg(state, 0x16) & 0x0f) << 16);341 _tda10021_writereg(state, 0x10, (tda10021_readreg(state, 0x10) & ~0xc0)342 | (tda10021_inittab[0x10] & 0xc0));343 *ber = 10 * _ber;344 345 return 0;346}347 348static int tda10021_read_signal_strength(struct dvb_frontend* fe, u16* strength)349{350 struct tda10021_state* state = fe->demodulator_priv;351 352 u8 config = tda10021_readreg(state, 0x02);353 u8 gain = tda10021_readreg(state, 0x17);354 if (config & 0x02)355 /* the agc value is inverted */356 gain = ~gain;357 *strength = (gain << 8) | gain;358 359 return 0;360}361 362static int tda10021_read_snr(struct dvb_frontend* fe, u16* snr)363{364 struct tda10021_state* state = fe->demodulator_priv;365 366 u8 quality = ~tda10021_readreg(state, 0x18);367 *snr = (quality << 8) | quality;368 369 return 0;370}371 372static int tda10021_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)373{374 struct tda10021_state* state = fe->demodulator_priv;375 376 *ucblocks = tda10021_readreg (state, 0x13) & 0x7f;377 if (*ucblocks == 0x7f)378 *ucblocks = 0xffffffff;379 380 /* reset uncorrected block counter */381 _tda10021_writereg (state, 0x10, tda10021_inittab[0x10] & 0xdf);382 _tda10021_writereg (state, 0x10, tda10021_inittab[0x10]);383 384 return 0;385}386 387static int tda10021_get_frontend(struct dvb_frontend *fe,388 struct dtv_frontend_properties *p)389{390 struct tda10021_state* state = fe->demodulator_priv;391 int sync;392 s8 afc = 0;393 394 sync = tda10021_readreg(state, 0x11);395 afc = tda10021_readreg(state, 0x19);396 if (verbose) {397 /* AFC only valid when carrier has been recovered */398 printk(sync & 2 ? "DVB: TDA10021(%d): AFC (%d) %dHz\n" :399 "DVB: TDA10021(%d): [AFC (%d) %dHz]\n",400 state->frontend.dvb->num, afc,401 -((s32)p->symbol_rate * afc) >> 10);402 }403 404 p->inversion = ((state->reg0 & 0x20) == 0x20) ^ (state->config->invert != 0) ? INVERSION_ON : INVERSION_OFF;405 p->modulation = ((state->reg0 >> 2) & 7) + QAM_16;406 407 p->fec_inner = FEC_NONE;408 p->frequency = ((p->frequency + 31250) / 62500) * 62500;409 410 if (sync & 2)411 p->frequency -= ((s32)p->symbol_rate * afc) >> 10;412 413 return 0;414}415 416static int tda10021_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)417{418 struct tda10021_state* state = fe->demodulator_priv;419 420 if (enable) {421 lock_tuner(state);422 } else {423 unlock_tuner(state);424 }425 return 0;426}427 428static int tda10021_sleep(struct dvb_frontend* fe)429{430 struct tda10021_state* state = fe->demodulator_priv;431 432 _tda10021_writereg (state, 0x1b, 0x02); /* pdown ADC */433 _tda10021_writereg (state, 0x00, 0x80); /* standby */434 435 return 0;436}437 438static void tda10021_release(struct dvb_frontend* fe)439{440 struct tda10021_state* state = fe->demodulator_priv;441 kfree(state);442}443 444static const struct dvb_frontend_ops tda10021_ops;445 446struct dvb_frontend* tda10021_attach(const struct tda1002x_config* config,447 struct i2c_adapter* i2c,448 u8 pwm)449{450 struct tda10021_state* state = NULL;451 u8 id;452 453 /* allocate memory for the internal state */454 state = kzalloc(sizeof(struct tda10021_state), GFP_KERNEL);455 if (state == NULL) goto error;456 457 /* setup the state */458 state->config = config;459 state->i2c = i2c;460 state->pwm = pwm;461 state->reg0 = tda10021_inittab[0];462 463 /* check if the demod is there */464 id = tda10021_readreg(state, 0x1a);465 if ((id & 0xf0) != 0x70) goto error;466 467 /* Don't claim TDA10023 */468 if (id == 0x7d)469 goto error;470 471 printk("TDA10021: i2c-addr = 0x%02x, id = 0x%02x\n",472 state->config->demod_address, id);473 474 /* create dvb_frontend */475 memcpy(&state->frontend.ops, &tda10021_ops, sizeof(struct dvb_frontend_ops));476 state->frontend.demodulator_priv = state;477 return &state->frontend;478 479error:480 kfree(state);481 return NULL;482}483 484static const struct dvb_frontend_ops tda10021_ops = {485 .delsys = { SYS_DVBC_ANNEX_A, SYS_DVBC_ANNEX_C },486 .info = {487 .name = "Philips TDA10021 DVB-C",488 .frequency_min_hz = 47 * MHz,489 .frequency_max_hz = 862 * MHz,490 .frequency_stepsize_hz = 62500,491 .symbol_rate_min = (XIN / 2) / 64, /* SACLK/64 == (XIN/2)/64 */492 .symbol_rate_max = (XIN / 2) / 4, /* SACLK/4 */493 #if 0494 .frequency_tolerance = ???,495 .symbol_rate_tolerance = ???, /* ppm */ /* == 8% (spec p. 5) */496 #endif497 .caps = 0x400 | //FE_CAN_QAM_4498 FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |499 FE_CAN_QAM_128 | FE_CAN_QAM_256 |500 FE_CAN_FEC_AUTO501 },502 503 .release = tda10021_release,504 505 .init = tda10021_init,506 .sleep = tda10021_sleep,507 .i2c_gate_ctrl = tda10021_i2c_gate_ctrl,508 509 .set_frontend = tda10021_set_parameters,510 .get_frontend = tda10021_get_frontend,511 512 .read_status = tda10021_read_status,513 .read_ber = tda10021_read_ber,514 .read_signal_strength = tda10021_read_signal_strength,515 .read_snr = tda10021_read_snr,516 .read_ucblocks = tda10021_read_ucblocks,517};518 519module_param(verbose, int, 0644);520MODULE_PARM_DESC(verbose, "print AFC offset after tuning for debugging the PWM setting");521 522MODULE_DESCRIPTION("Philips TDA10021 DVB-C demodulator driver");523MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Markus Schulz");524MODULE_LICENSE("GPL");525 526EXPORT_SYMBOL_GPL(tda10021_attach);527