733 lines · c
1// SPDX-License-Identifier: GPL-2.0-or-later2/*3 Montage Technology TS2020 - Silicon Tuner driver4 Copyright (C) 2009-2012 Konstantin Dimitrov <kosio.dimitrov@gmail.com>5 6 Copyright (C) 2009-2012 TurboSight.com7 8 */9 10#include <media/dvb_frontend.h>11#include "ts2020.h"12#include <linux/regmap.h>13#include <linux/math64.h>14 15#define TS2020_XTAL_FREQ 27000 /* in kHz */16#define FREQ_OFFSET_LOW_SYM_RATE 300017 18struct ts2020_priv {19 struct i2c_client *client;20 struct mutex regmap_mutex;21 struct regmap_config regmap_config;22 struct regmap *regmap;23 struct dvb_frontend *fe;24 struct delayed_work stat_work;25 int (*get_agc_pwm)(struct dvb_frontend *fe, u8 *_agc_pwm);26 /* i2c details */27 struct i2c_adapter *i2c;28 int i2c_address;29 bool loop_through:1;30 u8 clk_out:2;31 u8 clk_out_div:5;32 bool dont_poll:1;33 u32 frequency_div; /* LO output divider switch frequency */34 u32 frequency_khz; /* actual used LO frequency */35#define TS2020_M88TS2020 036#define TS2020_M88TS2022 137 u8 tuner;38};39 40struct ts2020_reg_val {41 u8 reg;42 u8 val;43};44 45static void ts2020_stat_work(struct work_struct *work);46 47static void ts2020_release(struct dvb_frontend *fe)48{49 struct ts2020_priv *priv = fe->tuner_priv;50 struct i2c_client *client = priv->client;51 52 dev_dbg(&client->dev, "\n");53 54 i2c_unregister_device(client);55}56 57static int ts2020_sleep(struct dvb_frontend *fe)58{59 struct ts2020_priv *priv = fe->tuner_priv;60 int ret;61 u8 u8tmp;62 63 if (priv->tuner == TS2020_M88TS2020)64 u8tmp = 0x0a; /* XXX: probably wrong */65 else66 u8tmp = 0x00;67 68 ret = regmap_write(priv->regmap, u8tmp, 0x00);69 if (ret < 0)70 return ret;71 72 /* stop statistics polling */73 if (!priv->dont_poll)74 cancel_delayed_work_sync(&priv->stat_work);75 return 0;76}77 78static int ts2020_init(struct dvb_frontend *fe)79{80 struct dtv_frontend_properties *c = &fe->dtv_property_cache;81 struct ts2020_priv *priv = fe->tuner_priv;82 int i;83 u8 u8tmp;84 85 if (priv->tuner == TS2020_M88TS2020) {86 regmap_write(priv->regmap, 0x42, 0x73);87 regmap_write(priv->regmap, 0x05, priv->clk_out_div);88 regmap_write(priv->regmap, 0x20, 0x27);89 regmap_write(priv->regmap, 0x07, 0x02);90 regmap_write(priv->regmap, 0x11, 0xff);91 regmap_write(priv->regmap, 0x60, 0xf9);92 regmap_write(priv->regmap, 0x08, 0x01);93 regmap_write(priv->regmap, 0x00, 0x41);94 } else {95 static const struct ts2020_reg_val reg_vals[] = {96 {0x7d, 0x9d},97 {0x7c, 0x9a},98 {0x7a, 0x76},99 {0x3b, 0x01},100 {0x63, 0x88},101 {0x61, 0x85},102 {0x22, 0x30},103 {0x30, 0x40},104 {0x20, 0x23},105 {0x24, 0x02},106 {0x12, 0xa0},107 };108 109 regmap_write(priv->regmap, 0x00, 0x01);110 regmap_write(priv->regmap, 0x00, 0x03);111 112 switch (priv->clk_out) {113 case TS2020_CLK_OUT_DISABLED:114 u8tmp = 0x60;115 break;116 case TS2020_CLK_OUT_ENABLED:117 u8tmp = 0x70;118 regmap_write(priv->regmap, 0x05, priv->clk_out_div);119 break;120 case TS2020_CLK_OUT_ENABLED_XTALOUT:121 u8tmp = 0x6c;122 break;123 default:124 u8tmp = 0x60;125 break;126 }127 128 regmap_write(priv->regmap, 0x42, u8tmp);129 130 if (priv->loop_through)131 u8tmp = 0xec;132 else133 u8tmp = 0x6c;134 135 regmap_write(priv->regmap, 0x62, u8tmp);136 137 for (i = 0; i < ARRAY_SIZE(reg_vals); i++)138 regmap_write(priv->regmap, reg_vals[i].reg,139 reg_vals[i].val);140 }141 142 /* Initialise v5 stats here */143 c->strength.len = 1;144 c->strength.stat[0].scale = FE_SCALE_DECIBEL;145 c->strength.stat[0].uvalue = 0;146 147 /* Start statistics polling by invoking the work function */148 ts2020_stat_work(&priv->stat_work.work);149 return 0;150}151 152static int ts2020_tuner_gate_ctrl(struct dvb_frontend *fe, u8 offset)153{154 struct ts2020_priv *priv = fe->tuner_priv;155 int ret;156 ret = regmap_write(priv->regmap, 0x51, 0x1f - offset);157 ret |= regmap_write(priv->regmap, 0x51, 0x1f);158 ret |= regmap_write(priv->regmap, 0x50, offset);159 ret |= regmap_write(priv->regmap, 0x50, 0x00);160 msleep(20);161 return ret;162}163 164static int ts2020_set_tuner_rf(struct dvb_frontend *fe)165{166 struct ts2020_priv *dev = fe->tuner_priv;167 int ret;168 unsigned int utmp;169 170 ret = regmap_read(dev->regmap, 0x3d, &utmp);171 if (ret)172 return ret;173 174 utmp &= 0x7f;175 if (utmp < 0x16)176 utmp = 0xa1;177 else if (utmp == 0x16)178 utmp = 0x99;179 else180 utmp = 0xf9;181 182 regmap_write(dev->regmap, 0x60, utmp);183 ret = ts2020_tuner_gate_ctrl(fe, 0x08);184 185 return ret;186}187 188static int ts2020_set_params(struct dvb_frontend *fe)189{190 struct dtv_frontend_properties *c = &fe->dtv_property_cache;191 struct ts2020_priv *priv = fe->tuner_priv;192 int ret;193 unsigned int utmp;194 u32 f3db, gdiv28;195 u16 u16tmp, value, lpf_coeff;196 u8 buf[3], reg10, lpf_mxdiv, mlpf_max, mlpf_min, nlpf;197 unsigned int f_ref_khz, f_vco_khz, div_ref, div_out, pll_n;198 unsigned int frequency_khz = c->frequency;199 200 /*201 * Integer-N PLL synthesizer202 * kHz is used for all calculations to keep calculations within 32-bit203 */204 f_ref_khz = TS2020_XTAL_FREQ;205 div_ref = DIV_ROUND_CLOSEST(f_ref_khz, 2000);206 207 /* select LO output divider */208 if (frequency_khz < priv->frequency_div) {209 div_out = 4;210 reg10 = 0x10;211 } else {212 div_out = 2;213 reg10 = 0x00;214 }215 216 f_vco_khz = frequency_khz * div_out;217 pll_n = f_vco_khz * div_ref / f_ref_khz;218 pll_n += pll_n % 2;219 priv->frequency_khz = pll_n * f_ref_khz / div_ref / div_out;220 221 pr_debug("frequency=%u offset=%d f_vco_khz=%u pll_n=%u div_ref=%u div_out=%u\n",222 priv->frequency_khz, priv->frequency_khz - c->frequency,223 f_vco_khz, pll_n, div_ref, div_out);224 225 if (priv->tuner == TS2020_M88TS2020) {226 lpf_coeff = 2766;227 reg10 |= 0x01;228 ret = regmap_write(priv->regmap, 0x10, reg10);229 } else {230 lpf_coeff = 3200;231 reg10 |= 0x0b;232 ret = regmap_write(priv->regmap, 0x10, reg10);233 ret |= regmap_write(priv->regmap, 0x11, 0x40);234 }235 236 u16tmp = pll_n - 1024;237 buf[0] = (u16tmp >> 8) & 0xff;238 buf[1] = (u16tmp >> 0) & 0xff;239 buf[2] = div_ref - 8;240 241 ret |= regmap_write(priv->regmap, 0x01, buf[0]);242 ret |= regmap_write(priv->regmap, 0x02, buf[1]);243 ret |= regmap_write(priv->regmap, 0x03, buf[2]);244 245 ret |= ts2020_tuner_gate_ctrl(fe, 0x10);246 if (ret < 0)247 return -ENODEV;248 249 ret |= ts2020_tuner_gate_ctrl(fe, 0x08);250 251 /* Tuner RF */252 if (priv->tuner == TS2020_M88TS2020)253 ret |= ts2020_set_tuner_rf(fe);254 255 gdiv28 = (TS2020_XTAL_FREQ / 1000 * 1694 + 500) / 1000;256 ret |= regmap_write(priv->regmap, 0x04, gdiv28 & 0xff);257 ret |= ts2020_tuner_gate_ctrl(fe, 0x04);258 if (ret < 0)259 return -ENODEV;260 261 if (priv->tuner == TS2020_M88TS2022) {262 ret = regmap_write(priv->regmap, 0x25, 0x00);263 ret |= regmap_write(priv->regmap, 0x27, 0x70);264 ret |= regmap_write(priv->regmap, 0x41, 0x09);265 ret |= regmap_write(priv->regmap, 0x08, 0x0b);266 if (ret < 0)267 return -ENODEV;268 }269 270 regmap_read(priv->regmap, 0x26, &utmp);271 value = utmp;272 273 f3db = (c->bandwidth_hz / 1000 / 2) + 2000;274 f3db += FREQ_OFFSET_LOW_SYM_RATE; /* FIXME: ~always too wide filter */275 f3db = clamp(f3db, 7000U, 40000U);276 277 gdiv28 = gdiv28 * 207 / (value * 2 + 151);278 mlpf_max = gdiv28 * 135 / 100;279 mlpf_min = gdiv28 * 78 / 100;280 if (mlpf_max > 63)281 mlpf_max = 63;282 283 nlpf = (f3db * gdiv28 * 2 / lpf_coeff /284 (TS2020_XTAL_FREQ / 1000) + 1) / 2;285 if (nlpf > 23)286 nlpf = 23;287 if (nlpf < 1)288 nlpf = 1;289 290 lpf_mxdiv = (nlpf * (TS2020_XTAL_FREQ / 1000)291 * lpf_coeff * 2 / f3db + 1) / 2;292 293 if (lpf_mxdiv < mlpf_min) {294 nlpf++;295 lpf_mxdiv = (nlpf * (TS2020_XTAL_FREQ / 1000)296 * lpf_coeff * 2 / f3db + 1) / 2;297 }298 299 if (lpf_mxdiv > mlpf_max)300 lpf_mxdiv = mlpf_max;301 302 ret = regmap_write(priv->regmap, 0x04, lpf_mxdiv);303 ret |= regmap_write(priv->regmap, 0x06, nlpf);304 305 ret |= ts2020_tuner_gate_ctrl(fe, 0x04);306 307 ret |= ts2020_tuner_gate_ctrl(fe, 0x01);308 309 msleep(80);310 311 return (ret < 0) ? -EINVAL : 0;312}313 314static int ts2020_get_frequency(struct dvb_frontend *fe, u32 *frequency)315{316 struct ts2020_priv *priv = fe->tuner_priv;317 318 *frequency = priv->frequency_khz;319 return 0;320}321 322static int ts2020_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)323{324 *frequency = 0; /* Zero-IF */325 return 0;326}327 328/*329 * Get the tuner gain.330 * @fe: The front end for which we're determining the gain331 * @v_agc: The voltage of the AGC from the demodulator (0-2600mV)332 * @_gain: Where to store the gain (in 0.001dB units)333 *334 * Returns 0 or a negative error code.335 */336static int ts2020_read_tuner_gain(struct dvb_frontend *fe, unsigned v_agc,337 __s64 *_gain)338{339 struct ts2020_priv *priv = fe->tuner_priv;340 unsigned long gain1, gain2, gain3;341 unsigned utmp;342 int ret;343 344 /* Read the RF gain */345 ret = regmap_read(priv->regmap, 0x3d, &utmp);346 if (ret < 0)347 return ret;348 gain1 = utmp & 0x1f;349 350 /* Read the baseband gain */351 ret = regmap_read(priv->regmap, 0x21, &utmp);352 if (ret < 0)353 return ret;354 gain2 = utmp & 0x1f;355 356 switch (priv->tuner) {357 case TS2020_M88TS2020:358 gain1 = clamp_t(long, gain1, 0, 15);359 gain2 = clamp_t(long, gain2, 0, 13);360 v_agc = clamp_t(long, v_agc, 400, 1100);361 362 *_gain = -((__s64)gain1 * 2330 +363 gain2 * 3500 +364 v_agc * 24 / 10 * 10 +365 10000);366 /* gain in range -19600 to -116850 in units of 0.001dB */367 break;368 369 case TS2020_M88TS2022:370 ret = regmap_read(priv->regmap, 0x66, &utmp);371 if (ret < 0)372 return ret;373 gain3 = (utmp >> 3) & 0x07;374 375 gain1 = clamp_t(long, gain1, 0, 15);376 gain2 = clamp_t(long, gain2, 2, 16);377 gain3 = clamp_t(long, gain3, 0, 6);378 v_agc = clamp_t(long, v_agc, 600, 1600);379 380 *_gain = -((__s64)gain1 * 2650 +381 gain2 * 3380 +382 gain3 * 2850 +383 v_agc * 176 / 100 * 10 -384 30000);385 /* gain in range -47320 to -158950 in units of 0.001dB */386 break;387 }388 389 return 0;390}391 392/*393 * Get the AGC information from the demodulator and use that to calculate the394 * tuner gain.395 */396static int ts2020_get_tuner_gain(struct dvb_frontend *fe, __s64 *_gain)397{398 struct ts2020_priv *priv = fe->tuner_priv;399 int v_agc = 0, ret;400 u8 agc_pwm;401 402 /* Read the AGC PWM rate from the demodulator */403 if (priv->get_agc_pwm) {404 ret = priv->get_agc_pwm(fe, &agc_pwm);405 if (ret < 0)406 return ret;407 408 switch (priv->tuner) {409 case TS2020_M88TS2020:410 v_agc = (int)agc_pwm * 20 - 1166;411 break;412 case TS2020_M88TS2022:413 v_agc = (int)agc_pwm * 16 - 670;414 break;415 }416 417 if (v_agc < 0)418 v_agc = 0;419 }420 421 return ts2020_read_tuner_gain(fe, v_agc, _gain);422}423 424/*425 * Gather statistics on a regular basis426 */427static void ts2020_stat_work(struct work_struct *work)428{429 struct ts2020_priv *priv = container_of(work, struct ts2020_priv,430 stat_work.work);431 struct i2c_client *client = priv->client;432 struct dtv_frontend_properties *c = &priv->fe->dtv_property_cache;433 int ret;434 435 dev_dbg(&client->dev, "\n");436 437 ret = ts2020_get_tuner_gain(priv->fe, &c->strength.stat[0].svalue);438 if (ret < 0)439 goto err;440 441 c->strength.stat[0].scale = FE_SCALE_DECIBEL;442 443 if (!priv->dont_poll)444 schedule_delayed_work(&priv->stat_work, msecs_to_jiffies(2000));445 return;446err:447 dev_dbg(&client->dev, "failed=%d\n", ret);448}449 450/*451 * Read TS2020 signal strength in v3 format.452 */453static int ts2020_read_signal_strength(struct dvb_frontend *fe,454 u16 *_signal_strength)455{456 struct dtv_frontend_properties *c = &fe->dtv_property_cache;457 struct ts2020_priv *priv = fe->tuner_priv;458 unsigned strength;459 __s64 gain;460 461 if (priv->dont_poll)462 ts2020_stat_work(&priv->stat_work.work);463 464 if (c->strength.stat[0].scale == FE_SCALE_NOT_AVAILABLE) {465 *_signal_strength = 0;466 return 0;467 }468 469 gain = c->strength.stat[0].svalue;470 471 /* Calculate the signal strength based on the total gain of the tuner */472 if (gain < -85000)473 /* 0%: no signal or weak signal */474 strength = 0;475 else if (gain < -65000)476 /* 0% - 60%: weak signal */477 strength = 0 + div64_s64((85000 + gain) * 3, 1000);478 else if (gain < -45000)479 /* 60% - 90%: normal signal */480 strength = 60 + div64_s64((65000 + gain) * 3, 2000);481 else482 /* 90% - 99%: strong signal */483 strength = 90 + div64_s64((45000 + gain), 5000);484 485 *_signal_strength = strength * 65535 / 100;486 return 0;487}488 489static const struct dvb_tuner_ops ts2020_tuner_ops = {490 .info = {491 .name = "TS2020",492 .frequency_min_hz = 950 * MHz,493 .frequency_max_hz = 2150 * MHz494 },495 .init = ts2020_init,496 .release = ts2020_release,497 .sleep = ts2020_sleep,498 .set_params = ts2020_set_params,499 .get_frequency = ts2020_get_frequency,500 .get_if_frequency = ts2020_get_if_frequency,501 .get_rf_strength = ts2020_read_signal_strength,502};503 504struct dvb_frontend *ts2020_attach(struct dvb_frontend *fe,505 const struct ts2020_config *config,506 struct i2c_adapter *i2c)507{508 struct i2c_client *client;509 struct i2c_board_info board_info;510 511 /* This is only used by ts2020_probe() so can be on the stack */512 struct ts2020_config pdata;513 514 memcpy(&pdata, config, sizeof(pdata));515 pdata.fe = fe;516 pdata.attach_in_use = true;517 518 memset(&board_info, 0, sizeof(board_info));519 strscpy(board_info.type, "ts2020", I2C_NAME_SIZE);520 board_info.addr = config->tuner_address;521 board_info.platform_data = &pdata;522 client = i2c_new_client_device(i2c, &board_info);523 if (!i2c_client_has_driver(client))524 return NULL;525 526 return fe;527}528EXPORT_SYMBOL_GPL(ts2020_attach);529 530/*531 * We implement own regmap locking due to legacy DVB attach which uses frontend532 * gate control callback to control I2C bus access. We can open / close gate and533 * serialize whole open / I2C-operation / close sequence at the same.534 */535static void ts2020_regmap_lock(void *__dev)536{537 struct ts2020_priv *dev = __dev;538 539 mutex_lock(&dev->regmap_mutex);540 if (dev->fe->ops.i2c_gate_ctrl)541 dev->fe->ops.i2c_gate_ctrl(dev->fe, 1);542}543 544static void ts2020_regmap_unlock(void *__dev)545{546 struct ts2020_priv *dev = __dev;547 548 if (dev->fe->ops.i2c_gate_ctrl)549 dev->fe->ops.i2c_gate_ctrl(dev->fe, 0);550 mutex_unlock(&dev->regmap_mutex);551}552 553static int ts2020_probe(struct i2c_client *client)554{555 struct ts2020_config *pdata = client->dev.platform_data;556 struct dvb_frontend *fe = pdata->fe;557 struct ts2020_priv *dev;558 int ret;559 u8 u8tmp;560 unsigned int utmp;561 char *chip_str;562 563 dev = kzalloc(sizeof(*dev), GFP_KERNEL);564 if (!dev) {565 ret = -ENOMEM;566 goto err;567 }568 569 /* create regmap */570 mutex_init(&dev->regmap_mutex);571 dev->regmap_config.reg_bits = 8;572 dev->regmap_config.val_bits = 8;573 dev->regmap_config.lock = ts2020_regmap_lock;574 dev->regmap_config.unlock = ts2020_regmap_unlock;575 dev->regmap_config.lock_arg = dev;576 dev->regmap = regmap_init_i2c(client, &dev->regmap_config);577 if (IS_ERR(dev->regmap)) {578 ret = PTR_ERR(dev->regmap);579 goto err_kfree;580 }581 582 dev->i2c = client->adapter;583 dev->i2c_address = client->addr;584 dev->loop_through = pdata->loop_through;585 dev->clk_out = pdata->clk_out;586 dev->clk_out_div = pdata->clk_out_div;587 dev->dont_poll = pdata->dont_poll;588 dev->frequency_div = pdata->frequency_div;589 dev->fe = fe;590 dev->get_agc_pwm = pdata->get_agc_pwm;591 fe->tuner_priv = dev;592 dev->client = client;593 INIT_DELAYED_WORK(&dev->stat_work, ts2020_stat_work);594 595 /* check if the tuner is there */596 ret = regmap_read(dev->regmap, 0x00, &utmp);597 if (ret)598 goto err_regmap_exit;599 600 if ((utmp & 0x03) == 0x00) {601 ret = regmap_write(dev->regmap, 0x00, 0x01);602 if (ret)603 goto err_regmap_exit;604 605 usleep_range(2000, 50000);606 }607 608 ret = regmap_write(dev->regmap, 0x00, 0x03);609 if (ret)610 goto err_regmap_exit;611 612 usleep_range(2000, 50000);613 614 ret = regmap_read(dev->regmap, 0x00, &utmp);615 if (ret)616 goto err_regmap_exit;617 618 dev_dbg(&client->dev, "chip_id=%02x\n", utmp);619 620 switch (utmp) {621 case 0x01:622 case 0x41:623 case 0x81:624 dev->tuner = TS2020_M88TS2020;625 chip_str = "TS2020";626 if (!dev->frequency_div)627 dev->frequency_div = 1060000;628 break;629 case 0xc3:630 case 0x83:631 dev->tuner = TS2020_M88TS2022;632 chip_str = "TS2022";633 if (!dev->frequency_div)634 dev->frequency_div = 1103000;635 break;636 default:637 ret = -ENODEV;638 goto err_regmap_exit;639 }640 641 if (dev->tuner == TS2020_M88TS2022) {642 switch (dev->clk_out) {643 case TS2020_CLK_OUT_DISABLED:644 u8tmp = 0x60;645 break;646 case TS2020_CLK_OUT_ENABLED:647 u8tmp = 0x70;648 ret = regmap_write(dev->regmap, 0x05, dev->clk_out_div);649 if (ret)650 goto err_regmap_exit;651 break;652 case TS2020_CLK_OUT_ENABLED_XTALOUT:653 u8tmp = 0x6c;654 break;655 default:656 ret = -EINVAL;657 goto err_regmap_exit;658 }659 660 ret = regmap_write(dev->regmap, 0x42, u8tmp);661 if (ret)662 goto err_regmap_exit;663 664 if (dev->loop_through)665 u8tmp = 0xec;666 else667 u8tmp = 0x6c;668 669 ret = regmap_write(dev->regmap, 0x62, u8tmp);670 if (ret)671 goto err_regmap_exit;672 }673 674 /* sleep */675 ret = regmap_write(dev->regmap, 0x00, 0x00);676 if (ret)677 goto err_regmap_exit;678 679 dev_info(&client->dev,680 "Montage Technology %s successfully identified\n", chip_str);681 682 memcpy(&fe->ops.tuner_ops, &ts2020_tuner_ops,683 sizeof(struct dvb_tuner_ops));684 if (!pdata->attach_in_use)685 fe->ops.tuner_ops.release = NULL;686 687 i2c_set_clientdata(client, dev);688 return 0;689err_regmap_exit:690 regmap_exit(dev->regmap);691err_kfree:692 kfree(dev);693err:694 dev_dbg(&client->dev, "failed=%d\n", ret);695 return ret;696}697 698static void ts2020_remove(struct i2c_client *client)699{700 struct ts2020_priv *dev = i2c_get_clientdata(client);701 702 dev_dbg(&client->dev, "\n");703 704 /* stop statistics polling */705 if (!dev->dont_poll)706 cancel_delayed_work_sync(&dev->stat_work);707 708 regmap_exit(dev->regmap);709 kfree(dev);710}711 712static const struct i2c_device_id ts2020_id_table[] = {713 { "ts2020" },714 { "ts2022" },715 {}716};717MODULE_DEVICE_TABLE(i2c, ts2020_id_table);718 719static struct i2c_driver ts2020_driver = {720 .driver = {721 .name = "ts2020",722 },723 .probe = ts2020_probe,724 .remove = ts2020_remove,725 .id_table = ts2020_id_table,726};727 728module_i2c_driver(ts2020_driver);729 730MODULE_AUTHOR("Konstantin Dimitrov <kosio.dimitrov@gmail.com>");731MODULE_DESCRIPTION("Montage Technology TS2020 - Silicon tuner driver module");732MODULE_LICENSE("GPL");733