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1/* SPDX-License-Identifier: GPL-2.0-or-later */2/* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics3 * Digitizer with Horizontal PLL registers4 *5 * Copyright (C) 2009 Texas Instruments Inc6 * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>7 *8 * This code is partially based upon the TVP5150 driver9 * written by Mauro Carvalho Chehab <mchehab@kernel.org>,10 * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com>11 * and the TVP7002 driver in the TI LSP 2.10.00.1412 */13 14/* Naming conventions15 * ------------------16 *17 * FDBK:  Feedback18 * DIV:   Divider19 * CTL:   Control20 * SEL:   Select21 * IN:    Input22 * OUT:   Output23 * R:     Red24 * G:     Green25 * B:     Blue26 * OFF:   Offset27 * THRS:  Threshold28 * DGTL:  Digital29 * LVL:   Level30 * PWR:   Power31 * MVIS:  Macrovision32 * W:     Width33 * H:     Height34 * ALGN:  Alignment35 * CLK:   Clocks36 * TOL:   Tolerance37 * BWTH:  Bandwidth38 * COEF:  Coefficient39 * STAT:  Status40 * AUTO:  Automatic41 * FLD:   Field42 * L:	  Line43 */44 45#define TVP7002_CHIP_REV		0x0046#define TVP7002_HPLL_FDBK_DIV_MSBS	0x0147#define TVP7002_HPLL_FDBK_DIV_LSBS	0x0248#define TVP7002_HPLL_CRTL		0x0349#define TVP7002_HPLL_PHASE_SEL		0x0450#define TVP7002_CLAMP_START		0x0551#define TVP7002_CLAMP_W			0x0652#define TVP7002_HSYNC_OUT_W		0x0753#define TVP7002_B_FINE_GAIN		0x0854#define TVP7002_G_FINE_GAIN		0x0955#define TVP7002_R_FINE_GAIN		0x0a56#define TVP7002_B_FINE_OFF_MSBS		0x0b57#define TVP7002_G_FINE_OFF_MSBS         0x0c58#define TVP7002_R_FINE_OFF_MSBS         0x0d59#define TVP7002_SYNC_CTL_1		0x0e60#define TVP7002_HPLL_AND_CLAMP_CTL	0x0f61#define TVP7002_SYNC_ON_G_THRS		0x1062#define TVP7002_SYNC_SEPARATOR_THRS	0x1163#define TVP7002_HPLL_PRE_COAST		0x1264#define TVP7002_HPLL_POST_COAST		0x1365#define TVP7002_SYNC_DETECT_STAT	0x1466#define TVP7002_OUT_FORMATTER		0x1567#define TVP7002_MISC_CTL_1		0x1668#define TVP7002_MISC_CTL_2              0x1769#define TVP7002_MISC_CTL_3              0x1870#define TVP7002_IN_MUX_SEL_1		0x1971#define TVP7002_IN_MUX_SEL_2            0x1a72#define TVP7002_B_AND_G_COARSE_GAIN	0x1b73#define TVP7002_R_COARSE_GAIN		0x1c74#define TVP7002_FINE_OFF_LSBS		0x1d75#define TVP7002_B_COARSE_OFF		0x1e76#define TVP7002_G_COARSE_OFF            0x1f77#define TVP7002_R_COARSE_OFF            0x2078#define TVP7002_HSOUT_OUT_START		0x2179#define TVP7002_MISC_CTL_4		0x2280#define TVP7002_B_DGTL_ALC_OUT_LSBS	0x2381#define TVP7002_G_DGTL_ALC_OUT_LSBS     0x2482#define TVP7002_R_DGTL_ALC_OUT_LSBS     0x2583#define TVP7002_AUTO_LVL_CTL_ENABLE	0x2684#define TVP7002_DGTL_ALC_OUT_MSBS	0x2785#define TVP7002_AUTO_LVL_CTL_FILTER	0x2886/* Reserved 0x29*/87#define TVP7002_FINE_CLAMP_CTL		0x2a88#define TVP7002_PWR_CTL			0x2b89#define TVP7002_ADC_SETUP		0x2c90#define TVP7002_COARSE_CLAMP_CTL	0x2d91#define TVP7002_SOG_CLAMP		0x2e92#define TVP7002_RGB_COARSE_CLAMP_CTL	0x2f93#define TVP7002_SOG_COARSE_CLAMP_CTL	0x3094#define TVP7002_ALC_PLACEMENT		0x3195/* Reserved 0x32 */96/* Reserved 0x33 */97#define TVP7002_MVIS_STRIPPER_W		0x3498#define TVP7002_VSYNC_ALGN		0x3599#define TVP7002_SYNC_BYPASS		0x36100#define TVP7002_L_FRAME_STAT_LSBS	0x37101#define TVP7002_L_FRAME_STAT_MSBS	0x38102#define TVP7002_CLK_L_STAT_LSBS		0x39103#define TVP7002_CLK_L_STAT_MSBS		0x3a104#define TVP7002_HSYNC_W			0x3b105#define TVP7002_VSYNC_W                 0x3c106#define TVP7002_L_LENGTH_TOL		0x3d107/* Reserved 0x3e */108#define TVP7002_VIDEO_BWTH_CTL		0x3f109#define TVP7002_AVID_START_PIXEL_LSBS	0x40110#define TVP7002_AVID_START_PIXEL_MSBS   0x41111#define TVP7002_AVID_STOP_PIXEL_LSBS	0x42112#define TVP7002_AVID_STOP_PIXEL_MSBS    0x43113#define TVP7002_VBLK_F_0_START_L_OFF	0x44114#define TVP7002_VBLK_F_1_START_L_OFF    0x45115#define TVP7002_VBLK_F_0_DURATION	0x46116#define TVP7002_VBLK_F_1_DURATION       0x47117#define TVP7002_FBIT_F_0_START_L_OFF	0x48118#define TVP7002_FBIT_F_1_START_L_OFF    0x49119#define TVP7002_YUV_Y_G_COEF_LSBS	0x4a120#define TVP7002_YUV_Y_G_COEF_MSBS       0x4b121#define TVP7002_YUV_Y_B_COEF_LSBS       0x4c122#define TVP7002_YUV_Y_B_COEF_MSBS       0x4d123#define TVP7002_YUV_Y_R_COEF_LSBS       0x4e124#define TVP7002_YUV_Y_R_COEF_MSBS       0x4f125#define TVP7002_YUV_U_G_COEF_LSBS       0x50126#define TVP7002_YUV_U_G_COEF_MSBS       0x51127#define TVP7002_YUV_U_B_COEF_LSBS       0x52128#define TVP7002_YUV_U_B_COEF_MSBS       0x53129#define TVP7002_YUV_U_R_COEF_LSBS       0x54130#define TVP7002_YUV_U_R_COEF_MSBS       0x55131#define TVP7002_YUV_V_G_COEF_LSBS       0x56132#define TVP7002_YUV_V_G_COEF_MSBS       0x57133#define TVP7002_YUV_V_B_COEF_LSBS       0x58134#define TVP7002_YUV_V_B_COEF_MSBS       0x59135#define TVP7002_YUV_V_R_COEF_LSBS       0x5a136#define TVP7002_YUV_V_R_COEF_MSBS       0x5b137 138