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1/* SPDX-License-Identifier: GPL-2.0-or-later */2/*3 * cx18 ADEC header4 *5 * Derived from cx25840-core.h6 *7 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>8 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>9 */10 11#ifndef _CX18_AV_CORE_H_12#define _CX18_AV_CORE_H_13 14#include <media/v4l2-device.h>15#include <media/v4l2-ctrls.h>16 17struct cx18;18 19enum cx18_av_video_input {20 /* Composite video inputs In1-In8 */21 CX18_AV_COMPOSITE1 = 1,22 CX18_AV_COMPOSITE2,23 CX18_AV_COMPOSITE3,24 CX18_AV_COMPOSITE4,25 CX18_AV_COMPOSITE5,26 CX18_AV_COMPOSITE6,27 CX18_AV_COMPOSITE7,28 CX18_AV_COMPOSITE8,29 30 /* S-Video inputs consist of one luma input (In1-In8) ORed with one31 chroma input (In5-In8) */32 CX18_AV_SVIDEO_LUMA1 = 0x10,33 CX18_AV_SVIDEO_LUMA2 = 0x20,34 CX18_AV_SVIDEO_LUMA3 = 0x30,35 CX18_AV_SVIDEO_LUMA4 = 0x40,36 CX18_AV_SVIDEO_LUMA5 = 0x50,37 CX18_AV_SVIDEO_LUMA6 = 0x60,38 CX18_AV_SVIDEO_LUMA7 = 0x70,39 CX18_AV_SVIDEO_LUMA8 = 0x80,40 CX18_AV_SVIDEO_CHROMA4 = 0x400,41 CX18_AV_SVIDEO_CHROMA5 = 0x500,42 CX18_AV_SVIDEO_CHROMA6 = 0x600,43 CX18_AV_SVIDEO_CHROMA7 = 0x700,44 CX18_AV_SVIDEO_CHROMA8 = 0x800,45 46 /* S-Video aliases for common luma/chroma combinations */47 CX18_AV_SVIDEO1 = 0x510,48 CX18_AV_SVIDEO2 = 0x620,49 CX18_AV_SVIDEO3 = 0x730,50 CX18_AV_SVIDEO4 = 0x840,51 52 /* Component Video inputs consist of one luma input (In1-In8) ORed53 with a red chroma (In4-In6) and blue chroma input (In7-In8) */54 CX18_AV_COMPONENT_LUMA1 = 0x1000,55 CX18_AV_COMPONENT_LUMA2 = 0x2000,56 CX18_AV_COMPONENT_LUMA3 = 0x3000,57 CX18_AV_COMPONENT_LUMA4 = 0x4000,58 CX18_AV_COMPONENT_LUMA5 = 0x5000,59 CX18_AV_COMPONENT_LUMA6 = 0x6000,60 CX18_AV_COMPONENT_LUMA7 = 0x7000,61 CX18_AV_COMPONENT_LUMA8 = 0x8000,62 CX18_AV_COMPONENT_R_CHROMA4 = 0x40000,63 CX18_AV_COMPONENT_R_CHROMA5 = 0x50000,64 CX18_AV_COMPONENT_R_CHROMA6 = 0x60000,65 CX18_AV_COMPONENT_B_CHROMA7 = 0x700000,66 CX18_AV_COMPONENT_B_CHROMA8 = 0x800000,67 68 /* Component Video aliases for common combinations */69 CX18_AV_COMPONENT1 = 0x861000,70};71 72enum cx18_av_audio_input {73 /* Audio inputs: serial or In4-In8 */74 CX18_AV_AUDIO_SERIAL1,75 CX18_AV_AUDIO_SERIAL2,76 CX18_AV_AUDIO4 = 4,77 CX18_AV_AUDIO5,78 CX18_AV_AUDIO6,79 CX18_AV_AUDIO7,80 CX18_AV_AUDIO8,81};82 83struct cx18_av_state {84 struct v4l2_subdev sd;85 struct v4l2_ctrl_handler hdl;86 struct v4l2_ctrl *volume;87 int radio;88 v4l2_std_id std;89 enum cx18_av_video_input vid_input;90 enum cx18_av_audio_input aud_input;91 u32 audclk_freq;92 int audmode;93 u32 rev;94 int is_initialized;95 96 /*97 * The VBI slicer starts operating and counting lines, beginning at98 * slicer line count of 1, at D lines after the deassertion of VRESET.99 * This staring field line, S, is 6 (& 319) or 10 (& 273) for 625 or 525100 * line systems respectively. Sliced ancillary data captured on VBI101 * slicer line M is inserted after the VBI slicer is done with line M,102 * when VBI slicer line count is N = M+1. Thus when the VBI slicer103 * reports a VBI slicer line number with ancillary data, the IDID0 byte104 * indicates VBI slicer line N. The actual field line that the captured105 * data comes from is106 *107 * L = M+(S+D-1) = N-1+(S+D-1) = N + (S+D-2).108 *109 * L is the line in the field, not frame, from which the VBI data came.110 * N is the line reported by the slicer in the ancillary data.111 * D is the slicer_line_delay value programmed into register 0x47f.112 * S is 6 for 625 line systems or 10 for 525 line systems113 * (S+D-2) is the slicer_line_offset used to convert slicer reported114 * line counts to actual field lines.115 */116 int slicer_line_delay;117 int slicer_line_offset;118};119 120 121/* Registers */122#define CXADEC_CHIP_TYPE_TIGER 0x837123#define CXADEC_CHIP_TYPE_MAKO 0x843124 125#define CXADEC_HOST_REG1 0x000126#define CXADEC_HOST_REG2 0x001127 128#define CXADEC_CHIP_CTRL 0x100129#define CXADEC_AFE_CTRL 0x104130#define CXADEC_PLL_CTRL1 0x108131#define CXADEC_VID_PLL_FRAC 0x10C132#define CXADEC_AUX_PLL_FRAC 0x110133#define CXADEC_PIN_CTRL1 0x114134#define CXADEC_PIN_CTRL2 0x118135#define CXADEC_PIN_CFG1 0x11C136#define CXADEC_PIN_CFG2 0x120137 138#define CXADEC_PIN_CFG3 0x124139#define CXADEC_I2S_MCLK 0x127140 141#define CXADEC_AUD_LOCK1 0x128142#define CXADEC_AUD_LOCK2 0x12C143#define CXADEC_POWER_CTRL 0x130144#define CXADEC_AFE_DIAG_CTRL1 0x134145#define CXADEC_AFE_DIAG_CTRL2 0x138146#define CXADEC_AFE_DIAG_CTRL3 0x13C147#define CXADEC_PLL_DIAG_CTRL 0x140148#define CXADEC_TEST_CTRL1 0x144149#define CXADEC_TEST_CTRL2 0x148150#define CXADEC_BIST_STAT 0x14C151#define CXADEC_DLL1_DIAG_CTRL 0x158152#define CXADEC_DLL2_DIAG_CTRL 0x15C153 154/* IR registers */155#define CXADEC_IR_CTRL_REG 0x200156#define CXADEC_IR_TXCLK_REG 0x204157#define CXADEC_IR_RXCLK_REG 0x208158#define CXADEC_IR_CDUTY_REG 0x20C159#define CXADEC_IR_STAT_REG 0x210160#define CXADEC_IR_IRQEN_REG 0x214161#define CXADEC_IR_FILTER_REG 0x218162#define CXADEC_IR_FIFO_REG 0x21C163 164/* Video Registers */165#define CXADEC_MODE_CTRL 0x400166#define CXADEC_OUT_CTRL1 0x404167#define CXADEC_OUT_CTRL2 0x408168#define CXADEC_GEN_STAT 0x40C169#define CXADEC_INT_STAT_MASK 0x410170#define CXADEC_LUMA_CTRL 0x414171 172#define CXADEC_BRIGHTNESS_CTRL_BYTE 0x414173#define CXADEC_CONTRAST_CTRL_BYTE 0x415174#define CXADEC_LUMA_CTRL_BYTE_3 0x416175 176#define CXADEC_HSCALE_CTRL 0x418177#define CXADEC_VSCALE_CTRL 0x41C178 179#define CXADEC_CHROMA_CTRL 0x420180 181#define CXADEC_USAT_CTRL_BYTE 0x420182#define CXADEC_VSAT_CTRL_BYTE 0x421183#define CXADEC_HUE_CTRL_BYTE 0x422184 185#define CXADEC_VBI_LINE_CTRL1 0x424186#define CXADEC_VBI_LINE_CTRL2 0x428187#define CXADEC_VBI_LINE_CTRL3 0x42C188#define CXADEC_VBI_LINE_CTRL4 0x430189#define CXADEC_VBI_LINE_CTRL5 0x434190#define CXADEC_VBI_FC_CFG 0x438191#define CXADEC_VBI_MISC_CFG1 0x43C192#define CXADEC_VBI_MISC_CFG2 0x440193#define CXADEC_VBI_PAY1 0x444194#define CXADEC_VBI_PAY2 0x448195#define CXADEC_VBI_CUST1_CFG1 0x44C196#define CXADEC_VBI_CUST1_CFG2 0x450197#define CXADEC_VBI_CUST1_CFG3 0x454198#define CXADEC_VBI_CUST2_CFG1 0x458199#define CXADEC_VBI_CUST2_CFG2 0x45C200#define CXADEC_VBI_CUST2_CFG3 0x460201#define CXADEC_VBI_CUST3_CFG1 0x464202#define CXADEC_VBI_CUST3_CFG2 0x468203#define CXADEC_VBI_CUST3_CFG3 0x46C204#define CXADEC_HORIZ_TIM_CTRL 0x470205#define CXADEC_VERT_TIM_CTRL 0x474206#define CXADEC_SRC_COMB_CFG 0x478207#define CXADEC_CHROMA_VBIOFF_CFG 0x47C208#define CXADEC_FIELD_COUNT 0x480209#define CXADEC_MISC_TIM_CTRL 0x484210#define CXADEC_DFE_CTRL1 0x488211#define CXADEC_DFE_CTRL2 0x48C212#define CXADEC_DFE_CTRL3 0x490213#define CXADEC_PLL_CTRL2 0x494214#define CXADEC_HTL_CTRL 0x498215#define CXADEC_COMB_CTRL 0x49C216#define CXADEC_CRUSH_CTRL 0x4A0217#define CXADEC_SOFT_RST_CTRL 0x4A4218#define CXADEC_MV_DT_CTRL2 0x4A8219#define CXADEC_MV_DT_CTRL3 0x4AC220#define CXADEC_MISC_DIAG_CTRL 0x4B8221 222#define CXADEC_DL_CTL 0x800223#define CXADEC_DL_CTL_ADDRESS_LOW 0x800 /* Byte 1 in DL_CTL */224#define CXADEC_DL_CTL_ADDRESS_HIGH 0x801 /* Byte 2 in DL_CTL */225#define CXADEC_DL_CTL_DATA 0x802 /* Byte 3 in DL_CTL */226#define CXADEC_DL_CTL_CONTROL 0x803 /* Byte 4 in DL_CTL */227 228#define CXADEC_STD_DET_STATUS 0x804229 230#define CXADEC_STD_DET_CTL 0x808231#define CXADEC_STD_DET_CTL_AUD_CTL 0x808 /* Byte 1 in STD_DET_CTL */232#define CXADEC_STD_DET_CTL_PREF_MODE 0x809 /* Byte 2 in STD_DET_CTL */233 234#define CXADEC_DW8051_INT 0x80C235#define CXADEC_GENERAL_CTL 0x810236#define CXADEC_AAGC_CTL 0x814237#define CXADEC_IF_SRC_CTL 0x818238#define CXADEC_ANLOG_DEMOD_CTL 0x81C239#define CXADEC_ROT_FREQ_CTL 0x820240#define CXADEC_FM1_CTL 0x824241#define CXADEC_PDF_CTL 0x828242#define CXADEC_DFT1_CTL1 0x82C243#define CXADEC_DFT1_CTL2 0x830244#define CXADEC_DFT_STATUS 0x834245#define CXADEC_DFT2_CTL1 0x838246#define CXADEC_DFT2_CTL2 0x83C247#define CXADEC_DFT2_STATUS 0x840248#define CXADEC_DFT3_CTL1 0x844249#define CXADEC_DFT3_CTL2 0x848250#define CXADEC_DFT3_STATUS 0x84C251#define CXADEC_DFT4_CTL1 0x850252#define CXADEC_DFT4_CTL2 0x854253#define CXADEC_DFT4_STATUS 0x858254#define CXADEC_AM_MTS_DET 0x85C255#define CXADEC_ANALOG_MUX_CTL 0x860256#define CXADEC_DIG_PLL_CTL1 0x864257#define CXADEC_DIG_PLL_CTL2 0x868258#define CXADEC_DIG_PLL_CTL3 0x86C259#define CXADEC_DIG_PLL_CTL4 0x870260#define CXADEC_DIG_PLL_CTL5 0x874261#define CXADEC_DEEMPH_GAIN_CTL 0x878262#define CXADEC_DEEMPH_COEF1 0x87C263#define CXADEC_DEEMPH_COEF2 0x880264#define CXADEC_DBX1_CTL1 0x884265#define CXADEC_DBX1_CTL2 0x888266#define CXADEC_DBX1_STATUS 0x88C267#define CXADEC_DBX2_CTL1 0x890268#define CXADEC_DBX2_CTL2 0x894269#define CXADEC_DBX2_STATUS 0x898270#define CXADEC_AM_FM_DIFF 0x89C271 272/* NICAM registers go here */273#define CXADEC_NICAM_STATUS 0x8C8274#define CXADEC_DEMATRIX_CTL 0x8CC275 276#define CXADEC_PATH1_CTL1 0x8D0277#define CXADEC_PATH1_VOL_CTL 0x8D4278#define CXADEC_PATH1_EQ_CTL 0x8D8279#define CXADEC_PATH1_SC_CTL 0x8DC280 281#define CXADEC_PATH2_CTL1 0x8E0282#define CXADEC_PATH2_VOL_CTL 0x8E4283#define CXADEC_PATH2_EQ_CTL 0x8E8284#define CXADEC_PATH2_SC_CTL 0x8EC285 286#define CXADEC_SRC_CTL 0x8F0287#define CXADEC_SRC_LF_COEF 0x8F4288#define CXADEC_SRC1_CTL 0x8F8289#define CXADEC_SRC2_CTL 0x8FC290#define CXADEC_SRC3_CTL 0x900291#define CXADEC_SRC4_CTL 0x904292#define CXADEC_SRC5_CTL 0x908293#define CXADEC_SRC6_CTL 0x90C294 295#define CXADEC_BASEBAND_OUT_SEL 0x910296#define CXADEC_I2S_IN_CTL 0x914297#define CXADEC_I2S_OUT_CTL 0x918298#define CXADEC_AC97_CTL 0x91C299#define CXADEC_QAM_PDF 0x920300#define CXADEC_QAM_CONST_DEC 0x924301#define CXADEC_QAM_ROTATOR_FREQ 0x948302 303/* Bit definitions / settings used in Mako Audio */304#define CXADEC_PREF_MODE_MONO_LANGA 0305#define CXADEC_PREF_MODE_MONO_LANGB 1306#define CXADEC_PREF_MODE_MONO_LANGC 2307#define CXADEC_PREF_MODE_FALLBACK 3308#define CXADEC_PREF_MODE_STEREO 4309#define CXADEC_PREF_MODE_DUAL_LANG_AC 5310#define CXADEC_PREF_MODE_DUAL_LANG_BC 6311#define CXADEC_PREF_MODE_DUAL_LANG_AB 7312 313 314#define CXADEC_DETECT_STEREO 1315#define CXADEC_DETECT_DUAL 2316#define CXADEC_DETECT_TRI 4317#define CXADEC_DETECT_SAP 0x10318#define CXADEC_DETECT_NO_SIGNAL 0xFF319 320#define CXADEC_SELECT_AUDIO_STANDARD_BG 0xF0 /* NICAM BG and A2 BG */321#define CXADEC_SELECT_AUDIO_STANDARD_DK1 0xF1 /* NICAM DK and A2 DK */322#define CXADEC_SELECT_AUDIO_STANDARD_DK2 0xF2323#define CXADEC_SELECT_AUDIO_STANDARD_DK3 0xF3324#define CXADEC_SELECT_AUDIO_STANDARD_I 0xF4 /* NICAM I and A1 */325#define CXADEC_SELECT_AUDIO_STANDARD_L 0xF5 /* NICAM L and System L AM */326#define CXADEC_SELECT_AUDIO_STANDARD_BTSC 0xF6327#define CXADEC_SELECT_AUDIO_STANDARD_EIAJ 0xF7328#define CXADEC_SELECT_AUDIO_STANDARD_A2_M 0xF8 /* A2 M */329#define CXADEC_SELECT_AUDIO_STANDARD_FM 0xF9 /* FM radio */330#define CXADEC_SELECT_AUDIO_STANDARD_AUTO 0xFF /* Auto detect */331 332static inline struct cx18_av_state *to_cx18_av_state(struct v4l2_subdev *sd)333{334 return container_of(sd, struct cx18_av_state, sd);335}336 337static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)338{339 return &container_of(ctrl->handler, struct cx18_av_state, hdl)->sd;340}341 342/* ----------------------------------------------------------------------- */343/* cx18_av-core.c */344int cx18_av_write(struct cx18 *cx, u16 addr, u8 value);345int cx18_av_write4(struct cx18 *cx, u16 addr, u32 value);346int cx18_av_write4_noretry(struct cx18 *cx, u16 addr, u32 value);347int cx18_av_write_expect(struct cx18 *cx, u16 addr, u8 value, u8 eval, u8 mask);348int cx18_av_write4_expect(struct cx18 *cx, u16 addr, u32 value, u32 eval,349 u32 mask);350u8 cx18_av_read(struct cx18 *cx, u16 addr);351u32 cx18_av_read4(struct cx18 *cx, u16 addr);352int cx18_av_and_or(struct cx18 *cx, u16 addr, unsigned mask, u8 value);353int cx18_av_and_or4(struct cx18 *cx, u16 addr, u32 mask, u32 value);354void cx18_av_std_setup(struct cx18 *cx);355 356int cx18_av_probe(struct cx18 *cx);357 358/* ----------------------------------------------------------------------- */359/* cx18_av-firmware.c */360int cx18_av_loadfw(struct cx18 *cx);361 362/* ----------------------------------------------------------------------- */363/* cx18_av-audio.c */364int cx18_av_s_clock_freq(struct v4l2_subdev *sd, u32 freq);365void cx18_av_audio_set_path(struct cx18 *cx);366extern const struct v4l2_ctrl_ops cx18_av_audio_ctrl_ops;367 368/* ----------------------------------------------------------------------- */369/* cx18_av-vbi.c */370int cx18_av_decode_vbi_line(struct v4l2_subdev *sd,371 struct v4l2_decode_vbi_line *vbi);372int cx18_av_s_raw_fmt(struct v4l2_subdev *sd, struct v4l2_vbi_format *fmt);373int cx18_av_g_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *fmt);374int cx18_av_s_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *fmt);375 376#endif377