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1// SPDX-License-Identifier: GPL-2.0-or-later2/*3 * cx18 mailbox functions4 *5 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>6 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>7 */8 9#include <linux/bitops.h>10 11#include "cx18-driver.h"12#include "cx18-io.h"13#include "cx18-scb.h"14#include "cx18-irq.h"15#include "cx18-mailbox.h"16#include "cx18-queue.h"17#include "cx18-streams.h"18#include "cx18-alsa-pcm.h" /* FIXME make configurable */19 20static const char *rpu_str[] = { "APU", "CPU", "EPU", "HPU" };21 22#define API_FAST (1 << 2) /* Short timeout */23#define API_SLOW (1 << 3) /* Additional 300ms timeout */24 25struct cx18_api_info {26 u32 cmd;27 u8 flags; /* Flags, see above */28 u8 rpu; /* Processing unit */29 const char *name; /* The name of the command */30};31 32#define API_ENTRY(rpu, x, f) { (x), (f), (rpu), #x }33 34static const struct cx18_api_info api_info[] = {35 /* MPEG encoder API */36 API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE, 0),37 API_ENTRY(CPU, CX18_EPU_DEBUG, 0),38 API_ENTRY(CPU, CX18_CREATE_TASK, 0),39 API_ENTRY(CPU, CX18_DESTROY_TASK, 0),40 API_ENTRY(CPU, CX18_CPU_CAPTURE_START, API_SLOW),41 API_ENTRY(CPU, CX18_CPU_CAPTURE_STOP, API_SLOW),42 API_ENTRY(CPU, CX18_CPU_CAPTURE_PAUSE, 0),43 API_ENTRY(CPU, CX18_CPU_CAPTURE_RESUME, 0),44 API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE, 0),45 API_ENTRY(CPU, CX18_CPU_SET_STREAM_OUTPUT_TYPE, 0),46 API_ENTRY(CPU, CX18_CPU_SET_VIDEO_IN, 0),47 API_ENTRY(CPU, CX18_CPU_SET_VIDEO_RATE, 0),48 API_ENTRY(CPU, CX18_CPU_SET_VIDEO_RESOLUTION, 0),49 API_ENTRY(CPU, CX18_CPU_SET_FILTER_PARAM, 0),50 API_ENTRY(CPU, CX18_CPU_SET_SPATIAL_FILTER_TYPE, 0),51 API_ENTRY(CPU, CX18_CPU_SET_MEDIAN_CORING, 0),52 API_ENTRY(CPU, CX18_CPU_SET_INDEXTABLE, 0),53 API_ENTRY(CPU, CX18_CPU_SET_AUDIO_PARAMETERS, 0),54 API_ENTRY(CPU, CX18_CPU_SET_VIDEO_MUTE, 0),55 API_ENTRY(CPU, CX18_CPU_SET_AUDIO_MUTE, 0),56 API_ENTRY(CPU, CX18_CPU_SET_MISC_PARAMETERS, 0),57 API_ENTRY(CPU, CX18_CPU_SET_RAW_VBI_PARAM, API_SLOW),58 API_ENTRY(CPU, CX18_CPU_SET_CAPTURE_LINE_NO, 0),59 API_ENTRY(CPU, CX18_CPU_SET_COPYRIGHT, 0),60 API_ENTRY(CPU, CX18_CPU_SET_AUDIO_PID, 0),61 API_ENTRY(CPU, CX18_CPU_SET_VIDEO_PID, 0),62 API_ENTRY(CPU, CX18_CPU_SET_VER_CROP_LINE, 0),63 API_ENTRY(CPU, CX18_CPU_SET_GOP_STRUCTURE, 0),64 API_ENTRY(CPU, CX18_CPU_SET_SCENE_CHANGE_DETECTION, 0),65 API_ENTRY(CPU, CX18_CPU_SET_ASPECT_RATIO, 0),66 API_ENTRY(CPU, CX18_CPU_SET_SKIP_INPUT_FRAME, 0),67 API_ENTRY(CPU, CX18_CPU_SET_SLICED_VBI_PARAM, 0),68 API_ENTRY(CPU, CX18_CPU_SET_USERDATA_PLACE_HOLDER, 0),69 API_ENTRY(CPU, CX18_CPU_GET_ENC_PTS, 0),70 API_ENTRY(CPU, CX18_CPU_SET_VFC_PARAM, 0),71 API_ENTRY(CPU, CX18_CPU_DE_SET_MDL_ACK, 0),72 API_ENTRY(CPU, CX18_CPU_DE_SET_MDL, API_FAST),73 API_ENTRY(CPU, CX18_CPU_DE_RELEASE_MDL, API_SLOW),74 API_ENTRY(APU, CX18_APU_START, 0),75 API_ENTRY(APU, CX18_APU_STOP, 0),76 API_ENTRY(APU, CX18_APU_RESETAI, 0),77 API_ENTRY(CPU, CX18_CPU_DEBUG_PEEK32, 0),78 API_ENTRY(0, 0, 0),79};80 81static const struct cx18_api_info *find_api_info(u32 cmd)82{83 int i;84 85 for (i = 0; api_info[i].cmd; i++)86 if (api_info[i].cmd == cmd)87 return &api_info[i];88 return NULL;89}90 91/* Call with buf of n*11+1 bytes */92static char *u32arr2hex(u32 data[], int n, char *buf)93{94 char *p;95 int i;96 97 for (i = 0, p = buf; i < n; i++, p += 11) {98 /* kernel snprintf() appends '\0' always */99 snprintf(p, 12, " %#010x", data[i]);100 }101 *p = '\0';102 return buf;103}104 105static void dump_mb(struct cx18 *cx, struct cx18_mailbox *mb, char *name)106{107 char argstr[MAX_MB_ARGUMENTS*11+1];108 109 if (!(cx18_debug & CX18_DBGFLG_API))110 return;111 112 CX18_DEBUG_API("%s: req %#010x ack %#010x cmd %#010x err %#010x args%s\n",113 name, mb->request, mb->ack, mb->cmd, mb->error,114 u32arr2hex(mb->args, MAX_MB_ARGUMENTS, argstr));115}116 117 118/*119 * Functions that run in a work_queue work handling context120 */121 122static void cx18_mdl_send_to_dvb(struct cx18_stream *s, struct cx18_mdl *mdl)123{124 struct cx18_buffer *buf;125 126 if (s->dvb == NULL || !s->dvb->enabled || mdl->bytesused == 0)127 return;128 129 /* We ignore mdl and buf readpos accounting here - it doesn't matter */130 131 /* The likely case */132 if (list_is_singular(&mdl->buf_list)) {133 buf = list_first_entry(&mdl->buf_list, struct cx18_buffer,134 list);135 if (buf->bytesused)136 dvb_dmx_swfilter(&s->dvb->demux,137 buf->buf, buf->bytesused);138 return;139 }140 141 list_for_each_entry(buf, &mdl->buf_list, list) {142 if (buf->bytesused == 0)143 break;144 dvb_dmx_swfilter(&s->dvb->demux, buf->buf, buf->bytesused);145 }146}147 148static void cx18_mdl_send_to_vb2(struct cx18_stream *s, struct cx18_mdl *mdl)149{150 struct cx18_vb2_buffer *vb_buf;151 struct cx18_buffer *buf;152 u8 *p;153 u32 offset = 0;154 int dispatch = 0;155 unsigned long bsize;156 157 if (mdl->bytesused == 0)158 return;159 160 /* Acquire a vb2 buffer, clone to and release it */161 spin_lock(&s->vb_lock);162 if (list_empty(&s->vb_capture))163 goto out;164 165 vb_buf = list_first_entry(&s->vb_capture, struct cx18_vb2_buffer,166 list);167 168 p = vb2_plane_vaddr(&vb_buf->vb.vb2_buf, 0);169 if (!p)170 goto out;171 172 bsize = vb2_get_plane_payload(&vb_buf->vb.vb2_buf, 0);173 offset = vb_buf->bytes_used;174 list_for_each_entry(buf, &mdl->buf_list, list) {175 if (buf->bytesused == 0)176 break;177 178 if ((offset + buf->bytesused) <= bsize) {179 memcpy(p + offset, buf->buf, buf->bytesused);180 offset += buf->bytesused;181 vb_buf->bytes_used += buf->bytesused;182 }183 }184 185 /* If we've filled the buffer as per the callers res then dispatch it */186 if (vb_buf->bytes_used >= s->vb_bytes_per_frame) {187 dispatch = 1;188 vb_buf->bytes_used = 0;189 }190 191 if (dispatch) {192 vb_buf->vb.vb2_buf.timestamp = ktime_get_ns();193 vb_buf->vb.sequence = s->sequence++;194 list_del(&vb_buf->list);195 vb2_buffer_done(&vb_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);196 }197 198 mod_timer(&s->vb_timeout, msecs_to_jiffies(2000) + jiffies);199 200out:201 spin_unlock(&s->vb_lock);202}203 204static void cx18_mdl_send_to_alsa(struct cx18 *cx, struct cx18_stream *s,205 struct cx18_mdl *mdl)206{207 struct cx18_buffer *buf;208 209 if (mdl->bytesused == 0)210 return;211 212 /* We ignore mdl and buf readpos accounting here - it doesn't matter */213 214 /* The likely case */215 if (list_is_singular(&mdl->buf_list)) {216 buf = list_first_entry(&mdl->buf_list, struct cx18_buffer,217 list);218 if (buf->bytesused)219 cx->pcm_announce_callback(cx->alsa, buf->buf,220 buf->bytesused);221 return;222 }223 224 list_for_each_entry(buf, &mdl->buf_list, list) {225 if (buf->bytesused == 0)226 break;227 cx->pcm_announce_callback(cx->alsa, buf->buf, buf->bytesused);228 }229}230 231static void epu_dma_done(struct cx18 *cx, struct cx18_in_work_order *order)232{233 u32 handle, mdl_ack_count, id;234 struct cx18_mailbox *mb;235 struct cx18_mdl_ack *mdl_ack;236 struct cx18_stream *s;237 struct cx18_mdl *mdl;238 int i;239 240 mb = &order->mb;241 handle = mb->args[0];242 s = cx18_handle_to_stream(cx, handle);243 244 if (s == NULL) {245 CX18_WARN("Got DMA done notification for unknown/inactive handle %d, %s mailbox seq no %d\n",246 handle,247 (order->flags & CX18_F_EWO_MB_STALE_UPON_RECEIPT) ?248 "stale" : "good", mb->request);249 return;250 }251 252 mdl_ack_count = mb->args[2];253 mdl_ack = order->mdl_ack;254 for (i = 0; i < mdl_ack_count; i++, mdl_ack++) {255 id = mdl_ack->id;256 /*257 * Simple integrity check for processing a stale (and possibly258 * inconsistent mailbox): make sure the MDL id is in the259 * valid range for the stream.260 *261 * We go through the trouble of dealing with stale mailboxes262 * because most of the time, the mailbox data is still valid and263 * unchanged (and in practice the firmware ping-pongs the264 * two mdl_ack buffers so mdl_acks are not stale).265 *266 * There are occasions when we get a half changed mailbox,267 * which this check catches for a handle & id mismatch. If the268 * handle and id do correspond, the worst case is that we269 * completely lost the old MDL, but pick up the new MDL270 * early (but the new mdl_ack is guaranteed to be good in this271 * case as the firmware wouldn't point us to a new mdl_ack until272 * it's filled in).273 *274 * cx18_queue_get_mdl() will detect the lost MDLs275 * and send them back to q_free for fw rotation eventually.276 */277 if ((order->flags & CX18_F_EWO_MB_STALE_UPON_RECEIPT) &&278 !(id >= s->mdl_base_idx &&279 id < (s->mdl_base_idx + s->buffers))) {280 CX18_WARN("Fell behind! Ignoring stale mailbox with inconsistent data. Lost MDL for mailbox seq no %d\n",281 mb->request);282 break;283 }284 mdl = cx18_queue_get_mdl(s, id, mdl_ack->data_used);285 286 CX18_DEBUG_HI_DMA("DMA DONE for %s (MDL %d)\n", s->name, id);287 if (mdl == NULL) {288 CX18_WARN("Could not find MDL %d for stream %s\n",289 id, s->name);290 continue;291 }292 293 CX18_DEBUG_HI_DMA("%s recv bytesused = %d\n",294 s->name, mdl->bytesused);295 296 if (s->type == CX18_ENC_STREAM_TYPE_TS) {297 cx18_mdl_send_to_dvb(s, mdl);298 cx18_enqueue(s, mdl, &s->q_free);299 } else if (s->type == CX18_ENC_STREAM_TYPE_PCM) {300 /* Pass the data to cx18-alsa */301 if (cx->pcm_announce_callback != NULL) {302 cx18_mdl_send_to_alsa(cx, s, mdl);303 cx18_enqueue(s, mdl, &s->q_free);304 } else {305 cx18_enqueue(s, mdl, &s->q_full);306 }307 } else if (s->type == CX18_ENC_STREAM_TYPE_YUV) {308 cx18_mdl_send_to_vb2(s, mdl);309 cx18_enqueue(s, mdl, &s->q_free);310 } else {311 cx18_enqueue(s, mdl, &s->q_full);312 if (s->type == CX18_ENC_STREAM_TYPE_IDX)313 cx18_stream_rotate_idx_mdls(cx);314 }315 }316 /* Put as many MDLs as possible back into fw use */317 cx18_stream_load_fw_queue(s);318 319 wake_up(&cx->dma_waitq);320 if (s->id != -1)321 wake_up(&s->waitq);322}323 324static void epu_debug(struct cx18 *cx, struct cx18_in_work_order *order)325{326 char *p;327 char *str = order->str;328 329 CX18_DEBUG_INFO("%x %s\n", order->mb.args[0], str);330 p = strchr(str, '.');331 if (!test_bit(CX18_F_I_LOADED_FW, &cx->i_flags) && p && p > str)332 CX18_INFO("FW version: %s\n", p - 1);333}334 335static void epu_cmd(struct cx18 *cx, struct cx18_in_work_order *order)336{337 switch (order->rpu) {338 case CPU:339 {340 switch (order->mb.cmd) {341 case CX18_EPU_DMA_DONE:342 epu_dma_done(cx, order);343 break;344 case CX18_EPU_DEBUG:345 epu_debug(cx, order);346 break;347 default:348 CX18_WARN("Unknown CPU to EPU mailbox command %#0x\n",349 order->mb.cmd);350 break;351 }352 break;353 }354 case APU:355 CX18_WARN("Unknown APU to EPU mailbox command %#0x\n",356 order->mb.cmd);357 break;358 default:359 break;360 }361}362 363static364void free_in_work_order(struct cx18 *cx, struct cx18_in_work_order *order)365{366 atomic_set(&order->pending, 0);367}368 369void cx18_in_work_handler(struct work_struct *work)370{371 struct cx18_in_work_order *order =372 container_of(work, struct cx18_in_work_order, work);373 struct cx18 *cx = order->cx;374 epu_cmd(cx, order);375 free_in_work_order(cx, order);376}377 378 379/*380 * Functions that run in an interrupt handling context381 */382 383static void mb_ack_irq(struct cx18 *cx, struct cx18_in_work_order *order)384{385 struct cx18_mailbox __iomem *ack_mb;386 u32 ack_irq, req;387 388 switch (order->rpu) {389 case APU:390 ack_irq = IRQ_EPU_TO_APU_ACK;391 ack_mb = &cx->scb->apu2epu_mb;392 break;393 case CPU:394 ack_irq = IRQ_EPU_TO_CPU_ACK;395 ack_mb = &cx->scb->cpu2epu_mb;396 break;397 default:398 CX18_WARN("Unhandled RPU (%d) for command %x ack\n",399 order->rpu, order->mb.cmd);400 return;401 }402 403 req = order->mb.request;404 /* Don't ack if the RPU has gotten impatient and timed us out */405 if (req != cx18_readl(cx, &ack_mb->request) ||406 req == cx18_readl(cx, &ack_mb->ack)) {407 CX18_DEBUG_WARN("Possibly falling behind: %s self-ack'ed our incoming %s to EPU mailbox (sequence no. %u) while processing\n",408 rpu_str[order->rpu], rpu_str[order->rpu], req);409 order->flags |= CX18_F_EWO_MB_STALE_WHILE_PROC;410 return;411 }412 cx18_writel(cx, req, &ack_mb->ack);413 cx18_write_reg_expect(cx, ack_irq, SW2_INT_SET, ack_irq, ack_irq);414 return;415}416 417static int epu_dma_done_irq(struct cx18 *cx, struct cx18_in_work_order *order)418{419 u32 handle, mdl_ack_offset, mdl_ack_count;420 struct cx18_mailbox *mb;421 int i;422 423 mb = &order->mb;424 handle = mb->args[0];425 mdl_ack_offset = mb->args[1];426 mdl_ack_count = mb->args[2];427 428 if (handle == CX18_INVALID_TASK_HANDLE ||429 mdl_ack_count == 0 || mdl_ack_count > CX18_MAX_MDL_ACKS) {430 if ((order->flags & CX18_F_EWO_MB_STALE) == 0)431 mb_ack_irq(cx, order);432 return -1;433 }434 435 for (i = 0; i < sizeof(struct cx18_mdl_ack) * mdl_ack_count; i += sizeof(u32))436 ((u32 *)order->mdl_ack)[i / sizeof(u32)] =437 cx18_readl(cx, cx->enc_mem + mdl_ack_offset + i);438 439 if ((order->flags & CX18_F_EWO_MB_STALE) == 0)440 mb_ack_irq(cx, order);441 return 1;442}443 444static445int epu_debug_irq(struct cx18 *cx, struct cx18_in_work_order *order)446{447 u32 str_offset;448 char *str = order->str;449 450 str[0] = '\0';451 str_offset = order->mb.args[1];452 if (str_offset) {453 cx18_setup_page(cx, str_offset);454 cx18_memcpy_fromio(cx, str, cx->enc_mem + str_offset, 252);455 str[252] = '\0';456 cx18_setup_page(cx, SCB_OFFSET);457 }458 459 if ((order->flags & CX18_F_EWO_MB_STALE) == 0)460 mb_ack_irq(cx, order);461 462 return str_offset ? 1 : 0;463}464 465static inline466int epu_cmd_irq(struct cx18 *cx, struct cx18_in_work_order *order)467{468 int ret = -1;469 470 switch (order->rpu) {471 case CPU:472 {473 switch (order->mb.cmd) {474 case CX18_EPU_DMA_DONE:475 ret = epu_dma_done_irq(cx, order);476 break;477 case CX18_EPU_DEBUG:478 ret = epu_debug_irq(cx, order);479 break;480 default:481 CX18_WARN("Unknown CPU to EPU mailbox command %#0x\n",482 order->mb.cmd);483 break;484 }485 break;486 }487 case APU:488 CX18_WARN("Unknown APU to EPU mailbox command %#0x\n",489 order->mb.cmd);490 break;491 default:492 break;493 }494 return ret;495}496 497static inline498struct cx18_in_work_order *alloc_in_work_order_irq(struct cx18 *cx)499{500 int i;501 struct cx18_in_work_order *order = NULL;502 503 for (i = 0; i < CX18_MAX_IN_WORK_ORDERS; i++) {504 /*505 * We only need "pending" atomic to inspect its contents,506 * and need not do a check and set because:507 * 1. Any work handler thread only clears "pending" and only508 * on one, particular work order at a time, per handler thread.509 * 2. "pending" is only set here, and we're serialized because510 * we're called in an IRQ handler context.511 */512 if (atomic_read(&cx->in_work_order[i].pending) == 0) {513 order = &cx->in_work_order[i];514 atomic_set(&order->pending, 1);515 break;516 }517 }518 return order;519}520 521void cx18_api_epu_cmd_irq(struct cx18 *cx, int rpu)522{523 struct cx18_mailbox __iomem *mb;524 struct cx18_mailbox *order_mb;525 struct cx18_in_work_order *order;526 int submit;527 int i;528 529 switch (rpu) {530 case CPU:531 mb = &cx->scb->cpu2epu_mb;532 break;533 case APU:534 mb = &cx->scb->apu2epu_mb;535 break;536 default:537 return;538 }539 540 order = alloc_in_work_order_irq(cx);541 if (order == NULL) {542 CX18_WARN("Unable to find blank work order form to schedule incoming mailbox command processing\n");543 return;544 }545 546 order->flags = 0;547 order->rpu = rpu;548 order_mb = &order->mb;549 550 /* mb->cmd and mb->args[0] through mb->args[2] */551 for (i = 0; i < 4; i++)552 (&order_mb->cmd)[i] = cx18_readl(cx, &mb->cmd + i);553 554 /* mb->request and mb->ack. N.B. we want to read mb->ack last */555 for (i = 0; i < 2; i++)556 (&order_mb->request)[i] = cx18_readl(cx, &mb->request + i);557 558 if (order_mb->request == order_mb->ack) {559 CX18_DEBUG_WARN("Possibly falling behind: %s self-ack'ed our incoming %s to EPU mailbox (sequence no. %u)\n",560 rpu_str[rpu], rpu_str[rpu], order_mb->request);561 if (cx18_debug & CX18_DBGFLG_WARN)562 dump_mb(cx, order_mb, "incoming");563 order->flags = CX18_F_EWO_MB_STALE_UPON_RECEIPT;564 }565 566 /*567 * Individual EPU command processing is responsible for ack-ing568 * a non-stale mailbox as soon as possible569 */570 submit = epu_cmd_irq(cx, order);571 if (submit > 0) {572 queue_work(cx->in_work_queue, &order->work);573 }574}575 576 577/*578 * Functions called from a non-interrupt, non work_queue context579 */580 581static int cx18_api_call(struct cx18 *cx, u32 cmd, int args, u32 data[])582{583 const struct cx18_api_info *info = find_api_info(cmd);584 u32 irq, req, ack, err;585 struct cx18_mailbox __iomem *mb;586 wait_queue_head_t *waitq;587 struct mutex *mb_lock;588 unsigned long int t0, timeout, ret;589 int i;590 char argstr[MAX_MB_ARGUMENTS*11+1];591 DEFINE_WAIT(w);592 593 if (info == NULL) {594 CX18_WARN("unknown cmd %x\n", cmd);595 return -EINVAL;596 }597 598 if (cx18_debug & CX18_DBGFLG_API) { /* only call u32arr2hex if needed */599 if (cmd == CX18_CPU_DE_SET_MDL) {600 if (cx18_debug & CX18_DBGFLG_HIGHVOL)601 CX18_DEBUG_HI_API("%s\tcmd %#010x args%s\n",602 info->name, cmd,603 u32arr2hex(data, args, argstr));604 } else605 CX18_DEBUG_API("%s\tcmd %#010x args%s\n",606 info->name, cmd,607 u32arr2hex(data, args, argstr));608 }609 610 switch (info->rpu) {611 case APU:612 waitq = &cx->mb_apu_waitq;613 mb_lock = &cx->epu2apu_mb_lock;614 irq = IRQ_EPU_TO_APU;615 mb = &cx->scb->epu2apu_mb;616 break;617 case CPU:618 waitq = &cx->mb_cpu_waitq;619 mb_lock = &cx->epu2cpu_mb_lock;620 irq = IRQ_EPU_TO_CPU;621 mb = &cx->scb->epu2cpu_mb;622 break;623 default:624 CX18_WARN("Unknown RPU (%d) for API call\n", info->rpu);625 return -EINVAL;626 }627 628 mutex_lock(mb_lock);629 /*630 * Wait for an in-use mailbox to complete631 *632 * If the XPU is responding with Ack's, the mailbox shouldn't be in633 * a busy state, since we serialize access to it on our end.634 *635 * If the wait for ack after sending a previous command was interrupted636 * by a signal, we may get here and find a busy mailbox. After waiting,637 * mark it "not busy" from our end, if the XPU hasn't ack'ed it still.638 */639 req = cx18_readl(cx, &mb->request);640 timeout = msecs_to_jiffies(10);641 ret = wait_event_timeout(*waitq,642 (ack = cx18_readl(cx, &mb->ack)) == req,643 timeout);644 if (req != ack) {645 /* waited long enough, make the mbox "not busy" from our end */646 cx18_writel(cx, req, &mb->ack);647 CX18_ERR("mbox was found stuck busy when setting up for %s; clearing busy and trying to proceed\n",648 info->name);649 } else if (ret != timeout)650 CX18_DEBUG_API("waited %u msecs for busy mbox to be acked\n",651 jiffies_to_msecs(timeout-ret));652 653 /* Build the outgoing mailbox */654 req = ((req & 0xfffffffe) == 0xfffffffe) ? 1 : req + 1;655 656 cx18_writel(cx, cmd, &mb->cmd);657 for (i = 0; i < args; i++)658 cx18_writel(cx, data[i], &mb->args[i]);659 cx18_writel(cx, 0, &mb->error);660 cx18_writel(cx, req, &mb->request);661 cx18_writel(cx, req - 1, &mb->ack); /* ensure ack & req are distinct */662 663 /*664 * Notify the XPU and wait for it to send an Ack back665 */666 timeout = msecs_to_jiffies((info->flags & API_FAST) ? 10 : 20);667 668 CX18_DEBUG_HI_IRQ("sending interrupt SW1: %x to send %s\n",669 irq, info->name);670 671 /* So we don't miss the wakeup, prepare to wait before notifying fw */672 prepare_to_wait(waitq, &w, TASK_UNINTERRUPTIBLE);673 cx18_write_reg_expect(cx, irq, SW1_INT_SET, irq, irq);674 675 t0 = jiffies;676 ack = cx18_readl(cx, &mb->ack);677 if (ack != req) {678 schedule_timeout(timeout);679 ret = jiffies - t0;680 ack = cx18_readl(cx, &mb->ack);681 } else {682 ret = jiffies - t0;683 }684 685 finish_wait(waitq, &w);686 687 if (req != ack) {688 mutex_unlock(mb_lock);689 if (ret >= timeout) {690 /* Timed out */691 CX18_DEBUG_WARN("sending %s timed out waiting %d msecs for RPU acknowledgment\n",692 info->name, jiffies_to_msecs(ret));693 } else {694 CX18_DEBUG_WARN("woken up before mailbox ack was ready after submitting %s to RPU. only waited %d msecs on req %u but awakened with unmatched ack %u\n",695 info->name,696 jiffies_to_msecs(ret),697 req, ack);698 }699 return -EINVAL;700 }701 702 if (ret >= timeout)703 CX18_DEBUG_WARN("failed to be awakened upon RPU acknowledgment sending %s; timed out waiting %d msecs\n",704 info->name, jiffies_to_msecs(ret));705 else706 CX18_DEBUG_HI_API("waited %u msecs for %s to be acked\n",707 jiffies_to_msecs(ret), info->name);708 709 /* Collect data returned by the XPU */710 for (i = 0; i < MAX_MB_ARGUMENTS; i++)711 data[i] = cx18_readl(cx, &mb->args[i]);712 err = cx18_readl(cx, &mb->error);713 mutex_unlock(mb_lock);714 715 /*716 * Wait for XPU to perform extra actions for the caller in some cases.717 * e.g. CX18_CPU_DE_RELEASE_MDL will cause the CPU to send all MDLs718 * back in a burst shortly thereafter719 */720 if (info->flags & API_SLOW)721 cx18_msleep_timeout(300, 0);722 723 if (err)724 CX18_DEBUG_API("mailbox error %08x for command %s\n", err,725 info->name);726 return err ? -EIO : 0;727}728 729int cx18_api(struct cx18 *cx, u32 cmd, int args, u32 data[])730{731 return cx18_api_call(cx, cmd, args, data);732}733 734static int cx18_set_filter_param(struct cx18_stream *s)735{736 struct cx18 *cx = s->cx;737 u32 mode;738 int ret;739 740 mode = (cx->filter_mode & 1) ? 2 : (cx->spatial_strength ? 1 : 0);741 ret = cx18_vapi(cx, CX18_CPU_SET_FILTER_PARAM, 4,742 s->handle, 1, mode, cx->spatial_strength);743 mode = (cx->filter_mode & 2) ? 2 : (cx->temporal_strength ? 1 : 0);744 ret = ret ? ret : cx18_vapi(cx, CX18_CPU_SET_FILTER_PARAM, 4,745 s->handle, 0, mode, cx->temporal_strength);746 ret = ret ? ret : cx18_vapi(cx, CX18_CPU_SET_FILTER_PARAM, 4,747 s->handle, 2, cx->filter_mode >> 2, 0);748 return ret;749}750 751int cx18_api_func(void *priv, u32 cmd, int in, int out,752 u32 data[CX2341X_MBOX_MAX_DATA])753{754 struct cx18_stream *s = priv;755 struct cx18 *cx = s->cx;756 757 switch (cmd) {758 case CX2341X_ENC_SET_OUTPUT_PORT:759 return 0;760 case CX2341X_ENC_SET_FRAME_RATE:761 return cx18_vapi(cx, CX18_CPU_SET_VIDEO_IN, 6,762 s->handle, 0, 0, 0, 0, data[0]);763 case CX2341X_ENC_SET_FRAME_SIZE:764 return cx18_vapi(cx, CX18_CPU_SET_VIDEO_RESOLUTION, 3,765 s->handle, data[1], data[0]);766 case CX2341X_ENC_SET_STREAM_TYPE:767 return cx18_vapi(cx, CX18_CPU_SET_STREAM_OUTPUT_TYPE, 2,768 s->handle, data[0]);769 case CX2341X_ENC_SET_ASPECT_RATIO:770 return cx18_vapi(cx, CX18_CPU_SET_ASPECT_RATIO, 2,771 s->handle, data[0]);772 773 case CX2341X_ENC_SET_GOP_PROPERTIES:774 return cx18_vapi(cx, CX18_CPU_SET_GOP_STRUCTURE, 3,775 s->handle, data[0], data[1]);776 case CX2341X_ENC_SET_GOP_CLOSURE:777 return 0;778 case CX2341X_ENC_SET_AUDIO_PROPERTIES:779 return cx18_vapi(cx, CX18_CPU_SET_AUDIO_PARAMETERS, 2,780 s->handle, data[0]);781 case CX2341X_ENC_MUTE_AUDIO:782 return cx18_vapi(cx, CX18_CPU_SET_AUDIO_MUTE, 2,783 s->handle, data[0]);784 case CX2341X_ENC_SET_BIT_RATE:785 return cx18_vapi(cx, CX18_CPU_SET_VIDEO_RATE, 5,786 s->handle, data[0], data[1], data[2], data[3]);787 case CX2341X_ENC_MUTE_VIDEO:788 return cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2,789 s->handle, data[0]);790 case CX2341X_ENC_SET_FRAME_DROP_RATE:791 return cx18_vapi(cx, CX18_CPU_SET_SKIP_INPUT_FRAME, 2,792 s->handle, data[0]);793 case CX2341X_ENC_MISC:794 return cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 4,795 s->handle, data[0], data[1], data[2]);796 case CX2341X_ENC_SET_DNR_FILTER_MODE:797 cx->filter_mode = (data[0] & 3) | (data[1] << 2);798 return cx18_set_filter_param(s);799 case CX2341X_ENC_SET_DNR_FILTER_PROPS:800 cx->spatial_strength = data[0];801 cx->temporal_strength = data[1];802 return cx18_set_filter_param(s);803 case CX2341X_ENC_SET_SPATIAL_FILTER_TYPE:804 return cx18_vapi(cx, CX18_CPU_SET_SPATIAL_FILTER_TYPE, 3,805 s->handle, data[0], data[1]);806 case CX2341X_ENC_SET_CORING_LEVELS:807 return cx18_vapi(cx, CX18_CPU_SET_MEDIAN_CORING, 5,808 s->handle, data[0], data[1], data[2], data[3]);809 }810 CX18_WARN("Unknown cmd %x\n", cmd);811 return 0;812}813 814int cx18_vapi_result(struct cx18 *cx, u32 data[MAX_MB_ARGUMENTS],815 u32 cmd, int args, ...)816{817 va_list ap;818 int i;819 820 va_start(ap, args);821 for (i = 0; i < args; i++)822 data[i] = va_arg(ap, u32);823 va_end(ap);824 return cx18_api(cx, cmd, args, data);825}826 827int cx18_vapi(struct cx18 *cx, u32 cmd, int args, ...)828{829 u32 data[MAX_MB_ARGUMENTS];830 va_list ap;831 int i;832 833 if (cx == NULL) {834 pr_err("cx == NULL (cmd=%x)\n", cmd);835 return 0;836 }837 if (args > MAX_MB_ARGUMENTS) {838 CX18_ERR("args too big (cmd=%x)\n", cmd);839 args = MAX_MB_ARGUMENTS;840 }841 va_start(ap, args);842 for (i = 0; i < args; i++)843 data[i] = va_arg(ap, u32);844 va_end(ap);845 return cx18_api(cx, cmd, args, data);846}847