371 lines · c
1// SPDX-License-Identifier: GPL-2.0-only2/*3 * Support for the camera device found on Marvell MMP processors; known4 * to work with the Armada 610 as used in the OLPC 1.75 system.5 *6 * Copyright 2011 Jonathan Corbet <corbet@lwn.net>7 * Copyright 2018 Lubomir Rintel <lkundrak@v3.sk>8 */9 10#include <linux/init.h>11#include <linux/kernel.h>12#include <linux/module.h>13#include <linux/interrupt.h>14#include <linux/spinlock.h>15#include <linux/slab.h>16#include <linux/videodev2.h>17#include <media/v4l2-device.h>18#include <linux/platform_data/media/mmp-camera.h>19#include <linux/device.h>20#include <linux/of.h>21#include <linux/of_platform.h>22#include <linux/platform_device.h>23#include <linux/pm_runtime.h>24#include <linux/io.h>25#include <linux/list.h>26#include <linux/pm.h>27#include <linux/clk.h>28 29#include "mcam-core.h"30 31MODULE_ALIAS("platform:mmp-camera");32MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>");33MODULE_DESCRIPTION("Support for the camera device found on Marvell MMP processors");34MODULE_LICENSE("GPL");35 36static char *mcam_clks[] = {"axi", "func", "phy"};37 38struct mmp_camera {39 struct platform_device *pdev;40 struct mcam_camera mcam;41 struct list_head devlist;42 struct clk *mipi_clk;43 int irq;44};45 46static inline struct mmp_camera *mcam_to_cam(struct mcam_camera *mcam)47{48 return container_of(mcam, struct mmp_camera, mcam);49}50 51/*52 * calc the dphy register values53 * There are three dphy registers being used.54 * dphy[0] - CSI2_DPHY355 * dphy[1] - CSI2_DPHY556 * dphy[2] - CSI2_DPHY657 * CSI2_DPHY3 and CSI2_DPHY6 can be set with a default value58 * or be calculated dynamically59 */60static void mmpcam_calc_dphy(struct mcam_camera *mcam)61{62 struct mmp_camera *cam = mcam_to_cam(mcam);63 struct mmp_camera_platform_data *pdata = cam->pdev->dev.platform_data;64 struct device *dev = &cam->pdev->dev;65 unsigned long tx_clk_esc;66 67 /*68 * If CSI2_DPHY3 is calculated dynamically,69 * pdata->lane_clk should be already set70 * either in the board driver statically71 * or in the sensor driver dynamically.72 */73 /*74 * dphy[0] - CSI2_DPHY3:75 * bit 0 ~ bit 7: HS Term Enable.76 * defines the time that the DPHY77 * wait before enabling the data78 * lane termination after detecting79 * that the sensor has driven the data80 * lanes to the LP00 bridge state.81 * The value is calculated by:82 * (Max T(D_TERM_EN)/Period(DDR)) - 183 * bit 8 ~ bit 15: HS_SETTLE84 * Time interval during which the HS85 * receiver shall ignore any Data Lane86 * HS transitions.87 * The value has been calibrated on88 * different boards. It seems to work well.89 *90 * More detail please refer91 * MIPI Alliance Spectification for D-PHY92 * document for explanation of HS-SETTLE93 * and D-TERM-EN.94 */95 switch (pdata->dphy3_algo) {96 case DPHY3_ALGO_PXA910:97 /*98 * Calculate CSI2_DPHY3 algo for PXA91099 */100 pdata->dphy[0] =101 (((1 + (pdata->lane_clk * 80) / 1000) & 0xff) << 8)102 | (1 + pdata->lane_clk * 35 / 1000);103 break;104 case DPHY3_ALGO_PXA2128:105 /*106 * Calculate CSI2_DPHY3 algo for PXA2128107 */108 pdata->dphy[0] =109 (((2 + (pdata->lane_clk * 110) / 1000) & 0xff) << 8)110 | (1 + pdata->lane_clk * 35 / 1000);111 break;112 default:113 /*114 * Use default CSI2_DPHY3 value for PXA688/PXA988115 */116 dev_dbg(dev, "camera: use the default CSI2_DPHY3 value\n");117 }118 119 /*120 * mipi_clk will never be changed, it is a fixed value on MMP121 */122 if (IS_ERR(cam->mipi_clk))123 return;124 125 /* get the escape clk, this is hard coded */126 clk_prepare_enable(cam->mipi_clk);127 tx_clk_esc = (clk_get_rate(cam->mipi_clk) / 1000000) / 12;128 clk_disable_unprepare(cam->mipi_clk);129 /*130 * dphy[2] - CSI2_DPHY6:131 * bit 0 ~ bit 7: CK Term Enable132 * Time for the Clock Lane receiver to enable the HS line133 * termination. The value is calculated similarly with134 * HS Term Enable135 * bit 8 ~ bit 15: CK Settle136 * Time interval during which the HS receiver shall ignore137 * any Clock Lane HS transitions.138 * The value is calibrated on the boards.139 */140 pdata->dphy[2] =141 ((((534 * tx_clk_esc) / 2000 - 1) & 0xff) << 8)142 | (((38 * tx_clk_esc) / 1000 - 1) & 0xff);143 144 dev_dbg(dev, "camera: DPHY sets: dphy3=0x%x, dphy5=0x%x, dphy6=0x%x\n",145 pdata->dphy[0], pdata->dphy[1], pdata->dphy[2]);146}147 148static irqreturn_t mmpcam_irq(int irq, void *data)149{150 struct mcam_camera *mcam = data;151 unsigned int irqs, handled;152 153 spin_lock(&mcam->dev_lock);154 irqs = mcam_reg_read(mcam, REG_IRQSTAT);155 handled = mccic_irq(mcam, irqs);156 spin_unlock(&mcam->dev_lock);157 return IRQ_RETVAL(handled);158}159 160static void mcam_init_clk(struct mcam_camera *mcam)161{162 unsigned int i;163 164 for (i = 0; i < NR_MCAM_CLK; i++) {165 if (mcam_clks[i] != NULL) {166 /* Some clks are not necessary on some boards167 * We still try to run even it fails getting clk168 */169 mcam->clk[i] = devm_clk_get(mcam->dev, mcam_clks[i]);170 if (IS_ERR(mcam->clk[i]))171 dev_warn(mcam->dev, "Could not get clk: %s\n",172 mcam_clks[i]);173 }174 }175}176 177static int mmpcam_probe(struct platform_device *pdev)178{179 struct mmp_camera *cam;180 struct mcam_camera *mcam;181 struct resource *res;182 struct fwnode_handle *ep;183 struct mmp_camera_platform_data *pdata;184 struct v4l2_async_connection *asd;185 int ret;186 187 cam = devm_kzalloc(&pdev->dev, sizeof(*cam), GFP_KERNEL);188 if (cam == NULL)189 return -ENOMEM;190 platform_set_drvdata(pdev, cam);191 cam->pdev = pdev;192 INIT_LIST_HEAD(&cam->devlist);193 194 mcam = &cam->mcam;195 mcam->calc_dphy = mmpcam_calc_dphy;196 mcam->dev = &pdev->dev;197 pdata = pdev->dev.platform_data;198 if (pdata) {199 mcam->mclk_src = pdata->mclk_src;200 mcam->mclk_div = pdata->mclk_div;201 mcam->bus_type = pdata->bus_type;202 mcam->dphy = pdata->dphy;203 mcam->lane = pdata->lane;204 } else {205 /*206 * These are values that used to be hardcoded in mcam-core and207 * work well on a OLPC XO 1.75 with a parallel bus sensor.208 * If it turns out other setups make sense, the values should209 * be obtained from the device tree.210 */211 mcam->mclk_src = 3;212 mcam->mclk_div = 2;213 }214 if (mcam->bus_type == V4L2_MBUS_CSI2_DPHY) {215 cam->mipi_clk = devm_clk_get(mcam->dev, "mipi");216 if ((IS_ERR(cam->mipi_clk) && mcam->dphy[2] == 0))217 return PTR_ERR(cam->mipi_clk);218 }219 mcam->mipi_enabled = false;220 mcam->chip_id = MCAM_ARMADA610;221 mcam->buffer_mode = B_DMA_sg;222 strscpy(mcam->bus_info, "platform:mmp-camera", sizeof(mcam->bus_info));223 spin_lock_init(&mcam->dev_lock);224 /*225 * Get our I/O memory.226 */227 mcam->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);228 if (IS_ERR(mcam->regs))229 return PTR_ERR(mcam->regs);230 mcam->regs_size = resource_size(res);231 232 mcam_init_clk(mcam);233 234 /*235 * Create a match of the sensor against its OF node.236 */237 ep = fwnode_graph_get_next_endpoint(of_fwnode_handle(pdev->dev.of_node),238 NULL);239 if (!ep)240 return -ENODEV;241 242 v4l2_async_nf_init(&mcam->notifier, &mcam->v4l2_dev);243 244 asd = v4l2_async_nf_add_fwnode_remote(&mcam->notifier, ep,245 struct v4l2_async_connection);246 fwnode_handle_put(ep);247 if (IS_ERR(asd)) {248 ret = PTR_ERR(asd);249 goto out;250 }251 252 /*253 * Register the device with the core.254 */255 ret = mccic_register(mcam);256 if (ret)257 goto out;258 259 /*260 * Add OF clock provider.261 */262 ret = of_clk_add_provider(pdev->dev.of_node, of_clk_src_simple_get,263 mcam->mclk);264 if (ret) {265 dev_err(&pdev->dev, "can't add DT clock provider\n");266 goto out;267 }268 269 /*270 * Finally, set up our IRQ now that the core is ready to271 * deal with it.272 */273 ret = platform_get_irq(pdev, 0);274 if (ret < 0)275 goto out;276 cam->irq = ret;277 ret = devm_request_irq(&pdev->dev, cam->irq, mmpcam_irq, IRQF_SHARED,278 "mmp-camera", mcam);279 if (ret)280 goto out;281 282 pm_runtime_enable(&pdev->dev);283 return 0;284out:285 mccic_shutdown(mcam);286 287 return ret;288}289 290static void mmpcam_remove(struct platform_device *pdev)291{292 struct mmp_camera *cam = platform_get_drvdata(pdev);293 struct mcam_camera *mcam = &cam->mcam;294 295 mccic_shutdown(mcam);296 pm_runtime_force_suspend(mcam->dev);297}298 299/*300 * Suspend/resume support.301 */302 303static int __maybe_unused mmpcam_runtime_resume(struct device *dev)304{305 struct mmp_camera *cam = dev_get_drvdata(dev);306 struct mcam_camera *mcam = &cam->mcam;307 unsigned int i;308 309 for (i = 0; i < NR_MCAM_CLK; i++) {310 if (!IS_ERR(mcam->clk[i]))311 clk_prepare_enable(mcam->clk[i]);312 }313 314 return 0;315}316 317static int __maybe_unused mmpcam_runtime_suspend(struct device *dev)318{319 struct mmp_camera *cam = dev_get_drvdata(dev);320 struct mcam_camera *mcam = &cam->mcam;321 int i;322 323 for (i = NR_MCAM_CLK - 1; i >= 0; i--) {324 if (!IS_ERR(mcam->clk[i]))325 clk_disable_unprepare(mcam->clk[i]);326 }327 328 return 0;329}330 331static int __maybe_unused mmpcam_suspend(struct device *dev)332{333 struct mmp_camera *cam = dev_get_drvdata(dev);334 335 if (!pm_runtime_suspended(dev))336 mccic_suspend(&cam->mcam);337 return 0;338}339 340static int __maybe_unused mmpcam_resume(struct device *dev)341{342 struct mmp_camera *cam = dev_get_drvdata(dev);343 344 if (!pm_runtime_suspended(dev))345 return mccic_resume(&cam->mcam);346 return 0;347}348 349static const struct dev_pm_ops mmpcam_pm_ops = {350 SET_RUNTIME_PM_OPS(mmpcam_runtime_suspend, mmpcam_runtime_resume, NULL)351 SET_SYSTEM_SLEEP_PM_OPS(mmpcam_suspend, mmpcam_resume)352};353 354static const struct of_device_id mmpcam_of_match[] = {355 { .compatible = "marvell,mmp2-ccic", },356 {},357};358MODULE_DEVICE_TABLE(of, mmpcam_of_match);359 360static struct platform_driver mmpcam_driver = {361 .probe = mmpcam_probe,362 .remove_new = mmpcam_remove,363 .driver = {364 .name = "mmp-camera",365 .of_match_table = mmpcam_of_match,366 .pm = &mmpcam_pm_ops,367 }368};369 370module_platform_driver(mmpcam_driver);371