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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Copyright (c) 2016 MediaTek Inc.4 * Author: Ming Hsiu Tsai <minghsiu.tsai@mediatek.com>5 * Rick Chang <rick.chang@mediatek.com>6 */7 8#ifndef _MTK_JPEG_REG_H9#define _MTK_JPEG_REG_H10 11#define MTK_JPEG_BLOCK_MAX 1012#define MTK_JPEG_DCTSIZE 813 14#define BIT_INQST_MASK_ERROR_BS 0x2015#define BIT_INQST_MASK_PAUSE 0x1016#define BIT_INQST_MASK_OVERFLOW 0x0417#define BIT_INQST_MASK_UNDERFLOW 0x0218#define BIT_INQST_MASK_EOF 0x0119#define BIT_INQST_MASK_ALLIRQ 0x3720 21#define JPGDEC_REG_RESET 0x009022#define JPGDEC_REG_BRZ_FACTOR 0x00f823#define JPGDEC_REG_DU_NUM 0x00fc24#define JPGDEC_REG_DEST_ADDR0_Y 0x014025#define JPGDEC_REG_DEST_ADDR0_U 0x014426#define JPGDEC_REG_DEST_ADDR0_V 0x014827#define JPGDEC_REG_DEST_ADDR1_Y 0x014c28#define JPGDEC_REG_DEST_ADDR1_U 0x015029#define JPGDEC_REG_DEST_ADDR1_V 0x015430#define JPGDEC_REG_STRIDE_Y 0x015831#define JPGDEC_REG_STRIDE_UV 0x015c32#define JPGDEC_REG_IMG_STRIDE_Y 0x016033#define JPGDEC_REG_IMG_STRIDE_UV 0x016434#define JPGDEC_REG_WDMA_CTRL 0x016c35#define JPGDEC_REG_PAUSE_MCU_NUM 0x017036#define JPGDEC_REG_OPERATION_MODE 0x017c37#define JPGDEC_REG_FILE_ADDR 0x020038#define JPGDEC_REG_COMP_ID 0x020c39#define JPGDEC_REG_TOTAL_MCU_NUM 0x021040#define JPGDEC_REG_COMP0_DATA_UNIT_NUM 0x022441#define JPGDEC_REG_DU_CTRL 0x023c42#define JPGDEC_REG_TRIG 0x024043#define JPGDEC_REG_FILE_BRP 0x024844#define JPGDEC_REG_FILE_TOTAL_SIZE 0x024c45#define JPGDEC_REG_QT_ID 0x027046#define JPGDEC_REG_INTERRUPT_STATUS 0x027447#define JPGDEC_REG_STATUS 0x027848#define JPGDEC_REG_BIT_STREAM_SIZE 0x034449 50#endif /* _MTK_JPEG_REG_H */51