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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.4 * Copyright (C) 2017 Linaro Ltd.5 */6 7#ifndef __VENUS_CORE_H_8#define __VENUS_CORE_H_9 10#include <linux/bitops.h>11#include <linux/list.h>12#include <media/videobuf2-v4l2.h>13#include <media/v4l2-ctrls.h>14#include <media/v4l2-device.h>15 16#include "dbgfs.h"17#include "hfi.h"18#include "hfi_platform.h"19#include "hfi_helper.h"20 21#define VDBGL	"VenusLow : "22#define VDBGM	"VenusMed : "23#define VDBGH	"VenusHigh: "24#define VDBGFW	"VenusFW  : "25 26#define VIDC_CLKS_NUM_MAX		427#define VIDC_VCODEC_CLKS_NUM_MAX	228#define VIDC_RESETS_NUM_MAX		229 30extern int venus_fw_debug;31 32struct freq_tbl {33	unsigned int load;34	unsigned long freq;35};36 37struct reg_val {38	u32 reg;39	u32 value;40};41 42struct bw_tbl {43	u32 mbs_per_sec;44	u32 avg;45	u32 peak;46	u32 avg_10bit;47	u32 peak_10bit;48};49 50enum vpu_version {51	VPU_VERSION_AR50,52	VPU_VERSION_AR50_LITE,53	VPU_VERSION_IRIS1,54	VPU_VERSION_IRIS2,55	VPU_VERSION_IRIS2_1,56};57 58struct venus_resources {59	u64 dma_mask;60	const struct freq_tbl *freq_tbl;61	unsigned int freq_tbl_size;62	const struct bw_tbl *bw_tbl_enc;63	unsigned int bw_tbl_enc_size;64	const struct bw_tbl *bw_tbl_dec;65	unsigned int bw_tbl_dec_size;66	const struct reg_val *reg_tbl;67	unsigned int reg_tbl_size;68	const struct hfi_ubwc_config *ubwc_conf;69	const char * const clks[VIDC_CLKS_NUM_MAX];70	unsigned int clks_num;71	const char * const vcodec0_clks[VIDC_VCODEC_CLKS_NUM_MAX];72	const char * const vcodec1_clks[VIDC_VCODEC_CLKS_NUM_MAX];73	unsigned int vcodec_clks_num;74	const char **vcodec_pmdomains;75	unsigned int vcodec_pmdomains_num;76	const char **opp_pmdomain;77	unsigned int vcodec_num;78	const char * const resets[VIDC_RESETS_NUM_MAX];79	unsigned int resets_num;80	enum hfi_version hfi_version;81	enum vpu_version vpu_version;82	u8 num_vpp_pipes;83	u32 max_load;84	unsigned int vmem_id;85	u32 vmem_size;86	u32 vmem_addr;87	u32 cp_start;88	u32 cp_size;89	u32 cp_nonpixel_start;90	u32 cp_nonpixel_size;91	const char *fwname;92};93 94enum venus_fmt {95	VENUS_FMT_NV12			= 0,96	VENUS_FMT_QC08C			= 1,97	VENUS_FMT_QC10C			= 2,98	VENUS_FMT_P010			= 3,99	VENUS_FMT_H264			= 4,100	VENUS_FMT_VP8			= 5,101	VENUS_FMT_VP9			= 6,102	VENUS_FMT_HEVC			= 7,103	VENUS_FMT_VC1_ANNEX_G		= 8,104	VENUS_FMT_VC1_ANNEX_L		= 9,105	VENUS_FMT_MPEG4			= 10,106	VENUS_FMT_MPEG2			= 11,107	VENUS_FMT_H263			= 12,108	VENUS_FMT_XVID			= 13,109};110 111struct venus_format {112	u32 pixfmt;113	unsigned int num_planes;114	u32 type;115	u32 flags;116};117 118/**119 * struct venus_core - holds core parameters valid for all instances120 *121 * @base:	IO memory base address122 * @vbif_base:	IO memory vbif base address123 * @cpu_base:	IO memory cpu base address124 * @cpu_cs_base:	IO memory cpu_cs base address125 * @cpu_ic_base:	IO memory cpu_ic base address126 * @wrapper_base:	IO memory wrapper base address127 * @wrapper_tz_base:	IO memory wrapper TZ base address128 * @aon_base:	AON base address129 * @irq:		Venus irq130 * @clks:	an array of struct clk pointers131 * @vcodec0_clks: an array of vcodec0 struct clk pointers132 * @vcodec1_clks: an array of vcodec1 struct clk pointers133 * @video_path: an interconnect handle to video to/from memory path134 * @cpucfg_path: an interconnect handle to cpu configuration path135 * @has_opp_table: does OPP table exist136 * @pmdomains:	a pointer to a list of pmdomains137 * @opp_dl_venus: an device-link for device OPP138 * @opp_pmdomain: an OPP power-domain139 * @resets: an array of reset signals140 * @vdev_dec:	a reference to video device structure for decoder instances141 * @vdev_enc:	a reference to video device structure for encoder instances142 * @v4l2_dev:	a holder for v4l2 device structure143 * @res:		a reference to venus resources structure144 * @dev:		convenience struct device pointer145 * @dev_dec:	convenience struct device pointer for decoder device146 * @dev_enc:	convenience struct device pointer for encoder device147 * @use_tz:	a flag that suggests presence of trustzone148 * @fw:		structure of firmware parameters149 * @lock:	a lock for this strucure150 * @instances:	a list_head of all instances151 * @insts_count:	num of instances152 * @state:	the state of the venus core153 * @done:	a completion for sync HFI operations154 * @error:	an error returned during last HFI sync operations155 * @sys_error:	an error flag that signal system error event156 * @sys_err_done: a waitqueue to wait for system error recovery end157 * @core_ops:	the core operations158 * @pm_ops:	a pointer to pm operations159 * @pm_lock:	a lock for PM operations160 * @enc_codecs:	encoders supported by this core161 * @dec_codecs:	decoders supported by this core162 * @max_sessions_supported:	holds the maximum number of sessions163 * @priv:	a private filed for HFI operations164 * @ops:		the core HFI operations165 * @work:	a delayed work for handling system fatal error166 * @caps:	an array of supported HFI capabilities167 * @codecs_count: platform codecs count168 * @core0_usage_count: usage counter for core0169 * @core1_usage_count: usage counter for core1170 * @root:	debugfs root directory171 * @venus_ver:	the venus firmware version172 * @dump_core:	a flag indicating that a core dump is required173 */174struct venus_core {175	void __iomem *base;176	void __iomem *vbif_base;177	void __iomem *cpu_base;178	void __iomem *cpu_cs_base;179	void __iomem *cpu_ic_base;180	void __iomem *wrapper_base;181	void __iomem *wrapper_tz_base;182	void __iomem *aon_base;183	int irq;184	struct clk *clks[VIDC_CLKS_NUM_MAX];185	struct clk *vcodec0_clks[VIDC_VCODEC_CLKS_NUM_MAX];186	struct clk *vcodec1_clks[VIDC_VCODEC_CLKS_NUM_MAX];187	struct icc_path *video_path;188	struct icc_path *cpucfg_path;189	bool has_opp_table;190	struct dev_pm_domain_list *pmdomains;191	struct device_link *opp_dl_venus;192	struct device *opp_pmdomain;193	struct reset_control *resets[VIDC_RESETS_NUM_MAX];194	struct video_device *vdev_dec;195	struct video_device *vdev_enc;196	struct v4l2_device v4l2_dev;197	const struct venus_resources *res;198	struct device *dev;199	struct device *dev_dec;200	struct device *dev_enc;201	unsigned int use_tz;202	struct video_firmware {203		struct device *dev;204		struct iommu_domain *iommu_domain;205		size_t mapped_mem_size;206		phys_addr_t mem_phys;207		size_t mem_size;208	} fw;209	struct mutex lock;210	struct list_head instances;211	atomic_t insts_count;212	unsigned int state;213	struct completion done;214	unsigned int error;215	unsigned long sys_error;216	wait_queue_head_t sys_err_done;217	const struct hfi_core_ops *core_ops;218	const struct venus_pm_ops *pm_ops;219	struct mutex pm_lock;220	unsigned long enc_codecs;221	unsigned long dec_codecs;222	unsigned int max_sessions_supported;223	void *priv;224	const struct hfi_ops *ops;225	struct delayed_work work;226	struct hfi_plat_caps caps[MAX_CODEC_NUM];227	unsigned int codecs_count;228	unsigned int core0_usage_count;229	unsigned int core1_usage_count;230	struct dentry *root;231	struct venus_img_version {232		u32 major;233		u32 minor;234		u32 rev;235	} venus_ver;236	unsigned long dump_core;237};238 239struct vdec_controls {240	u32 post_loop_deb_mode;241	u32 profile;242	u32 level;243	u32 display_delay;244	u32 display_delay_enable;245	u64 conceal_color;246};247 248struct venc_controls {249	u16 gop_size;250	u32 num_p_frames;251	u32 num_b_frames;252	u32 bitrate_mode;253	u32 bitrate;254	u32 bitrate_peak;255	u32 rc_enable;256	u32 const_quality;257	u32 frame_skip_mode;258 259	u32 h264_i_period;260	u32 h264_entropy_mode;261	u32 h264_i_qp;262	u32 h264_p_qp;263	u32 h264_b_qp;264	u32 h264_min_qp;265	u32 h264_max_qp;266	u32 h264_i_min_qp;267	u32 h264_i_max_qp;268	u32 h264_p_min_qp;269	u32 h264_p_max_qp;270	u32 h264_b_min_qp;271	u32 h264_b_max_qp;272	u32 h264_loop_filter_mode;273	s32 h264_loop_filter_alpha;274	s32 h264_loop_filter_beta;275	u32 h264_8x8_transform;276 277	u32 hevc_i_qp;278	u32 hevc_p_qp;279	u32 hevc_b_qp;280	u32 hevc_min_qp;281	u32 hevc_max_qp;282	u32 hevc_i_min_qp;283	u32 hevc_i_max_qp;284	u32 hevc_p_min_qp;285	u32 hevc_p_max_qp;286	u32 hevc_b_min_qp;287	u32 hevc_b_max_qp;288 289	u32 vp8_min_qp;290	u32 vp8_max_qp;291 292	u32 multi_slice_mode;293	u32 multi_slice_max_bytes;294	u32 multi_slice_max_mb;295 296	u32 header_mode;297	bool aud_enable;298	u32 intra_refresh_type;299	u32 intra_refresh_period;300 301	struct {302		u32 h264;303		u32 mpeg4;304		u32 hevc;305		u32 vp8;306		u32 vp9;307	} profile;308	struct {309		u32 h264;310		u32 mpeg4;311		u32 hevc;312		u32 vp9;313	} level;314 315	u32 base_priority_id;316	u32 ltr_count;317	struct v4l2_ctrl_hdr10_cll_info cll;318	struct v4l2_ctrl_hdr10_mastering_display mastering;319};320 321struct venus_buffer {322	struct vb2_v4l2_buffer vb;323	struct list_head list;324	dma_addr_t dma_addr;325	u32 size;326	struct list_head reg_list;327	u32 flags;328	struct list_head ref_list;329};330 331struct clock_data {332	u32 core_id;333	unsigned long freq;334	unsigned long vpp_freq;335	unsigned long vsp_freq;336	unsigned long low_power_freq;337};338 339#define to_venus_buffer(ptr)	container_of(ptr, struct venus_buffer, vb)340 341enum venus_dec_state {342	VENUS_DEC_STATE_DEINIT		= 0,343	VENUS_DEC_STATE_INIT		= 1,344	VENUS_DEC_STATE_CAPTURE_SETUP	= 2,345	VENUS_DEC_STATE_STOPPED		= 3,346	VENUS_DEC_STATE_SEEK		= 4,347	VENUS_DEC_STATE_DRAIN		= 5,348	VENUS_DEC_STATE_DECODING	= 6,349	VENUS_DEC_STATE_DRC		= 7,350};351 352enum venus_enc_state {353	VENUS_ENC_STATE_DEINIT		= 0,354	VENUS_ENC_STATE_INIT		= 1,355	VENUS_ENC_STATE_ENCODING	= 2,356	VENUS_ENC_STATE_STOPPED		= 3,357	VENUS_ENC_STATE_DRAIN		= 4,358};359 360struct venus_ts_metadata {361	bool used;362	u64 ts_ns;363	u64 ts_us;364	u32 flags;365	struct v4l2_timecode tc;366};367 368enum venus_inst_modes {369	VENUS_LOW_POWER = BIT(0),370};371 372/**373 * struct venus_inst - holds per instance parameters374 *375 * @list:	used for attach an instance to the core376 * @lock:	instance lock377 * @core:	a reference to the core struct378 * @clk_data:	clock data per core ID379 * @dpbbufs:	a list of decoded picture buffers380 * @internalbufs:	a list of internal bufferes381 * @registeredbufs:	a list of registered capture bufferes382 * @delayed_process:	a list of delayed buffers383 * @delayed_process_work:	a work_struct for process delayed buffers384 * @nonblock:		nonblocking flag385 * @ctrl_handler:	v4l control handler386 * @controls:	a union of decoder and encoder control parameters387 * @fh:	 a holder of v4l file handle structure388 * @streamon_cap: stream on flag for capture queue389 * @streamon_out: stream on flag for output queue390 * @width:	current capture width391 * @height:	current capture height392 * @crop:	current crop rectangle393 * @fw_min_cnt:	 firmware minimum buffer count394 * @out_width:	current output width395 * @out_height:	current output height396 * @colorspace:	current color space397 * @ycbcr_enc:	current YCbCr encoding398 * @quantization:	current quantization399 * @xfer_func:	current xfer function400 * @codec_state:	current decoder API state (see DEC_STATE_)401 * @enc_state:		current encoder API state (see ENC_STATE_)402 * @reconf_wait:	wait queue for resolution change event403 * @subscriptions:	used to hold current events subscriptions404 * @buf_count:		used to count number of buffers (reqbuf(0))405 * @tss:		timestamp metadata406 * @payloads:		cache plane payload to use it for clock/BW scaling407 * @fps:		holds current FPS408 * @timeperframe:	holds current time per frame structure409 * @fmt_out:	a reference to output format structure410 * @fmt_cap:	a reference to capture format structure411 * @num_input_bufs:	holds number of input buffers412 * @num_output_bufs:	holds number of output buffers413 * @input_buf_size:	holds input buffer size414 * @output_buf_size:	holds output buffer size415 * @output2_buf_size:	holds secondary decoder output buffer size416 * @dpb_buftype:	decoded picture buffer type417 * @dpb_fmt:		decoded picture buffer raw format418 * @opb_buftype:	output picture buffer type419 * @opb_fmt:		output picture buffer raw format420 * @reconfig:	a flag raised by decoder when the stream resolution changed421 * @hfi_codec:		current codec for this instance in HFI space422 * @sequence_cap:	a sequence counter for capture queue423 * @sequence_out:	a sequence counter for output queue424 * @m2m_dev:	a reference to m2m device structure425 * @m2m_ctx:	a reference to m2m context structure426 * @ctx_q_lock:	a lock to serialize video device ioctl calls427 * @state:	current state of the instance428 * @done:	a completion for sync HFI operation429 * @error:	an error returned during last HFI sync operation430 * @session_error:	a flag rised by HFI interface in case of session error431 * @ops:		HFI operations432 * @session_type:	the type of the session (decoder or encoder)433 * @hprop:	a union used as a holder by get property434 * @core_acquired:	the Core has been acquired435 * @bit_depth:		current bitstream bit-depth436 * @pic_struct:		bitstream progressive vs interlaced437 * @next_buf_last: a flag to mark next queued capture buffer as last438 * @drain_active:	Drain sequence is in progress439 * @flags:	bitmask flags describing current instance mode440 * @dpb_ids:	DPB buffer ID's441 */442struct venus_inst {443	struct list_head list;444	struct mutex lock;445	struct venus_core *core;446	struct clock_data clk_data;447	struct list_head dpbbufs;448	struct list_head internalbufs;449	struct list_head registeredbufs;450	struct list_head delayed_process;451	struct work_struct delayed_process_work;452	bool nonblock;453 454	struct v4l2_ctrl_handler ctrl_handler;455	union {456		struct vdec_controls dec;457		struct venc_controls enc;458	} controls;459	struct v4l2_fh fh;460	unsigned int streamon_cap, streamon_out;461	u32 width;462	u32 height;463	struct v4l2_rect crop;464	u32 fw_min_cnt;465	u32 out_width;466	u32 out_height;467	u32 colorspace;468	u8 ycbcr_enc;469	u8 quantization;470	u8 xfer_func;471	enum venus_dec_state codec_state;472	enum venus_enc_state enc_state;473	wait_queue_head_t reconf_wait;474	unsigned int subscriptions;475	int buf_count;476	struct venus_ts_metadata tss[VIDEO_MAX_FRAME];477	unsigned long payloads[VIDEO_MAX_FRAME];478	u64 fps;479	struct v4l2_fract timeperframe;480	const struct venus_format *fmt_out;481	const struct venus_format *fmt_cap;482	unsigned int num_input_bufs;483	unsigned int num_output_bufs;484	unsigned int input_buf_size;485	unsigned int output_buf_size;486	unsigned int output2_buf_size;487	u32 dpb_buftype;488	u32 dpb_fmt;489	u32 opb_buftype;490	u32 opb_fmt;491	bool reconfig;492	u32 hfi_codec;493	u32 sequence_cap;494	u32 sequence_out;495	struct v4l2_m2m_dev *m2m_dev;496	struct v4l2_m2m_ctx *m2m_ctx;497	struct mutex ctx_q_lock;498	unsigned int state;499	struct completion done;500	unsigned int error;501	bool session_error;502	const struct hfi_inst_ops *ops;503	u32 session_type;504	union hfi_get_property hprop;505	unsigned int core_acquired: 1;506	unsigned int bit_depth;507	unsigned int pic_struct;508	bool next_buf_last;509	bool drain_active;510	enum venus_inst_modes flags;511	struct ida dpb_ids;512};513 514#define IS_V1(core)	((core)->res->hfi_version == HFI_VERSION_1XX)515#define IS_V3(core)	((core)->res->hfi_version == HFI_VERSION_3XX)516#define IS_V4(core)	((core)->res->hfi_version == HFI_VERSION_4XX)517#define IS_V6(core)	((core)->res->hfi_version == HFI_VERSION_6XX)518 519#define IS_AR50(core)		((core)->res->vpu_version == VPU_VERSION_AR50)520#define IS_AR50_LITE(core)	((core)->res->vpu_version == VPU_VERSION_AR50_LITE)521#define IS_IRIS1(core)		((core)->res->vpu_version == VPU_VERSION_IRIS1)522#define IS_IRIS2(core)		((core)->res->vpu_version == VPU_VERSION_IRIS2)523#define IS_IRIS2_1(core)	((core)->res->vpu_version == VPU_VERSION_IRIS2_1)524 525#define ctrl_to_inst(ctrl)	\526	container_of((ctrl)->handler, struct venus_inst, ctrl_handler)527 528static inline struct venus_inst *to_inst(struct file *filp)529{530	return container_of(filp->private_data, struct venus_inst, fh);531}532 533static inline void *to_hfi_priv(struct venus_core *core)534{535	return core->priv;536}537 538static inline struct hfi_plat_caps *539venus_caps_by_codec(struct venus_core *core, u32 codec, u32 domain)540{541	unsigned int c;542 543	for (c = 0; c < core->codecs_count; c++) {544		if (core->caps[c].codec == codec &&545		    core->caps[c].domain == domain)546			return &core->caps[c];547	}548 549	return NULL;550}551 552static inline bool553is_fw_rev_or_newer(struct venus_core *core, u32 vmajor, u32 vminor, u32 vrev)554{555	return ((core)->venus_ver.major == vmajor &&556		(core)->venus_ver.minor == vminor &&557		(core)->venus_ver.rev >= vrev);558}559 560static inline bool561is_fw_rev_or_older(struct venus_core *core, u32 vmajor, u32 vminor, u32 vrev)562{563	return ((core)->venus_ver.major == vmajor &&564		(core)->venus_ver.minor == vminor &&565		(core)->venus_ver.rev <= vrev);566}567#endif568