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1/* SPDX-License-Identifier: GPL-2.0-or-later */2/*3 *  Driver for Freescale MC44S803 Low Power CMOS Broadband Tuner4 *5 *  Copyright (c) 2009 Jochen Friedrich <jochen@scram.de>6 */7 8#ifndef MC44S803_PRIV_H9#define MC44S803_PRIV_H10 11/* This driver is based on the information available in the datasheet12   http://www.freescale.com/files/rf_if/doc/data_sheet/MC44S803.pdf13 14   SPI or I2C Address : 0xc0-0xc615 16   Reg.No | Function17   -------------------------------------------18       00 | Power Down19       01 | Reference Oszillator20       02 | Reference Dividers21       03 | Mixer and Reference Buffer22       04 | Reset/Serial Out23       05 | LO 124       06 | LO 225       07 | Circuit Adjust26       08 | Test27       09 | Digital Tune28       0A | LNA AGC29       0B | Data Register Address30       0C | Regulator Test31       0D | VCO Test32       0E | LNA Gain/Input Power33       0F | ID Bits34 35*/36 37#define MC44S803_OSC 26000000	/* 26 MHz */38#define MC44S803_IF1 1086000000 /* 1086 MHz */39#define MC44S803_IF2 36125000	/* 36.125 MHz */40 41#define MC44S803_REG_POWER	042#define MC44S803_REG_REFOSC	143#define MC44S803_REG_REFDIV	244#define MC44S803_REG_MIXER	345#define MC44S803_REG_RESET	446#define MC44S803_REG_LO1	547#define MC44S803_REG_LO2	648#define MC44S803_REG_CIRCADJ	749#define MC44S803_REG_TEST	850#define MC44S803_REG_DIGTUNE	951#define MC44S803_REG_LNAAGC	0x0A52#define MC44S803_REG_DATAREG	0x0B53#define MC44S803_REG_REGTEST	0x0C54#define MC44S803_REG_VCOTEST	0x0D55#define MC44S803_REG_LNAGAIN	0x0E56#define MC44S803_REG_ID		0x0F57 58/* Register definitions */59#define MC44S803_ADDR		0x0F60#define MC44S803_ADDR_S		061/* REG_POWER */62#define MC44S803_POWER		0xFFFFF063#define MC44S803_POWER_S	464/* REG_REFOSC */65#define MC44S803_REFOSC		0x1FF066#define MC44S803_REFOSC_S	467#define MC44S803_OSCSEL		0x200068#define MC44S803_OSCSEL_S	1369/* REG_REFDIV */70#define MC44S803_R2		0x1FF071#define MC44S803_R2_S		472#define MC44S803_REFBUF_EN	0x200073#define MC44S803_REFBUF_EN_S	1374#define MC44S803_R1		0x7C00075#define MC44S803_R1_S		1476/* REG_MIXER */77#define MC44S803_R3		0x7078#define MC44S803_R3_S		479#define MC44S803_MUX3		0x8080#define MC44S803_MUX3_S		781#define MC44S803_MUX4		0x10082#define MC44S803_MUX4_S		883#define MC44S803_OSC_SCR	0x20084#define MC44S803_OSC_SCR_S	985#define MC44S803_TRI_STATE	0x40086#define MC44S803_TRI_STATE_S	1087#define MC44S803_BUF_GAIN	0x80088#define MC44S803_BUF_GAIN_S	1189#define MC44S803_BUF_IO		0x100090#define MC44S803_BUF_IO_S	1291#define MC44S803_MIXER_RES	0xFE00092#define MC44S803_MIXER_RES_S	1393/* REG_RESET */94#define MC44S803_RS		0x1095#define MC44S803_RS_S		496#define MC44S803_SO		0x2097#define MC44S803_SO_S		598/* REG_LO1 */99#define MC44S803_LO1		0xFFF0100#define MC44S803_LO1_S		4101/* REG_LO2 */102#define MC44S803_LO2		0x7FFF0103#define MC44S803_LO2_S		4104/* REG_CIRCADJ */105#define MC44S803_G1		0x20106#define MC44S803_G1_S		5107#define MC44S803_G3		0x80108#define MC44S803_G3_S		7109#define MC44S803_CIRCADJ_RES	0x300110#define MC44S803_CIRCADJ_RES_S	8111#define MC44S803_G6		0x400112#define MC44S803_G6_S		10113#define MC44S803_G7		0x800114#define MC44S803_G7_S		11115#define MC44S803_S1		0x1000116#define MC44S803_S1_S		12117#define MC44S803_LP		0x7E000118#define MC44S803_LP_S		13119#define MC44S803_CLRF		0x80000120#define MC44S803_CLRF_S		19121#define MC44S803_CLIF		0x100000122#define MC44S803_CLIF_S		20123/* REG_TEST */124/* REG_DIGTUNE */125#define MC44S803_DA		0xF0126#define MC44S803_DA_S		4127#define MC44S803_XOD		0x300128#define MC44S803_XOD_S		8129#define MC44S803_RST		0x10000130#define MC44S803_RST_S		16131#define MC44S803_LO_REF		0x1FFF00132#define MC44S803_LO_REF_S	8133#define MC44S803_AT		0x200000134#define MC44S803_AT_S		21135#define MC44S803_MT		0x400000136#define MC44S803_MT_S		22137/* REG_LNAAGC */138#define MC44S803_G		0x3F0139#define MC44S803_G_S		4140#define MC44S803_AT1		0x400141#define MC44S803_AT1_S		10142#define MC44S803_AT2		0x800143#define MC44S803_AT2_S		11144#define MC44S803_HL_GR_EN	0x8000145#define MC44S803_HL_GR_EN_S	15146#define MC44S803_AGC_AN_DIG	0x10000147#define MC44S803_AGC_AN_DIG_S	16148#define MC44S803_ATTEN_EN	0x20000149#define MC44S803_ATTEN_EN_S	17150#define MC44S803_AGC_READ_EN	0x40000151#define MC44S803_AGC_READ_EN_S	18152#define MC44S803_LNA0		0x80000153#define MC44S803_LNA0_S		19154#define MC44S803_AGC_SEL	0x100000155#define MC44S803_AGC_SEL_S	20156#define MC44S803_AT0		0x200000157#define MC44S803_AT0_S		21158#define MC44S803_B		0xC00000159#define MC44S803_B_S		22160/* REG_DATAREG */161#define MC44S803_D		0xF0162#define MC44S803_D_S		4163/* REG_REGTEST */164/* REG_VCOTEST */165/* REG_LNAGAIN */166#define MC44S803_IF_PWR		0x700167#define MC44S803_IF_PWR_S	8168#define MC44S803_RF_PWR		0x3800169#define MC44S803_RF_PWR_S	11170#define MC44S803_LNA_GAIN	0xFC000171#define MC44S803_LNA_GAIN_S	14172/* REG_ID */173#define MC44S803_ID		0x3E00174#define MC44S803_ID_S		9175 176/* Some macros to read/write fields */177 178/* First shift, then mask */179#define MC44S803_REG_SM(_val, _reg)					\180	(((_val) << _reg##_S) & (_reg))181 182/* First mask, then shift */183#define MC44S803_REG_MS(_val, _reg)					\184	(((_val) & (_reg)) >> _reg##_S)185 186struct mc44s803_priv {187	struct mc44s803_config *cfg;188	struct i2c_adapter *i2c;189	struct dvb_frontend *fe;190 191	u32 frequency;192};193 194#endif195