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1/* SPDX-License-Identifier: GPL-2.0-or-later */2/*3 * NXP TDA18250BHN silicon tuner driver4 *5 * Copyright (C) 2017 Olli Salonen <olli.salonen@iki.fi>6 */7 8#ifndef TDA18250_PRIV_H9#define TDA18250_PRIV_H10 11#include "tda18250.h"12 13#define R00_ID1 0x00 /* ID byte 1 */14#define R01_ID2 0x01 /* ID byte 2 */15#define R02_ID3 0x02 /* ID byte 3 */16#define R03_THERMO1 0x03 /* Thermo byte 1 */17#define R04_THERMO2 0x04 /* Thermo byte 2 */18#define R05_POWER1 0x05 /* Power byte 1 */19#define R06_POWER2 0x06 /* Power byte 2 */20#define R07_GPIO 0x07 /* GPIO */21#define R08_IRQ1 0x08 /* IRQ */22#define R09_IRQ2 0x09 /* IRQ */23#define R0A_IRQ3 0x0a /* IRQ */24#define R0B_IRQ4 0x0b /* IRQ */25#define R0C_AGC11 0x0c /* AGC1 byte 1 */26#define R0D_AGC12 0x0d /* AGC1 byte 2 */27#define R0E_AGC13 0x0e /* AGC1 byte 3 */28#define R0F_AGC14 0x0f /* AGC1 byte 4 */29#define R10_LT1 0x10 /* LT byte 1 */30#define R11_LT2 0x11 /* LT byte 2 */31#define R12_AGC21 0x12 /* AGC2 byte 1 */32#define R13_AGC22 0x13 /* AGC2 byte 2 */33#define R14_AGC23 0x14 /* AGC2 byte 3 */34#define R15_AGC24 0x15 /* AGC2 byte 4 */35#define R16_AGC25 0x16 /* AGC2 byte 5 */36#define R17_AGC31 0x17 /* AGC3 byte 1 */37#define R18_AGC32 0x18 /* AGC3 byte 2 */38#define R19_AGC33 0x19 /* AGC3 byte 3 */39#define R1A_AGCK 0x1a40#define R1B_GAIN1 0x1b41#define R1C_GAIN2 0x1c42#define R1D_GAIN3 0x1d43#define R1E_WI_FI 0x1e /* Wireless Filter */44#define R1F_RF_BPF 0x1f /* RF Band Pass Filter */45#define R20_IR_MIX 0x20 /* IR Mixer */46#define R21_IF_AGC 0x2147#define R22_IF1 0x22 /* IF byte 1 */48#define R23_IF2 0x23 /* IF byte 2 */49#define R24_IF3 0x24 /* IF byte 3 */50#define R25_REF 0x25 /* reference byte */51#define R26_IF 0x26 /* IF frequency */52#define R27_RF1 0x27 /* RF frequency byte 1 */53#define R28_RF2 0x28 /* RF frequency byte 2 */54#define R29_RF3 0x29 /* RF frequency byte 3 */55#define R2A_MSM1 0x2a56#define R2B_MSM2 0x2b57#define R2C_PS1 0x2c /* power saving mode byte 1 */58#define R2D_PS2 0x2d /* power saving mode byte 2 */59#define R2E_PS3 0x2e /* power saving mode byte 3 */60#define R2F_RSSI1 0x2f61#define R30_RSSI2 0x3062#define R31_IRQ_CTRL 0x3163#define R32_DUMMY 0x3264#define R33_TEST 0x3365#define R34_MD1 0x3466#define R35_SD1 0x3567#define R36_SD2 0x3668#define R37_SD3 0x3769#define R38_SD4 0x3870#define R39_SD5 0x3971#define R3A_SD_TEST 0x3a72#define R3B_REGU 0x3b73#define R3C_RCCAL1 0x3c74#define R3D_RCCAL2 0x3d75#define R3E_IRCAL1 0x3e76#define R3F_IRCAL2 0x3f77#define R40_IRCAL3 0x4078#define R41_IRCAL4 0x4179#define R42_IRCAL5 0x4280#define R43_PD1 0x43 /* power down byte 1 */81#define R44_PD2 0x44 /* power down byte 2 */82#define R45_PD 0x45 /* power down */83#define R46_CPUMP 0x46 /* charge pump */84#define R47_LNAPOL 0x47 /* LNA polar casc */85#define R48_SMOOTH1 0x48 /* smooth test byte 1 */86#define R49_SMOOTH2 0x49 /* smooth test byte 2 */87#define R4A_SMOOTH3 0x4a /* smooth test byte 3 */88#define R4B_XTALOSC1 0x4b89#define R4C_XTALOSC2 0x4c90#define R4D_XTALFLX1 0x4d91#define R4E_XTALFLX2 0x4e92#define R4F_XTALFLX3 0x4f93#define R50_XTALFLX4 0x5094#define R51_XTALFLX5 0x5195#define R52_IRLOOP0 0x5296#define R53_IRLOOP1 0x5397#define R54_IRLOOP2 0x5498#define R55_IRLOOP3 0x5599#define R56_IRLOOP4 0x56100#define R57_PLL_LOG 0x57101#define R58_AGC2_UP1 0x58102#define R59_AGC2_UP2 0x59103#define R5A_H3H5 0x5a104#define R5B_AGC_AUTO 0x5b105#define R5C_AGC_DEBUG 0x5c106 107#define TDA18250_NUM_REGS 93108 109#define TDA18250_POWER_STANDBY 0110#define TDA18250_POWER_NORMAL 1111 112#define TDA18250_IRQ_CAL 0x81113#define TDA18250_IRQ_HW_INIT 0x82114#define TDA18250_IRQ_TUNE 0x88115 116struct tda18250_dev {117 struct mutex i2c_mutex;118 struct dvb_frontend *fe;119 struct i2c_adapter *i2c;120 struct regmap *regmap;121 u8 xtal_freq;122 /* IF in kHz */123 u16 if_dvbt_6;124 u16 if_dvbt_7;125 u16 if_dvbt_8;126 u16 if_dvbc_6;127 u16 if_dvbc_8;128 u16 if_atsc;129 u16 if_frequency;130 bool slave;131 bool loopthrough;132 bool warm;133 u8 regs[TDA18250_NUM_REGS];134};135 136#endif137