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1/* SPDX-License-Identifier: GPL-2.0-or-later */2/*3 * Copyright (c) 2001 Jean-Fredric Clere, Nikolas Zimmermann, Georg Acher4 * Mark Cave-Ayland, Carlo E Prelz, Dick Streefland5 * Copyright (c) 2002, 2003 Tuukka Toivonen6 * Copyright (c) 2008 Erik Andrén7 * Copyright (c) 2008 Chia-I Wu8 *9 * P/N 861037: Sensor HDCS1000 ASIC STV060010 * P/N 861050-0010: Sensor HDCS1000 ASIC STV060011 * P/N 861050-0020: Sensor Photobit PB100 ASIC STV0600-1 - QuickCam Express12 * P/N 861055: Sensor ST VV6410 ASIC STV0610 - LEGO cam13 * P/N 861075-0040: Sensor HDCS1000 ASIC14 * P/N 961179-0700: Sensor ST VV6410 ASIC STV0602 - Dexxa WebCam USB15 * P/N 861040-0000: Sensor ST VV6410 ASIC STV0610 - QuickCam Web16 */17 18#ifndef STV06XX_HDCS_H_19#define STV06XX_HDCS_H_20 21#include "stv06xx_sensor.h"22 23#define HDCS_REG_CONFIG(sd) (IS_1020(sd) ? HDCS20_CONFIG : HDCS00_CONFIG)24#define HDCS_REG_CONTROL(sd) (IS_1020(sd) ? HDCS20_CONTROL : HDCS00_CONTROL)25 26#define HDCS_1X00_DEF_WIDTH 36027#define HDCS_1X00_DEF_HEIGHT 29628 29#define HDCS_1020_DEF_WIDTH 35230#define HDCS_1020_DEF_HEIGHT 29231 32#define HDCS_1020_BOTTOM_Y_SKIP 433 34#define HDCS_CLK_FREQ_MHZ 2535 36#define HDCS_ADC_START_SIG_DUR 337 38/* LSB bit of I2C or register address signifies write (0) or read (1) */39/* I2C Registers common for both HDCS-1000/1100 and HDCS-1020 */40/* Identifications Register */41#define HDCS_IDENT (0x00 << 1)42/* Status Register */43#define HDCS_STATUS (0x01 << 1)44/* Interrupt Mask Register */45#define HDCS_IMASK (0x02 << 1)46/* Pad Control Register */47#define HDCS_PCTRL (0x03 << 1)48/* Pad Drive Control Register */49#define HDCS_PDRV (0x04 << 1)50/* Interface Control Register */51#define HDCS_ICTRL (0x05 << 1)52/* Interface Timing Register */53#define HDCS_ITMG (0x06 << 1)54/* Baud Fraction Register */55#define HDCS_BFRAC (0x07 << 1)56/* Baud Rate Register */57#define HDCS_BRATE (0x08 << 1)58/* ADC Control Register */59#define HDCS_ADCCTRL (0x09 << 1)60/* First Window Row Register */61#define HDCS_FWROW (0x0a << 1)62/* First Window Column Register */63#define HDCS_FWCOL (0x0b << 1)64/* Last Window Row Register */65#define HDCS_LWROW (0x0c << 1)66/* Last Window Column Register */67#define HDCS_LWCOL (0x0d << 1)68/* Timing Control Register */69#define HDCS_TCTRL (0x0e << 1)70/* PGA Gain Register: Even Row, Even Column */71#define HDCS_ERECPGA (0x0f << 1)72/* PGA Gain Register: Even Row, Odd Column */73#define HDCS_EROCPGA (0x10 << 1)74/* PGA Gain Register: Odd Row, Even Column */75#define HDCS_ORECPGA (0x11 << 1)76/* PGA Gain Register: Odd Row, Odd Column */77#define HDCS_OROCPGA (0x12 << 1)78/* Row Exposure Low Register */79#define HDCS_ROWEXPL (0x13 << 1)80/* Row Exposure High Register */81#define HDCS_ROWEXPH (0x14 << 1)82 83/* I2C Registers only for HDCS-1000/1100 */84/* Sub-Row Exposure Low Register */85#define HDCS00_SROWEXPL (0x15 << 1)86/* Sub-Row Exposure High Register */87#define HDCS00_SROWEXPH (0x16 << 1)88/* Configuration Register */89#define HDCS00_CONFIG (0x17 << 1)90/* Control Register */91#define HDCS00_CONTROL (0x18 << 1)92 93/* I2C Registers only for HDCS-1020 */94/* Sub-Row Exposure Register */95#define HDCS20_SROWEXP (0x15 << 1)96/* Error Control Register */97#define HDCS20_ERROR (0x16 << 1)98/* Interface Timing 2 Register */99#define HDCS20_ITMG2 (0x17 << 1)100/* Interface Control 2 Register */101#define HDCS20_ICTRL2 (0x18 << 1)102/* Horizontal Blank Register */103#define HDCS20_HBLANK (0x19 << 1)104/* Vertical Blank Register */105#define HDCS20_VBLANK (0x1a << 1)106/* Configuration Register */107#define HDCS20_CONFIG (0x1b << 1)108/* Control Register */109#define HDCS20_CONTROL (0x1c << 1)110 111#define HDCS_RUN_ENABLE (1 << 2)112#define HDCS_SLEEP_MODE (1 << 1)113 114#define HDCS_DEFAULT_EXPOSURE 48115#define HDCS_DEFAULT_GAIN 50116 117static int hdcs_probe_1x00(struct sd *sd);118static int hdcs_probe_1020(struct sd *sd);119static int hdcs_start(struct sd *sd);120static int hdcs_init(struct sd *sd);121static int hdcs_init_controls(struct sd *sd);122static int hdcs_stop(struct sd *sd);123static int hdcs_dump(struct sd *sd);124 125static int hdcs_set_exposure(struct gspca_dev *gspca_dev, __s32 val);126static int hdcs_set_gain(struct gspca_dev *gspca_dev, __s32 val);127 128const struct stv06xx_sensor stv06xx_sensor_hdcs1x00 = {129 .name = "HP HDCS-1000/1100",130 .i2c_flush = 0,131 .i2c_addr = (0x55 << 1),132 .i2c_len = 1,133 134 /* FIXME (see if we can lower min_packet_size, needs testing, and also135 adjusting framerate when the bandwidth gets lower) */136 .min_packet_size = { 847 },137 .max_packet_size = { 847 },138 139 .init = hdcs_init,140 .init_controls = hdcs_init_controls,141 .probe = hdcs_probe_1x00,142 .start = hdcs_start,143 .stop = hdcs_stop,144 .dump = hdcs_dump,145};146 147const struct stv06xx_sensor stv06xx_sensor_hdcs1020 = {148 .name = "HDCS-1020",149 .i2c_flush = 0,150 .i2c_addr = (0x55 << 1),151 .i2c_len = 1,152 153 /* FIXME (see if we can lower min_packet_size, needs testing, and also154 adjusting framerate when the bandwidthm gets lower) */155 .min_packet_size = { 847 },156 .max_packet_size = { 847 },157 158 .init = hdcs_init,159 .init_controls = hdcs_init_controls,160 .probe = hdcs_probe_1020,161 .start = hdcs_start,162 .stop = hdcs_stop,163 .dump = hdcs_dump,164};165 166static const u16 stv_bridge_init[][2] = {167 {STV_ISO_ENABLE, 0},168 {STV_REG23, 0},169 {STV_REG00, 0x1d},170 {STV_REG01, 0xb5},171 {STV_REG02, 0xa8},172 {STV_REG03, 0x95},173 {STV_REG04, 0x07},174 175 {STV_SCAN_RATE, 0x20},176 {STV_Y_CTRL, 0x01},177 {STV_X_CTRL, 0x0a}178};179 180static const u8 stv_sensor_init[][2] = {181 /* Clear status (writing 1 will clear the corresponding status bit) */182 {HDCS_STATUS, BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1)},183 /* Disable all interrupts */184 {HDCS_IMASK, 0x00},185 {HDCS_PCTRL, BIT(6) | BIT(5) | BIT(1) | BIT(0)},186 {HDCS_PDRV, 0x00},187 {HDCS_ICTRL, BIT(5)},188 {HDCS_ITMG, BIT(4) | BIT(1)},189 /* ADC output resolution to 10 bits */190 {HDCS_ADCCTRL, 10}191};192 193#endif194