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1/* SPDX-License-Identifier: GPL-2.0-or-later */2/*3 * Copyright (c) 2001 Jean-Fredric Clere, Nikolas Zimmermann, Georg Acher4 * Mark Cave-Ayland, Carlo E Prelz, Dick Streefland5 * Copyright (c) 2002, 2003 Tuukka Toivonen6 * Copyright (c) 2008 Erik Andrén7 *8 * P/N 861037: Sensor HDCS1000 ASIC STV06009 * P/N 861050-0010: Sensor HDCS1000 ASIC STV060010 * P/N 861050-0020: Sensor Photobit PB100 ASIC STV0600-1 - QuickCam Express11 * P/N 861055: Sensor ST VV6410 ASIC STV0610 - LEGO cam12 * P/N 861075-0040: Sensor HDCS1000 ASIC13 * P/N 961179-0700: Sensor ST VV6410 ASIC STV0602 - Dexxa WebCam USB14 * P/N 861040-0000: Sensor ST VV6410 ASIC STV0610 - QuickCam Web15 */16 17#ifndef STV06XX_VV6410_H_18#define STV06XX_VV6410_H_19 20#include "stv06xx_sensor.h"21 22#define VV6410_COLS 41623#define VV6410_ROWS 32024 25/* Status registers */26/* Chip identification number including revision indicator */27#define VV6410_DEVICEH 0x0028#define VV6410_DEVICEL 0x0129 30/* User can determine whether timed I2C data31 has been consumed by interrogating flag states */32#define VV6410_STATUS0 0x0233 34/* Current line counter value */35#define VV6410_LINECOUNTH 0x0336#define VV6410_LINECOUNTL 0x0437 38/* End x coordinate of image size */39#define VV6410_XENDH 0x0540#define VV6410_XENDL 0x0641 42/* End y coordinate of image size */43#define VV6410_YENDH 0x0744#define VV6410_YENDL 0x0845 46/* This is the average pixel value returned from the47 dark line offset cancellation algorithm */48#define VV6410_DARKAVGH 0x0949#define VV6410_DARKAVGL 0x0a50 51/* This is the average pixel value returned from the52 black line offset cancellation algorithm */53#define VV6410_BLACKAVGH 0x0b54#define VV6410_BLACKAVGL 0x0c55 56/* Flags to indicate whether the x or y image coordinates have been clipped */57#define VV6410_STATUS1 0x0d58 59/* Setup registers */60 61/* Low-power/sleep modes & video timing */62#define VV6410_SETUP0 0x1063 64/* Various parameters */65#define VV6410_SETUP1 0x1166 67/* Contains pixel counter reset value used by external sync */68#define VV6410_SYNCVALUE 0x1269 70/* Frame grabbing modes (FST, LST and QCK) */71#define VV6410_FGMODES 0x1472 73/* FST and QCK mapping modes. */74#define VV6410_PINMAPPING 0x1575 76/* Data resolution */77#define VV6410_DATAFORMAT 0x1678 79/* Output coding formats */80#define VV6410_OPFORMAT 0x1781 82/* Various mode select bits */83#define VV6410_MODESELECT 0x1884 85/* Exposure registers */86/* Fine exposure. */87#define VV6410_FINEH 0x2088#define VV6410_FINEL 0x2189 90/* Coarse exposure */91#define VV6410_COARSEH 0x2292#define VV6410_COARSEL 0x2393 94/* Analog gain setting */95#define VV6410_ANALOGGAIN 0x2496 97/* Clock division */98#define VV6410_CLKDIV 0x2599 100/* Dark line offset cancellation value */101#define VV6410_DARKOFFSETH 0x2c102#define VV6410_DARKOFFSETL 0x2d103 104/* Dark line offset cancellation enable */105#define VV6410_DARKOFFSETSETUP 0x2e106 107/* Video timing registers */108/* Line Length (Pixel Clocks) */109#define VV6410_LINELENGTHH 0x52110#define VV6410_LINELENGTHL 0x53111 112/* X-co-ordinate of top left corner of region of interest (x-offset) */113#define VV6410_XOFFSETH 0x57114#define VV6410_XOFFSETL 0x58115 116/* Y-coordinate of top left corner of region of interest (y-offset) */117#define VV6410_YOFFSETH 0x59118#define VV6410_YOFFSETL 0x5a119 120/* Field length (Lines) */121#define VV6410_FIELDLENGTHH 0x61122#define VV6410_FIELDLENGTHL 0x62123 124/* System registers */125/* Black offset cancellation default value */126#define VV6410_BLACKOFFSETH 0x70127#define VV6410_BLACKOFFSETL 0x71128 129/* Black offset cancellation setup */130#define VV6410_BLACKOFFSETSETUP 0x72131 132/* Analog Control Register 0 */133#define VV6410_CR0 0x75134 135/* Analog Control Register 1 */136#define VV6410_CR1 0x76137 138/* ADC Setup Register */139#define VV6410_AS0 0x77140 141/* Analog Test Register */142#define VV6410_AT0 0x78143 144/* Audio Amplifier Setup Register */145#define VV6410_AT1 0x79146 147#define VV6410_HFLIP (1 << 3)148#define VV6410_VFLIP (1 << 4)149 150#define VV6410_LOW_POWER_MODE (1 << 0)151#define VV6410_SOFT_RESET (1 << 2)152#define VV6410_PAL_25_FPS (0 << 3)153 154#define VV6410_CLK_DIV_2 (1 << 1)155 156#define VV6410_FINE_EXPOSURE 320157#define VV6410_COARSE_EXPOSURE 192158#define VV6410_DEFAULT_GAIN 5159 160#define VV6410_SUBSAMPLE 0x01161#define VV6410_CROP_TO_QVGA 0x02162 163#define VV6410_CIF_LINELENGTH 415164 165static int vv6410_probe(struct sd *sd);166static int vv6410_start(struct sd *sd);167static int vv6410_init(struct sd *sd);168static int vv6410_init_controls(struct sd *sd);169static int vv6410_stop(struct sd *sd);170static int vv6410_dump(struct sd *sd);171 172/* V4L2 controls supported by the driver */173static int vv6410_set_hflip(struct gspca_dev *gspca_dev, __s32 val);174static int vv6410_set_vflip(struct gspca_dev *gspca_dev, __s32 val);175static int vv6410_set_analog_gain(struct gspca_dev *gspca_dev, __s32 val);176static int vv6410_set_exposure(struct gspca_dev *gspca_dev, __s32 val);177 178const struct stv06xx_sensor stv06xx_sensor_vv6410 = {179 .name = "ST VV6410",180 .i2c_flush = 5,181 .i2c_addr = 0x20,182 .i2c_len = 1,183 /* FIXME (see if we can lower packet_size-s, needs testing, and also184 adjusting framerate when the bandwidth gets lower) */185 .min_packet_size = { 1023 },186 .max_packet_size = { 1023 },187 .init = vv6410_init,188 .init_controls = vv6410_init_controls,189 .probe = vv6410_probe,190 .start = vv6410_start,191 .stop = vv6410_stop,192 .dump = vv6410_dump,193};194 195/* If NULL, only single value to write, stored in len */196struct stv_init {197 u16 addr;198 u8 data;199};200 201static const struct stv_init stv_bridge_init[] = {202 /* This reg is written twice. Some kind of reset? */203 {STV_RESET, 0x80},204 {STV_RESET, 0x00},205 {STV_SCAN_RATE, 0x00},206 {STV_I2C_FLUSH, 0x04},207 {STV_REG00, 0x0b},208 {STV_REG01, 0xa7},209 {STV_REG02, 0xb7},210 {STV_REG03, 0x00},211 {STV_REG04, 0x00},212 {0x1536, 0x02},213 {0x1537, 0x00},214 {0x1538, 0x60},215 {0x1539, 0x01},216 {0x153a, 0x20},217 {0x153b, 0x01},218};219 220static const u8 vv6410_sensor_init[][2] = {221 /* Setup registers */222 {VV6410_SETUP0, VV6410_SOFT_RESET},223 {VV6410_SETUP0, VV6410_LOW_POWER_MODE},224 /* Use shuffled read-out mode */225 {VV6410_SETUP1, BIT(6)},226 /* All modes to 1, FST, Fast QCK, Free running QCK, Free running LST, FST will qualify visible pixels */227 {VV6410_FGMODES, BIT(6) | BIT(4) | BIT(2) | BIT(0)},228 {VV6410_PINMAPPING, 0x00},229 /* Pre-clock generator divide off */230 {VV6410_DATAFORMAT, BIT(7) | BIT(0)},231 232 {VV6410_CLKDIV, VV6410_CLK_DIV_2},233 234 /* System registers */235 /* Enable voltage doubler */236 {VV6410_AS0, BIT(6) | BIT(4) | BIT(3) | BIT(2) | BIT(1)},237 {VV6410_AT0, 0x00},238 /* Power up audio, differential */239 {VV6410_AT1, BIT(4) | BIT(0)},240};241 242#endif243