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1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Copyright (c) 2015 Samsung Electronics Co., Ltd.4 * http://www.samsung.com5 *6 * Exynos SROMC register definitions7 */8 9#ifndef __EXYNOS_SROM_H10#define __EXYNOS_SROM_H __FILE__11 12#define EXYNOS_SROMREG(x) (x)13 14#define EXYNOS_SROM_BW EXYNOS_SROMREG(0x0)15#define EXYNOS_SROM_BC0 EXYNOS_SROMREG(0x4)16#define EXYNOS_SROM_BC1 EXYNOS_SROMREG(0x8)17#define EXYNOS_SROM_BC2 EXYNOS_SROMREG(0xc)18#define EXYNOS_SROM_BC3 EXYNOS_SROMREG(0x10)19#define EXYNOS_SROM_BC4 EXYNOS_SROMREG(0x14)20#define EXYNOS_SROM_BC5 EXYNOS_SROMREG(0x18)21 22/* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */23 24#define EXYNOS_SROM_BW__DATAWIDTH__SHIFT 025#define EXYNOS_SROM_BW__ADDRMODE__SHIFT 126#define EXYNOS_SROM_BW__WAITENABLE__SHIFT 227#define EXYNOS_SROM_BW__BYTEENABLE__SHIFT 328 29#define EXYNOS_SROM_BW__CS_MASK 0xf30 31#define EXYNOS_SROM_BW__NCS0__SHIFT 032#define EXYNOS_SROM_BW__NCS1__SHIFT 433#define EXYNOS_SROM_BW__NCS2__SHIFT 834#define EXYNOS_SROM_BW__NCS3__SHIFT 1235#define EXYNOS_SROM_BW__NCS4__SHIFT 1636#define EXYNOS_SROM_BW__NCS5__SHIFT 2037 38/* applies to same to BCS0 - BCS3 */39 40#define EXYNOS_SROM_BCX__PMC__SHIFT 041#define EXYNOS_SROM_BCX__TACP__SHIFT 442#define EXYNOS_SROM_BCX__TCAH__SHIFT 843#define EXYNOS_SROM_BCX__TCOH__SHIFT 1244#define EXYNOS_SROM_BCX__TACC__SHIFT 1645#define EXYNOS_SROM_BCX__TCOS__SHIFT 2446#define EXYNOS_SROM_BCX__TACS__SHIFT 2847 48#endif /* __EXYNOS_SROM_H */49