895 lines · c
1// SPDX-License-Identifier: GPL-2.0-only2/*3 * Copyright (C) 2010 - Maxim Levitsky4 * driver for Ricoh memstick readers5 */6 7#include <linux/kernel.h>8#include <linux/module.h>9#include <linux/freezer.h>10#include <linux/jiffies.h>11#include <linux/interrupt.h>12#include <linux/pci.h>13#include <linux/pci_ids.h>14#include <linux/delay.h>15#include <linux/slab.h>16#include <linux/kthread.h>17#include <linux/sched.h>18#include <linux/highmem.h>19#include <asm/byteorder.h>20#include <linux/swab.h>21#include "r592.h"22 23static bool r592_enable_dma = 1;24static int debug;25 26static const char *tpc_names[] = {27 "MS_TPC_READ_MG_STATUS",28 "MS_TPC_READ_LONG_DATA",29 "MS_TPC_READ_SHORT_DATA",30 "MS_TPC_READ_REG",31 "MS_TPC_READ_QUAD_DATA",32 "INVALID",33 "MS_TPC_GET_INT",34 "MS_TPC_SET_RW_REG_ADRS",35 "MS_TPC_EX_SET_CMD",36 "MS_TPC_WRITE_QUAD_DATA",37 "MS_TPC_WRITE_REG",38 "MS_TPC_WRITE_SHORT_DATA",39 "MS_TPC_WRITE_LONG_DATA",40 "MS_TPC_SET_CMD",41};42 43/**44 * memstick_debug_get_tpc_name - debug helper that returns string for45 * a TPC number46 */47static __maybe_unused const char *memstick_debug_get_tpc_name(int tpc)48{49 return tpc_names[tpc-1];50}51 52/* Read a register*/53static inline u32 r592_read_reg(struct r592_device *dev, int address)54{55 u32 value = readl(dev->mmio + address);56 dbg_reg("reg #%02d == 0x%08x", address, value);57 return value;58}59 60/* Write a register */61static inline void r592_write_reg(struct r592_device *dev,62 int address, u32 value)63{64 dbg_reg("reg #%02d <- 0x%08x", address, value);65 writel(value, dev->mmio + address);66}67 68/* Reads a big endian DWORD register */69static inline u32 r592_read_reg_raw_be(struct r592_device *dev, int address)70{71 u32 value = __raw_readl(dev->mmio + address);72 dbg_reg("reg #%02d == 0x%08x", address, value);73 return be32_to_cpu(value);74}75 76/* Writes a big endian DWORD register */77static inline void r592_write_reg_raw_be(struct r592_device *dev,78 int address, u32 value)79{80 dbg_reg("reg #%02d <- 0x%08x", address, value);81 __raw_writel(cpu_to_be32(value), dev->mmio + address);82}83 84/* Set specific bits in a register (little endian) */85static inline void r592_set_reg_mask(struct r592_device *dev,86 int address, u32 mask)87{88 u32 reg = readl(dev->mmio + address);89 dbg_reg("reg #%02d |= 0x%08x (old =0x%08x)", address, mask, reg);90 writel(reg | mask , dev->mmio + address);91}92 93/* Clear specific bits in a register (little endian) */94static inline void r592_clear_reg_mask(struct r592_device *dev,95 int address, u32 mask)96{97 u32 reg = readl(dev->mmio + address);98 dbg_reg("reg #%02d &= 0x%08x (old = 0x%08x, mask = 0x%08x)",99 address, ~mask, reg, mask);100 writel(reg & ~mask, dev->mmio + address);101}102 103 104/* Wait for status bits while checking for errors */105static int r592_wait_status(struct r592_device *dev, u32 mask, u32 wanted_mask)106{107 unsigned long timeout = jiffies + msecs_to_jiffies(1000);108 u32 reg = r592_read_reg(dev, R592_STATUS);109 110 if ((reg & mask) == wanted_mask)111 return 0;112 113 while (time_before(jiffies, timeout)) {114 115 reg = r592_read_reg(dev, R592_STATUS);116 117 if ((reg & mask) == wanted_mask)118 return 0;119 120 if (reg & (R592_STATUS_SEND_ERR | R592_STATUS_RECV_ERR))121 return -EIO;122 123 cpu_relax();124 }125 return -ETIME;126}127 128 129/* Enable/disable device */130static int r592_enable_device(struct r592_device *dev, bool enable)131{132 dbg("%sabling the device", enable ? "en" : "dis");133 134 if (enable) {135 136 /* Power up the card */137 r592_write_reg(dev, R592_POWER, R592_POWER_0 | R592_POWER_1);138 139 /* Perform a reset */140 r592_set_reg_mask(dev, R592_IO, R592_IO_RESET);141 142 msleep(100);143 } else144 /* Power down the card */145 r592_write_reg(dev, R592_POWER, 0);146 147 return 0;148}149 150/* Set serial/parallel mode */151static int r592_set_mode(struct r592_device *dev, bool parallel_mode)152{153 if (!parallel_mode) {154 dbg("switching to serial mode");155 156 /* Set serial mode */157 r592_write_reg(dev, R592_IO_MODE, R592_IO_MODE_SERIAL);158 159 r592_clear_reg_mask(dev, R592_POWER, R592_POWER_20);160 161 } else {162 dbg("switching to parallel mode");163 164 /* This setting should be set _before_ switch TPC */165 r592_set_reg_mask(dev, R592_POWER, R592_POWER_20);166 167 r592_clear_reg_mask(dev, R592_IO,168 R592_IO_SERIAL1 | R592_IO_SERIAL2);169 170 /* Set the parallel mode now */171 r592_write_reg(dev, R592_IO_MODE, R592_IO_MODE_PARALLEL);172 }173 174 dev->parallel_mode = parallel_mode;175 return 0;176}177 178/* Perform a controller reset without powering down the card */179static void r592_host_reset(struct r592_device *dev)180{181 r592_set_reg_mask(dev, R592_IO, R592_IO_RESET);182 msleep(100);183 r592_set_mode(dev, dev->parallel_mode);184}185 186#ifdef CONFIG_PM_SLEEP187/* Disable all hardware interrupts */188static void r592_clear_interrupts(struct r592_device *dev)189{190 /* Disable & ACK all interrupts */191 r592_clear_reg_mask(dev, R592_REG_MSC, IRQ_ALL_ACK_MASK);192 r592_clear_reg_mask(dev, R592_REG_MSC, IRQ_ALL_EN_MASK);193}194#endif195 196/* Tests if there is an CRC error */197static int r592_test_io_error(struct r592_device *dev)198{199 if (!(r592_read_reg(dev, R592_STATUS) &200 (R592_STATUS_SEND_ERR | R592_STATUS_RECV_ERR)))201 return 0;202 203 return -EIO;204}205 206/* Ensure that FIFO is ready for use */207static int r592_test_fifo_empty(struct r592_device *dev)208{209 if (r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_FIFO_EMPTY)210 return 0;211 212 dbg("FIFO not ready, trying to reset the device");213 r592_host_reset(dev);214 215 if (r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_FIFO_EMPTY)216 return 0;217 218 message("FIFO still not ready, giving up");219 return -EIO;220}221 222/* Activates the DMA transfer from to FIFO */223static void r592_start_dma(struct r592_device *dev, bool is_write)224{225 unsigned long flags;226 u32 reg;227 spin_lock_irqsave(&dev->irq_lock, flags);228 229 /* Ack interrupts (just in case) + enable them */230 r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_ACK_MASK);231 r592_set_reg_mask(dev, R592_REG_MSC, DMA_IRQ_EN_MASK);232 233 /* Set DMA address */234 r592_write_reg(dev, R592_FIFO_DMA, sg_dma_address(&dev->req->sg));235 236 /* Enable the DMA */237 reg = r592_read_reg(dev, R592_FIFO_DMA_SETTINGS);238 reg |= R592_FIFO_DMA_SETTINGS_EN;239 240 if (!is_write)241 reg |= R592_FIFO_DMA_SETTINGS_DIR;242 else243 reg &= ~R592_FIFO_DMA_SETTINGS_DIR;244 r592_write_reg(dev, R592_FIFO_DMA_SETTINGS, reg);245 246 spin_unlock_irqrestore(&dev->irq_lock, flags);247}248 249/* Cleanups DMA related settings */250static void r592_stop_dma(struct r592_device *dev, int error)251{252 r592_clear_reg_mask(dev, R592_FIFO_DMA_SETTINGS,253 R592_FIFO_DMA_SETTINGS_EN);254 255 /* This is only a precation */256 r592_write_reg(dev, R592_FIFO_DMA,257 dev->dummy_dma_page_physical_address);258 259 r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_EN_MASK);260 r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_ACK_MASK);261 dev->dma_error = error;262}263 264/* Test if hardware supports DMA */265static void r592_check_dma(struct r592_device *dev)266{267 dev->dma_capable = r592_enable_dma &&268 (r592_read_reg(dev, R592_FIFO_DMA_SETTINGS) &269 R592_FIFO_DMA_SETTINGS_CAP);270}271 272/* Transfers fifo contents in/out using DMA */273static int r592_transfer_fifo_dma(struct r592_device *dev)274{275 int len, sg_count;276 bool is_write;277 278 if (!dev->dma_capable || !dev->req->long_data)279 return -EINVAL;280 281 len = dev->req->sg.length;282 is_write = dev->req->data_dir == WRITE;283 284 if (len != R592_LFIFO_SIZE)285 return -EINVAL;286 287 dbg_verbose("doing dma transfer");288 289 dev->dma_error = 0;290 reinit_completion(&dev->dma_done);291 292 /* TODO: hidden assumption about nenth beeing always 1 */293 sg_count = dma_map_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ?294 DMA_TO_DEVICE : DMA_FROM_DEVICE);295 296 if (sg_count != 1 || sg_dma_len(&dev->req->sg) < R592_LFIFO_SIZE) {297 message("problem in dma_map_sg");298 return -EIO;299 }300 301 r592_start_dma(dev, is_write);302 303 /* Wait for DMA completion */304 if (!wait_for_completion_timeout(305 &dev->dma_done, msecs_to_jiffies(1000))) {306 message("DMA timeout");307 r592_stop_dma(dev, -ETIMEDOUT);308 }309 310 dma_unmap_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ?311 DMA_TO_DEVICE : DMA_FROM_DEVICE);312 313 return dev->dma_error;314}315 316/*317 * Writes the FIFO in 4 byte chunks.318 * If length isn't 4 byte aligned, rest of the data if put to a fifo319 * to be written later320 * Use r592_flush_fifo_write to flush that fifo when writing for the321 * last time322 */323static void r592_write_fifo_pio(struct r592_device *dev,324 unsigned char *buffer, int len)325{326 /* flush spill from former write */327 if (!kfifo_is_empty(&dev->pio_fifo)) {328 329 u8 tmp[4] = {0};330 int copy_len = kfifo_in(&dev->pio_fifo, buffer, len);331 332 if (!kfifo_is_full(&dev->pio_fifo))333 return;334 len -= copy_len;335 buffer += copy_len;336 337 copy_len = kfifo_out(&dev->pio_fifo, tmp, 4);338 WARN_ON(copy_len != 4);339 r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)tmp);340 }341 342 WARN_ON(!kfifo_is_empty(&dev->pio_fifo));343 344 /* write full dwords */345 while (len >= 4) {346 r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)buffer);347 buffer += 4;348 len -= 4;349 }350 351 /* put remaining bytes to the spill */352 if (len)353 kfifo_in(&dev->pio_fifo, buffer, len);354}355 356/* Flushes the temporary FIFO used to make aligned DWORD writes */357static void r592_flush_fifo_write(struct r592_device *dev)358{359 int ret;360 u8 buffer[4] = { 0 };361 362 if (kfifo_is_empty(&dev->pio_fifo))363 return;364 365 ret = kfifo_out(&dev->pio_fifo, buffer, 4);366 /* intentionally ignore __must_check return code */367 (void)ret;368 r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)buffer);369}370 371/*372 * Read a fifo in 4 bytes chunks.373 * If input doesn't fit the buffer, it places bytes of last dword in spill374 * buffer, so that they don't get lost on last read, just throw these away.375 */376static void r592_read_fifo_pio(struct r592_device *dev,377 unsigned char *buffer, int len)378{379 u8 tmp[4];380 381 /* Read from last spill */382 if (!kfifo_is_empty(&dev->pio_fifo)) {383 int bytes_copied =384 kfifo_out(&dev->pio_fifo, buffer, min(4, len));385 buffer += bytes_copied;386 len -= bytes_copied;387 388 if (!kfifo_is_empty(&dev->pio_fifo))389 return;390 }391 392 /* Reads dwords from FIFO */393 while (len >= 4) {394 *(u32 *)buffer = r592_read_reg_raw_be(dev, R592_FIFO_PIO);395 buffer += 4;396 len -= 4;397 }398 399 if (len) {400 *(u32 *)tmp = r592_read_reg_raw_be(dev, R592_FIFO_PIO);401 kfifo_in(&dev->pio_fifo, tmp, 4);402 len -= kfifo_out(&dev->pio_fifo, buffer, len);403 }404 405 WARN_ON(len);406 return;407}408 409/* Transfers actual data using PIO. */410static int r592_transfer_fifo_pio(struct r592_device *dev)411{412 unsigned long flags;413 414 bool is_write = dev->req->tpc >= MS_TPC_SET_RW_REG_ADRS;415 struct sg_mapping_iter miter;416 417 kfifo_reset(&dev->pio_fifo);418 419 if (!dev->req->long_data) {420 if (is_write) {421 r592_write_fifo_pio(dev, dev->req->data,422 dev->req->data_len);423 r592_flush_fifo_write(dev);424 } else425 r592_read_fifo_pio(dev, dev->req->data,426 dev->req->data_len);427 return 0;428 }429 430 local_irq_save(flags);431 sg_miter_start(&miter, &dev->req->sg, 1, SG_MITER_ATOMIC |432 (is_write ? SG_MITER_FROM_SG : SG_MITER_TO_SG));433 434 /* Do the transfer fifo<->memory*/435 while (sg_miter_next(&miter))436 if (is_write)437 r592_write_fifo_pio(dev, miter.addr, miter.length);438 else439 r592_read_fifo_pio(dev, miter.addr, miter.length);440 441 442 /* Write last few non aligned bytes*/443 if (is_write)444 r592_flush_fifo_write(dev);445 446 sg_miter_stop(&miter);447 local_irq_restore(flags);448 return 0;449}450 451/* Executes one TPC (data is read/written from small or large fifo) */452static void r592_execute_tpc(struct r592_device *dev)453{454 bool is_write;455 int len, error;456 u32 status, reg;457 458 if (!dev->req) {459 message("BUG: tpc execution without request!");460 return;461 }462 463 is_write = dev->req->tpc >= MS_TPC_SET_RW_REG_ADRS;464 len = dev->req->long_data ?465 dev->req->sg.length : dev->req->data_len;466 467 /* Ensure that FIFO can hold the input data */468 if (len > R592_LFIFO_SIZE) {469 message("IO: hardware doesn't support TPCs longer that 512");470 error = -ENOSYS;471 goto out;472 }473 474 if (!(r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_PRSNT)) {475 dbg("IO: refusing to send TPC because card is absent");476 error = -ENODEV;477 goto out;478 }479 480 dbg("IO: executing %s LEN=%d",481 memstick_debug_get_tpc_name(dev->req->tpc), len);482 483 /* Set IO direction */484 if (is_write)485 r592_set_reg_mask(dev, R592_IO, R592_IO_DIRECTION);486 else487 r592_clear_reg_mask(dev, R592_IO, R592_IO_DIRECTION);488 489 490 error = r592_test_fifo_empty(dev);491 if (error)492 goto out;493 494 /* Transfer write data */495 if (is_write) {496 error = r592_transfer_fifo_dma(dev);497 if (error == -EINVAL)498 error = r592_transfer_fifo_pio(dev);499 }500 501 if (error)502 goto out;503 504 /* Trigger the TPC */505 reg = (len << R592_TPC_EXEC_LEN_SHIFT) |506 (dev->req->tpc << R592_TPC_EXEC_TPC_SHIFT) |507 R592_TPC_EXEC_BIG_FIFO;508 509 r592_write_reg(dev, R592_TPC_EXEC, reg);510 511 /* Wait for TPC completion */512 status = R592_STATUS_RDY;513 if (dev->req->need_card_int)514 status |= R592_STATUS_CED;515 516 error = r592_wait_status(dev, status, status);517 if (error) {518 message("card didn't respond");519 goto out;520 }521 522 /* Test IO errors */523 error = r592_test_io_error(dev);524 if (error) {525 dbg("IO error");526 goto out;527 }528 529 /* Read data from FIFO */530 if (!is_write) {531 error = r592_transfer_fifo_dma(dev);532 if (error == -EINVAL)533 error = r592_transfer_fifo_pio(dev);534 }535 536 /* read INT reg. This can be shortened with shifts, but that way537 its more readable */538 if (dev->parallel_mode && dev->req->need_card_int) {539 540 dev->req->int_reg = 0;541 status = r592_read_reg(dev, R592_STATUS);542 543 if (status & R592_STATUS_P_CMDNACK)544 dev->req->int_reg |= MEMSTICK_INT_CMDNAK;545 if (status & R592_STATUS_P_BREQ)546 dev->req->int_reg |= MEMSTICK_INT_BREQ;547 if (status & R592_STATUS_P_INTERR)548 dev->req->int_reg |= MEMSTICK_INT_ERR;549 if (status & R592_STATUS_P_CED)550 dev->req->int_reg |= MEMSTICK_INT_CED;551 }552 553 if (error)554 dbg("FIFO read error");555out:556 dev->req->error = error;557 r592_clear_reg_mask(dev, R592_REG_MSC, R592_REG_MSC_LED);558 return;559}560 561/* Main request processing thread */562static int r592_process_thread(void *data)563{564 int error;565 struct r592_device *dev = (struct r592_device *)data;566 unsigned long flags;567 568 while (!kthread_should_stop()) {569 spin_lock_irqsave(&dev->io_thread_lock, flags);570 set_current_state(TASK_INTERRUPTIBLE);571 error = memstick_next_req(dev->host, &dev->req);572 spin_unlock_irqrestore(&dev->io_thread_lock, flags);573 574 if (error) {575 if (error == -ENXIO || error == -EAGAIN) {576 dbg_verbose("IO: done IO, sleeping");577 } else {578 dbg("IO: unknown error from "579 "memstick_next_req %d", error);580 }581 582 if (kthread_should_stop())583 set_current_state(TASK_RUNNING);584 585 schedule();586 } else {587 set_current_state(TASK_RUNNING);588 r592_execute_tpc(dev);589 }590 }591 return 0;592}593 594/* Reprogram chip to detect change in card state */595/* eg, if card is detected, arm it to detect removal, and vice versa */596static void r592_update_card_detect(struct r592_device *dev)597{598 u32 reg = r592_read_reg(dev, R592_REG_MSC);599 bool card_detected = reg & R592_REG_MSC_PRSNT;600 601 dbg("update card detect. card state: %s", card_detected ?602 "present" : "absent");603 604 reg &= ~((R592_REG_MSC_IRQ_REMOVE | R592_REG_MSC_IRQ_INSERT) << 16);605 606 if (card_detected)607 reg |= (R592_REG_MSC_IRQ_REMOVE << 16);608 else609 reg |= (R592_REG_MSC_IRQ_INSERT << 16);610 611 r592_write_reg(dev, R592_REG_MSC, reg);612}613 614/* Timer routine that fires 1 second after last card detection event, */615static void r592_detect_timer(struct timer_list *t)616{617 struct r592_device *dev = from_timer(dev, t, detect_timer);618 r592_update_card_detect(dev);619 memstick_detect_change(dev->host);620}621 622/* Interrupt handler */623static irqreturn_t r592_irq(int irq, void *data)624{625 struct r592_device *dev = (struct r592_device *)data;626 irqreturn_t ret = IRQ_NONE;627 u32 reg;628 u16 irq_enable, irq_status;629 unsigned long flags;630 int error;631 632 spin_lock_irqsave(&dev->irq_lock, flags);633 634 reg = r592_read_reg(dev, R592_REG_MSC);635 irq_enable = reg >> 16;636 irq_status = reg & 0xFFFF;637 638 /* Ack the interrupts */639 reg &= ~irq_status;640 r592_write_reg(dev, R592_REG_MSC, reg);641 642 /* Get the IRQ status minus bits that aren't enabled */643 irq_status &= (irq_enable);644 645 /* Due to limitation of memstick core, we don't look at bits that646 indicate that card was removed/inserted and/or present */647 if (irq_status & (R592_REG_MSC_IRQ_INSERT | R592_REG_MSC_IRQ_REMOVE)) {648 649 bool card_was_added = irq_status & R592_REG_MSC_IRQ_INSERT;650 ret = IRQ_HANDLED;651 652 message("IRQ: card %s", card_was_added ? "added" : "removed");653 654 mod_timer(&dev->detect_timer,655 jiffies + msecs_to_jiffies(card_was_added ? 500 : 50));656 }657 658 if (irq_status &659 (R592_REG_MSC_FIFO_DMA_DONE | R592_REG_MSC_FIFO_DMA_ERR)) {660 ret = IRQ_HANDLED;661 662 if (irq_status & R592_REG_MSC_FIFO_DMA_ERR) {663 message("IRQ: DMA error");664 error = -EIO;665 } else {666 dbg_verbose("IRQ: dma done");667 error = 0;668 }669 670 r592_stop_dma(dev, error);671 complete(&dev->dma_done);672 }673 674 spin_unlock_irqrestore(&dev->irq_lock, flags);675 return ret;676}677 678/* External inteface: set settings */679static int r592_set_param(struct memstick_host *host,680 enum memstick_param param, int value)681{682 struct r592_device *dev = memstick_priv(host);683 684 switch (param) {685 case MEMSTICK_POWER:686 switch (value) {687 case MEMSTICK_POWER_ON:688 return r592_enable_device(dev, true);689 case MEMSTICK_POWER_OFF:690 return r592_enable_device(dev, false);691 default:692 return -EINVAL;693 }694 case MEMSTICK_INTERFACE:695 switch (value) {696 case MEMSTICK_SERIAL:697 return r592_set_mode(dev, 0);698 case MEMSTICK_PAR4:699 return r592_set_mode(dev, 1);700 default:701 return -EINVAL;702 }703 default:704 return -EINVAL;705 }706}707 708/* External interface: submit requests */709static void r592_submit_req(struct memstick_host *host)710{711 struct r592_device *dev = memstick_priv(host);712 unsigned long flags;713 714 if (dev->req)715 return;716 717 spin_lock_irqsave(&dev->io_thread_lock, flags);718 if (wake_up_process(dev->io_thread))719 dbg_verbose("IO thread woken to process requests");720 spin_unlock_irqrestore(&dev->io_thread_lock, flags);721}722 723static const struct pci_device_id r592_pci_id_tbl[] = {724 725 { PCI_VDEVICE(RICOH, 0x0592), },726 { },727};728 729/* Main entry */730static int r592_probe(struct pci_dev *pdev, const struct pci_device_id *id)731{732 int error = -ENOMEM;733 struct memstick_host *host;734 struct r592_device *dev;735 736 /* Allocate memory */737 host = memstick_alloc_host(sizeof(struct r592_device), &pdev->dev);738 if (!host)739 goto error1;740 741 dev = memstick_priv(host);742 dev->host = host;743 dev->pci_dev = pdev;744 pci_set_drvdata(pdev, dev);745 746 /* pci initialization */747 error = pci_enable_device(pdev);748 if (error)749 goto error2;750 751 pci_set_master(pdev);752 error = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));753 if (error)754 goto error3;755 756 error = pci_request_regions(pdev, DRV_NAME);757 if (error)758 goto error3;759 760 dev->mmio = pci_ioremap_bar(pdev, 0);761 if (!dev->mmio) {762 error = -ENOMEM;763 goto error4;764 }765 766 dev->irq = pdev->irq;767 spin_lock_init(&dev->irq_lock);768 spin_lock_init(&dev->io_thread_lock);769 init_completion(&dev->dma_done);770 INIT_KFIFO(dev->pio_fifo);771 timer_setup(&dev->detect_timer, r592_detect_timer, 0);772 773 /* Host initialization */774 host->caps = MEMSTICK_CAP_PAR4;775 host->request = r592_submit_req;776 host->set_param = r592_set_param;777 r592_check_dma(dev);778 779 dev->io_thread = kthread_run(r592_process_thread, dev, "r592_io");780 if (IS_ERR(dev->io_thread)) {781 error = PTR_ERR(dev->io_thread);782 goto error5;783 }784 785 /* This is just a precation, so don't fail */786 dev->dummy_dma_page = dma_alloc_coherent(&pdev->dev, PAGE_SIZE,787 &dev->dummy_dma_page_physical_address, GFP_KERNEL);788 r592_stop_dma(dev , 0);789 790 error = request_irq(dev->irq, &r592_irq, IRQF_SHARED,791 DRV_NAME, dev);792 if (error)793 goto error6;794 795 r592_update_card_detect(dev);796 error = memstick_add_host(host);797 if (error)798 goto error7;799 800 message("driver successfully loaded");801 return 0;802error7:803 free_irq(dev->irq, dev);804error6:805 if (dev->dummy_dma_page)806 dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->dummy_dma_page,807 dev->dummy_dma_page_physical_address);808 809 kthread_stop(dev->io_thread);810error5:811 iounmap(dev->mmio);812error4:813 pci_release_regions(pdev);814error3:815 pci_disable_device(pdev);816error2:817 memstick_free_host(host);818error1:819 return error;820}821 822static void r592_remove(struct pci_dev *pdev)823{824 int error = 0;825 struct r592_device *dev = pci_get_drvdata(pdev);826 827 /* Stop the processing thread.828 That ensures that we won't take any more requests */829 kthread_stop(dev->io_thread);830 del_timer_sync(&dev->detect_timer);831 r592_enable_device(dev, false);832 833 while (!error && dev->req) {834 dev->req->error = -ETIME;835 error = memstick_next_req(dev->host, &dev->req);836 }837 memstick_remove_host(dev->host);838 839 if (dev->dummy_dma_page)840 dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->dummy_dma_page,841 dev->dummy_dma_page_physical_address);842 843 free_irq(dev->irq, dev);844 iounmap(dev->mmio);845 pci_release_regions(pdev);846 pci_disable_device(pdev);847 memstick_free_host(dev->host);848}849 850#ifdef CONFIG_PM_SLEEP851static int r592_suspend(struct device *core_dev)852{853 struct r592_device *dev = dev_get_drvdata(core_dev);854 855 r592_clear_interrupts(dev);856 memstick_suspend_host(dev->host);857 del_timer_sync(&dev->detect_timer);858 return 0;859}860 861static int r592_resume(struct device *core_dev)862{863 struct r592_device *dev = dev_get_drvdata(core_dev);864 865 r592_clear_interrupts(dev);866 r592_enable_device(dev, false);867 memstick_resume_host(dev->host);868 r592_update_card_detect(dev);869 return 0;870}871#endif872 873static SIMPLE_DEV_PM_OPS(r592_pm_ops, r592_suspend, r592_resume);874 875MODULE_DEVICE_TABLE(pci, r592_pci_id_tbl);876 877static struct pci_driver r592_pci_driver = {878 .name = DRV_NAME,879 .id_table = r592_pci_id_tbl,880 .probe = r592_probe,881 .remove = r592_remove,882 .driver.pm = &r592_pm_ops,883};884 885module_pci_driver(r592_pci_driver);886 887module_param_named(enable_dma, r592_enable_dma, bool, S_IRUGO);888MODULE_PARM_DESC(enable_dma, "Enable usage of the DMA (default)");889module_param(debug, int, S_IRUGO | S_IWUSR);890MODULE_PARM_DESC(debug, "Debug level (0-3)");891 892MODULE_LICENSE("GPL");893MODULE_AUTHOR("Maxim Levitsky <maximlevitsky@gmail.com>");894MODULE_DESCRIPTION("Ricoh R5C592 Memstick/Memstick PRO card reader driver");895