brintos

brintos / linux-shallow public Read only

0
0
Text · 2.9 KiB · 094e59e Raw
100 lines · c
1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Copyright (C) 2022 Richtek Technology Corp.4 *5 * Author: ChiYuan Huang <cy_huang@richtek.com>6 */7 8#ifndef __MFD_MT6370_H__9#define __MFD_MT6370_H__10 11/* IRQ definitions */12#define MT6370_IRQ_DIRCHGON		013#define MT6370_IRQ_CHG_TREG		414#define MT6370_IRQ_CHG_AICR		515#define MT6370_IRQ_CHG_MIVR		616#define MT6370_IRQ_PWR_RDY		717#define MT6370_IRQ_FL_CHG_VINOVP	1118#define MT6370_IRQ_CHG_VSYSUV		1219#define MT6370_IRQ_CHG_VSYSOV		1320#define MT6370_IRQ_CHG_VBATOV		1421#define MT6370_IRQ_CHG_VINOVPCHG	1522#define MT6370_IRQ_TS_BAT_COLD		2023#define MT6370_IRQ_TS_BAT_COOL		2124#define MT6370_IRQ_TS_BAT_WARM		2225#define MT6370_IRQ_TS_BAT_HOT		2326#define MT6370_IRQ_TS_STATC		2427#define MT6370_IRQ_CHG_FAULT		2528#define MT6370_IRQ_CHG_STATC		2629#define MT6370_IRQ_CHG_TMR		2730#define MT6370_IRQ_CHG_BATABS		2831#define MT6370_IRQ_CHG_ADPBAD		2932#define MT6370_IRQ_CHG_RVP		3033#define MT6370_IRQ_TSHUTDOWN		3134#define MT6370_IRQ_CHG_IINMEAS		3235#define MT6370_IRQ_CHG_ICCMEAS		3336#define MT6370_IRQ_CHGDET_DONE		3437#define MT6370_IRQ_WDTMR		3538#define MT6370_IRQ_SSFINISH		3639#define MT6370_IRQ_CHG_RECHG		3740#define MT6370_IRQ_CHG_TERM		3841#define MT6370_IRQ_CHG_IEOC		3942#define MT6370_IRQ_ADC_DONE		4043#define MT6370_IRQ_PUMPX_DONE		4144#define MT6370_IRQ_BST_BATUV		4545#define MT6370_IRQ_BST_MIDOV		4646#define MT6370_IRQ_BST_OLP		4747#define MT6370_IRQ_ATTACH		4848#define MT6370_IRQ_DETACH		4949#define MT6370_IRQ_HVDCP_STPDONE	5150#define MT6370_IRQ_HVDCP_VBUSDET_DONE	5251#define MT6370_IRQ_HVDCP_DET		5352#define MT6370_IRQ_CHGDET		5453#define MT6370_IRQ_DCDT			5554#define MT6370_IRQ_DIRCHG_VGOK		5955#define MT6370_IRQ_DIRCHG_WDTMR		6056#define MT6370_IRQ_DIRCHG_UC		6157#define MT6370_IRQ_DIRCHG_OC		6258#define MT6370_IRQ_DIRCHG_OV		6359#define MT6370_IRQ_OVPCTRL_SWON		6760#define MT6370_IRQ_OVPCTRL_UVP_D	6861#define MT6370_IRQ_OVPCTRL_UVP		6962#define MT6370_IRQ_OVPCTRL_OVP_D	7063#define MT6370_IRQ_OVPCTRL_OVP		7164#define MT6370_IRQ_FLED_STRBPIN		7265#define MT6370_IRQ_FLED_TORPIN		7366#define MT6370_IRQ_FLED_TX		7467#define MT6370_IRQ_FLED_LVF		7568#define MT6370_IRQ_FLED2_SHORT		7869#define MT6370_IRQ_FLED1_SHORT		7970#define MT6370_IRQ_FLED2_STRB		8071#define MT6370_IRQ_FLED1_STRB		8172#define mT6370_IRQ_FLED2_STRB_TO	8273#define MT6370_IRQ_FLED1_STRB_TO	8374#define MT6370_IRQ_FLED2_TOR		8475#define MT6370_IRQ_FLED1_TOR		8576#define MT6370_IRQ_OTP			9377#define MT6370_IRQ_VDDA_OVP		9478#define MT6370_IRQ_VDDA_UV		9579#define MT6370_IRQ_LDO_OC		10380#define MT6370_IRQ_BLED_OCP		11881#define MT6370_IRQ_BLED_OVP		11982#define MT6370_IRQ_DSV_VNEG_OCP		12383#define MT6370_IRQ_DSV_VPOS_OCP		12484#define MT6370_IRQ_DSV_BST_OCP		12585#define MT6370_IRQ_DSV_VNEG_SCP		12686#define MT6370_IRQ_DSV_VPOS_SCP		12787 88enum {89	MT6370_USBC_I2C = 0,90	MT6370_PMU_I2C,91	MT6370_MAX_I2C92};93 94struct mt6370_info {95	struct i2c_client *i2c[MT6370_MAX_I2C];96	struct regmap_irq_chip_data *irq_data;97};98 99#endif /* __MFD_MT6375_H__ */100