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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * omap-usb-tll.c - The USB TLL driver for OMAP EHCI & OHCI4 *5 * Copyright (C) 2012-2013 Texas Instruments Incorporated - https://www.ti.com6 * Author: Keshava Munegowda <keshava_mgowda@ti.com>7 * Author: Roger Quadros <rogerq@ti.com>8 */9#include <linux/kernel.h>10#include <linux/module.h>11#include <linux/types.h>12#include <linux/slab.h>13#include <linux/spinlock.h>14#include <linux/platform_device.h>15#include <linux/clk.h>16#include <linux/io.h>17#include <linux/err.h>18#include <linux/pm_runtime.h>19#include <linux/platform_data/usb-omap.h>20#include <linux/of.h>21 22#include "omap-usb.h"23 24#define USBTLL_DRIVER_NAME "usbhs_tll"25 26/* TLL Register Set */27#define OMAP_USBTLL_REVISION (0x00)28#define OMAP_USBTLL_SYSCONFIG (0x10)29#define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8)30#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3)31#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2)32#define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1)33#define OMAP_USBTLL_SYSCONFIG_AUTOIDLE (1 << 0)34 35#define OMAP_USBTLL_SYSSTATUS (0x14)36#define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0)37 38#define OMAP_USBTLL_IRQSTATUS (0x18)39#define OMAP_USBTLL_IRQENABLE (0x1C)40 41#define OMAP_TLL_SHARED_CONF (0x30)42#define OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN (1 << 6)43#define OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN (1 << 5)44#define OMAP_TLL_SHARED_CONF_USB_DIVRATION (1 << 2)45#define OMAP_TLL_SHARED_CONF_FCLK_REQ (1 << 1)46#define OMAP_TLL_SHARED_CONF_FCLK_IS_ON (1 << 0)47 48#define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num)49#define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT 2450#define OMAP_TLL_CHANNEL_CONF_DRVVBUS (1 << 16)51#define OMAP_TLL_CHANNEL_CONF_CHRGVBUS (1 << 15)52#define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF (1 << 11)53#define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 << 10)54#define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 << 9)55#define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 << 8)56#define OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI (2 << 1)57#define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 << 1)58#define OMAP_TLL_CHANNEL_CONF_CHANEN (1 << 0)59 60#define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0 0x061#define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM 0x162#define OMAP_TLL_FSLSMODE_3PIN_PHY 0x263#define OMAP_TLL_FSLSMODE_4PIN_PHY 0x364#define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0 0x465#define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM 0x566#define OMAP_TLL_FSLSMODE_3PIN_TLL 0x667#define OMAP_TLL_FSLSMODE_4PIN_TLL 0x768#define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0 0xA69#define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM 0xB70 71#define OMAP_TLL_ULPI_FUNCTION_CTRL(num) (0x804 + 0x100 * num)72#define OMAP_TLL_ULPI_INTERFACE_CTRL(num) (0x807 + 0x100 * num)73#define OMAP_TLL_ULPI_OTG_CTRL(num) (0x80A + 0x100 * num)74#define OMAP_TLL_ULPI_INT_EN_RISE(num) (0x80D + 0x100 * num)75#define OMAP_TLL_ULPI_INT_EN_FALL(num) (0x810 + 0x100 * num)76#define OMAP_TLL_ULPI_INT_STATUS(num) (0x813 + 0x100 * num)77#define OMAP_TLL_ULPI_INT_LATCH(num) (0x814 + 0x100 * num)78#define OMAP_TLL_ULPI_DEBUG(num) (0x815 + 0x100 * num)79#define OMAP_TLL_ULPI_SCRATCH_REGISTER(num) (0x816 + 0x100 * num)80 81#define OMAP_REV2_TLL_CHANNEL_COUNT 282#define OMAP_TLL_CHANNEL_COUNT 383#define OMAP_TLL_CHANNEL_1_EN_MASK (1 << 0)84#define OMAP_TLL_CHANNEL_2_EN_MASK (1 << 1)85#define OMAP_TLL_CHANNEL_3_EN_MASK (1 << 2)86 87/* Values of USBTLL_REVISION - Note: these are not given in the TRM */88#define OMAP_USBTLL_REV1 0x00000015 /* OMAP3 */89#define OMAP_USBTLL_REV2 0x00000018 /* OMAP 3630 */90#define OMAP_USBTLL_REV3 0x00000004 /* OMAP4 */91#define OMAP_USBTLL_REV4 0x00000006 /* OMAP5 */92 93#define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL)94 95/* only PHY and UNUSED modes don't need TLL */96#define omap_usb_mode_needs_tll(x) ((x) != OMAP_USBHS_PORT_MODE_UNUSED &&\97 (x) != OMAP_EHCI_PORT_MODE_PHY)98 99struct usbtll_omap {100 void __iomem *base;101 int nch;102 struct clk *ch_clk[] __counted_by(nch);103};104 105/*-------------------------------------------------------------------------*/106 107static const char usbtll_driver_name[] = USBTLL_DRIVER_NAME;108static struct device *tll_dev;109static DEFINE_SPINLOCK(tll_lock); /* serialize access to tll_dev */110 111/*-------------------------------------------------------------------------*/112 113static inline void usbtll_write(void __iomem *base, u32 reg, u32 val)114{115 writel_relaxed(val, base + reg);116}117 118static inline u32 usbtll_read(void __iomem *base, u32 reg)119{120 return readl_relaxed(base + reg);121}122 123static inline void usbtll_writeb(void __iomem *base, u32 reg, u8 val)124{125 writeb_relaxed(val, base + reg);126}127 128/*-------------------------------------------------------------------------*/129 130static bool is_ohci_port(enum usbhs_omap_port_mode pmode)131{132 switch (pmode) {133 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:134 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:135 case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:136 case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:137 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:138 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:139 case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:140 case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:141 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:142 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:143 return true;144 145 default:146 return false;147 }148}149 150/*151 * convert the port-mode enum to a value we can use in the FSLSMODE152 * field of USBTLL_CHANNEL_CONF153 */154static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode)155{156 switch (mode) {157 case OMAP_USBHS_PORT_MODE_UNUSED:158 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:159 return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;160 161 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:162 return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM;163 164 case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:165 return OMAP_TLL_FSLSMODE_3PIN_PHY;166 167 case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:168 return OMAP_TLL_FSLSMODE_4PIN_PHY;169 170 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:171 return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0;172 173 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:174 return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM;175 176 case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:177 return OMAP_TLL_FSLSMODE_3PIN_TLL;178 179 case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:180 return OMAP_TLL_FSLSMODE_4PIN_TLL;181 182 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:183 return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0;184 185 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:186 return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM;187 default:188 pr_warn("Invalid port mode, using default\n");189 return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;190 }191}192 193/**194 * usbtll_omap_probe - initialize TI-based HCDs195 *196 * Allocates basic resources for this USB host controller.197 *198 * @pdev: Pointer to this device's platform device structure199 */200static int usbtll_omap_probe(struct platform_device *pdev)201{202 struct device *dev = &pdev->dev;203 struct usbtll_omap *tll;204 void __iomem *base;205 int i, nch, ver;206 207 dev_dbg(dev, "starting TI HSUSB TLL Controller\n");208 209 base = devm_platform_ioremap_resource(pdev, 0);210 if (IS_ERR(base))211 return PTR_ERR(base);212 213 pm_runtime_enable(dev);214 pm_runtime_get_sync(dev);215 216 ver = usbtll_read(base, OMAP_USBTLL_REVISION);217 switch (ver) {218 case OMAP_USBTLL_REV1:219 case OMAP_USBTLL_REV4:220 nch = OMAP_TLL_CHANNEL_COUNT;221 break;222 case OMAP_USBTLL_REV2:223 case OMAP_USBTLL_REV3:224 nch = OMAP_REV2_TLL_CHANNEL_COUNT;225 break;226 default:227 nch = OMAP_TLL_CHANNEL_COUNT;228 dev_dbg(dev, "rev 0x%x not recognized, assuming %d channels\n",229 ver, nch);230 break;231 }232 233 tll = devm_kzalloc(dev, struct_size(tll, ch_clk, nch), GFP_KERNEL);234 if (!tll) {235 pm_runtime_put_sync(dev);236 pm_runtime_disable(dev);237 return -ENOMEM;238 }239 240 tll->base = base;241 tll->nch = nch;242 platform_set_drvdata(pdev, tll);243 244 for (i = 0; i < nch; i++) {245 char clkname[] = "usb_tll_hs_usb_chx_clk";246 247 snprintf(clkname, sizeof(clkname),248 "usb_tll_hs_usb_ch%d_clk", i);249 tll->ch_clk[i] = clk_get(dev, clkname);250 251 if (IS_ERR(tll->ch_clk[i]))252 dev_dbg(dev, "can't get clock : %s\n", clkname);253 else254 clk_prepare(tll->ch_clk[i]);255 }256 257 pm_runtime_put_sync(dev);258 /* only after this can omap_tll_enable/disable work */259 spin_lock(&tll_lock);260 tll_dev = dev;261 spin_unlock(&tll_lock);262 263 return 0;264}265 266/**267 * usbtll_omap_remove - shutdown processing for UHH & TLL HCDs268 * @pdev: USB Host Controller being removed269 *270 * Reverses the effect of usbtll_omap_probe().271 */272static void usbtll_omap_remove(struct platform_device *pdev)273{274 struct usbtll_omap *tll = platform_get_drvdata(pdev);275 int i;276 277 spin_lock(&tll_lock);278 tll_dev = NULL;279 spin_unlock(&tll_lock);280 281 for (i = 0; i < tll->nch; i++) {282 if (!IS_ERR(tll->ch_clk[i])) {283 clk_unprepare(tll->ch_clk[i]);284 clk_put(tll->ch_clk[i]);285 }286 }287 288 pm_runtime_disable(&pdev->dev);289}290 291static const struct of_device_id usbtll_omap_dt_ids[] = {292 { .compatible = "ti,usbhs-tll" },293 { }294};295 296MODULE_DEVICE_TABLE(of, usbtll_omap_dt_ids);297 298static struct platform_driver usbtll_omap_driver = {299 .driver = {300 .name = usbtll_driver_name,301 .of_match_table = usbtll_omap_dt_ids,302 },303 .probe = usbtll_omap_probe,304 .remove_new = usbtll_omap_remove,305};306 307int omap_tll_init(struct usbhs_omap_platform_data *pdata)308{309 int i;310 bool needs_tll;311 unsigned reg;312 struct usbtll_omap *tll;313 314 if (!tll_dev)315 return -ENODEV;316 317 pm_runtime_get_sync(tll_dev);318 319 spin_lock(&tll_lock);320 tll = dev_get_drvdata(tll_dev);321 needs_tll = false;322 for (i = 0; i < tll->nch; i++)323 needs_tll |= omap_usb_mode_needs_tll(pdata->port_mode[i]);324 325 if (needs_tll) {326 void __iomem *base = tll->base;327 328 /* Program Common TLL register */329 reg = usbtll_read(base, OMAP_TLL_SHARED_CONF);330 reg |= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON331 | OMAP_TLL_SHARED_CONF_USB_DIVRATION);332 reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN;333 reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN;334 335 usbtll_write(base, OMAP_TLL_SHARED_CONF, reg);336 337 /* Enable channels now */338 for (i = 0; i < tll->nch; i++) {339 reg = usbtll_read(base, OMAP_TLL_CHANNEL_CONF(i));340 341 if (is_ohci_port(pdata->port_mode[i])) {342 reg |= ohci_omap3_fslsmode(pdata->port_mode[i])343 << OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT;344 reg |= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS;345 } else if (pdata->port_mode[i] ==346 OMAP_EHCI_PORT_MODE_TLL) {347 /*348 * Disable UTMI AutoIdle, BitStuffing349 * and use SDR Mode. Enable ULPI AutoIdle.350 */351 reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE352 | OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE);353 reg |= OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF;354 reg |= OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE;355 } else if (pdata->port_mode[i] ==356 OMAP_EHCI_PORT_MODE_HSIC) {357 /*358 * HSIC Mode requires UTMI port configurations359 */360 reg |= OMAP_TLL_CHANNEL_CONF_DRVVBUS361 | OMAP_TLL_CHANNEL_CONF_CHRGVBUS362 | OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI363 | OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF;364 } else {365 continue;366 }367 reg |= OMAP_TLL_CHANNEL_CONF_CHANEN;368 usbtll_write(base, OMAP_TLL_CHANNEL_CONF(i), reg);369 370 usbtll_writeb(base,371 OMAP_TLL_ULPI_SCRATCH_REGISTER(i),372 0xbe);373 }374 }375 376 spin_unlock(&tll_lock);377 pm_runtime_put_sync(tll_dev);378 379 return 0;380}381EXPORT_SYMBOL_GPL(omap_tll_init);382 383int omap_tll_enable(struct usbhs_omap_platform_data *pdata)384{385 int i;386 struct usbtll_omap *tll;387 388 if (!tll_dev)389 return -ENODEV;390 391 pm_runtime_get_sync(tll_dev);392 393 spin_lock(&tll_lock);394 tll = dev_get_drvdata(tll_dev);395 396 for (i = 0; i < tll->nch; i++) {397 if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {398 int r;399 400 if (IS_ERR(tll->ch_clk[i]))401 continue;402 403 r = clk_enable(tll->ch_clk[i]);404 if (r) {405 dev_err(tll_dev,406 "Error enabling ch %d clock: %d\n", i, r);407 }408 }409 }410 411 spin_unlock(&tll_lock);412 413 return 0;414}415EXPORT_SYMBOL_GPL(omap_tll_enable);416 417int omap_tll_disable(struct usbhs_omap_platform_data *pdata)418{419 int i;420 struct usbtll_omap *tll;421 422 if (!tll_dev)423 return -ENODEV;424 425 spin_lock(&tll_lock);426 tll = dev_get_drvdata(tll_dev);427 428 for (i = 0; i < tll->nch; i++) {429 if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {430 if (!IS_ERR(tll->ch_clk[i]))431 clk_disable(tll->ch_clk[i]);432 }433 }434 435 spin_unlock(&tll_lock);436 pm_runtime_put_sync(tll_dev);437 438 return 0;439}440EXPORT_SYMBOL_GPL(omap_tll_disable);441 442MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");443MODULE_AUTHOR("Roger Quadros <rogerq@ti.com>");444MODULE_DESCRIPTION("usb tll driver for TI OMAP EHCI and OHCI controllers");445 446static int __init omap_usbtll_drvinit(void)447{448 return platform_driver_register(&usbtll_omap_driver);449}450 451/*452 * init before usbhs core driver;453 * The usbtll driver should be initialized before454 * the usbhs core driver probe function is called.455 */456fs_initcall(omap_usbtll_drvinit);457 458static void __exit omap_usbtll_drvexit(void)459{460 platform_driver_unregister(&usbtll_omap_driver);461}462module_exit(omap_usbtll_drvexit);463