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1// SPDX-License-Identifier: GPL-2.02/*3 * Driver for the MMC / SD / SDIO IP found in:4 *5 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs6 *7 * Copyright (C) 2015-19 Renesas Electronics Corporation8 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang9 * Copyright (C) 2017 Horms Solutions, Simon Horman10 * Copyright (C) 2011 Guennadi Liakhovetski11 * Copyright (C) 2007 Ian Molton12 * Copyright (C) 2004 Ian Molton13 *14 * This driver draws mainly on scattered spec sheets, Reverse engineering15 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit16 * support). (Further 4 bit support from a later datasheet).17 *18 * TODO:19 * Investigate using a workqueue for PIO transfers20 * Eliminate FIXMEs21 * Better Power management22 * Handle MMC errors better23 * double buffer support24 *25 */26 27#include <linux/delay.h>28#include <linux/device.h>29#include <linux/dma-mapping.h>30#include <linux/highmem.h>31#include <linux/interrupt.h>32#include <linux/io.h>33#include <linux/irq.h>34#include <linux/mmc/card.h>35#include <linux/mmc/host.h>36#include <linux/mmc/mmc.h>37#include <linux/mmc/slot-gpio.h>38#include <linux/module.h>39#include <linux/of.h>40#include <linux/pagemap.h>41#include <linux/platform_data/tmio.h>42#include <linux/platform_device.h>43#include <linux/pm_qos.h>44#include <linux/pm_runtime.h>45#include <linux/regulator/consumer.h>46#include <linux/mmc/sdio.h>47#include <linux/scatterlist.h>48#include <linux/sizes.h>49#include <linux/spinlock.h>50#include <linux/workqueue.h>51 52#include "tmio_mmc.h"53 54static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,55 struct mmc_data *data)56{57 if (host->dma_ops)58 host->dma_ops->start(host, data);59}60 61static inline void tmio_mmc_end_dma(struct tmio_mmc_host *host)62{63 if (host->dma_ops && host->dma_ops->end)64 host->dma_ops->end(host);65}66 67static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)68{69 if (host->dma_ops)70 host->dma_ops->enable(host, enable);71}72 73static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,74 struct tmio_mmc_data *pdata)75{76 if (host->dma_ops) {77 host->dma_ops->request(host, pdata);78 } else {79 host->chan_tx = NULL;80 host->chan_rx = NULL;81 }82}83 84static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)85{86 if (host->dma_ops)87 host->dma_ops->release(host);88}89 90static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)91{92 if (host->dma_ops)93 host->dma_ops->abort(host);94}95 96static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)97{98 if (host->dma_ops)99 host->dma_ops->dataend(host);100}101 102void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)103{104 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);105 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);106}107EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);108 109void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)110{111 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);112 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);113}114EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);115 116static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)117{118 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);119}120 121static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)122{123 host->sg_len = data->sg_len;124 host->sg_ptr = data->sg;125 host->sg_orig = data->sg;126 host->sg_off = 0;127}128 129static int tmio_mmc_next_sg(struct tmio_mmc_host *host)130{131 host->sg_ptr = sg_next(host->sg_ptr);132 host->sg_off = 0;133 return --host->sg_len;134}135 136#define CMDREQ_TIMEOUT 5000137 138static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)139{140 struct tmio_mmc_host *host = mmc_priv(mmc);141 142 if (enable && !host->sdio_irq_enabled) {143 u16 sdio_status;144 145 /* Keep device active while SDIO irq is enabled */146 pm_runtime_get_sync(mmc_dev(mmc));147 148 host->sdio_irq_enabled = true;149 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;150 151 /* Clear obsolete interrupts before enabling */152 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;153 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)154 sdio_status |= TMIO_SDIO_SETBITS_MASK;155 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);156 157 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);158 } else if (!enable && host->sdio_irq_enabled) {159 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;160 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);161 162 host->sdio_irq_enabled = false;163 pm_runtime_mark_last_busy(mmc_dev(mmc));164 pm_runtime_put_autosuspend(mmc_dev(mmc));165 }166}167 168static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,169 unsigned char bus_width)170{171 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)172 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);173 174 /* reg now applies to MMC_BUS_WIDTH_4 */175 if (bus_width == MMC_BUS_WIDTH_1)176 reg |= CARD_OPT_WIDTH;177 else if (bus_width == MMC_BUS_WIDTH_8)178 reg |= CARD_OPT_WIDTH8;179 180 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);181}182 183static void tmio_mmc_reset(struct tmio_mmc_host *host, bool preserve)184{185 u16 card_opt, clk_ctrl, sdif_mode;186 187 if (preserve) {188 card_opt = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);189 clk_ctrl = sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL);190 if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)191 sdif_mode = sd_ctrl_read16(host, CTL_SDIF_MODE);192 }193 194 /* FIXME - should we set stop clock reg here */195 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);196 usleep_range(10000, 11000);197 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);198 usleep_range(10000, 11000);199 200 tmio_mmc_abort_dma(host);201 202 if (host->reset)203 host->reset(host, preserve);204 205 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask_all);206 host->sdcard_irq_mask = host->sdcard_irq_mask_all;207 208 if (host->native_hotplug)209 tmio_mmc_enable_mmc_irqs(host,210 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);211 212 tmio_mmc_set_bus_width(host, host->mmc->ios.bus_width);213 214 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {215 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);216 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);217 }218 219 if (preserve) {220 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, card_opt);221 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk_ctrl);222 if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)223 sd_ctrl_write16(host, CTL_SDIF_MODE, sdif_mode);224 }225 226 if (host->mmc->card)227 mmc_retune_needed(host->mmc);228}229 230static void tmio_mmc_reset_work(struct work_struct *work)231{232 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,233 delayed_reset_work.work);234 struct mmc_request *mrq;235 unsigned long flags;236 237 spin_lock_irqsave(&host->lock, flags);238 mrq = host->mrq;239 240 /*241 * is request already finished? Since we use a non-blocking242 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts243 * us, so, have to check for IS_ERR(host->mrq)244 */245 if (IS_ERR_OR_NULL(mrq) ||246 time_is_after_jiffies(host->last_req_ts +247 msecs_to_jiffies(CMDREQ_TIMEOUT))) {248 spin_unlock_irqrestore(&host->lock, flags);249 return;250 }251 252 dev_warn(&host->pdev->dev,253 "timeout waiting for hardware interrupt (CMD%u)\n",254 mrq->cmd->opcode);255 256 if (host->data)257 host->data->error = -ETIMEDOUT;258 else if (host->cmd)259 host->cmd->error = -ETIMEDOUT;260 else261 mrq->cmd->error = -ETIMEDOUT;262 263 /* No new calls yet, but disallow concurrent tmio_mmc_done_work() */264 host->mrq = ERR_PTR(-EBUSY);265 host->cmd = NULL;266 host->data = NULL;267 268 spin_unlock_irqrestore(&host->lock, flags);269 270 tmio_mmc_reset(host, true);271 272 /* Ready for new calls */273 host->mrq = NULL;274 mmc_request_done(host->mmc, mrq);275}276 277/* These are the bitmasks the tmio chip requires to implement the MMC response278 * types. Note that R1 and R6 are the same in this scheme. */279#define APP_CMD 0x0040280#define RESP_NONE 0x0300281#define RESP_R1 0x0400282#define RESP_R1B 0x0500283#define RESP_R2 0x0600284#define RESP_R3 0x0700285#define DATA_PRESENT 0x0800286#define TRANSFER_READ 0x1000287#define TRANSFER_MULTI 0x2000288#define SECURITY_CMD 0x4000289#define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */290 291static int tmio_mmc_start_command(struct tmio_mmc_host *host,292 struct mmc_command *cmd)293{294 struct mmc_data *data = host->data;295 int c = cmd->opcode;296 297 switch (mmc_resp_type(cmd)) {298 case MMC_RSP_NONE: c |= RESP_NONE; break;299 case MMC_RSP_R1:300 case MMC_RSP_R1_NO_CRC:301 c |= RESP_R1; break;302 case MMC_RSP_R1B: c |= RESP_R1B; break;303 case MMC_RSP_R2: c |= RESP_R2; break;304 case MMC_RSP_R3: c |= RESP_R3; break;305 default:306 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));307 return -EINVAL;308 }309 310 host->cmd = cmd;311 312/* FIXME - this seems to be ok commented out but the spec suggest this bit313 * should be set when issuing app commands.314 * if(cmd->flags & MMC_FLAG_ACMD)315 * c |= APP_CMD;316 */317 if (data) {318 c |= DATA_PRESENT;319 if (data->blocks > 1) {320 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);321 c |= TRANSFER_MULTI;322 323 /*324 * Disable auto CMD12 at IO_RW_EXTENDED and325 * SET_BLOCK_COUNT when doing multiple block transfer326 */327 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&328 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))329 c |= NO_CMD12_ISSUE;330 }331 if (data->flags & MMC_DATA_READ)332 c |= TRANSFER_READ;333 }334 335 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);336 337 /* Fire off the command */338 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);339 sd_ctrl_write16(host, CTL_SD_CMD, c);340 341 return 0;342}343 344static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,345 unsigned short *buf,346 unsigned int count)347{348 int is_read = host->data->flags & MMC_DATA_READ;349 u8 *buf8;350 351 /*352 * Transfer the data353 */354 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {355 u32 data = 0;356 u32 *buf32 = (u32 *)buf;357 358 if (is_read)359 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,360 count >> 2);361 else362 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,363 count >> 2);364 365 /* if count was multiple of 4 */366 if (!(count & 0x3))367 return;368 369 buf32 += count >> 2;370 count %= 4;371 372 if (is_read) {373 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);374 memcpy(buf32, &data, count);375 } else {376 memcpy(&data, buf32, count);377 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);378 }379 380 return;381 }382 383 if (is_read)384 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);385 else386 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);387 388 /* if count was even number */389 if (!(count & 0x1))390 return;391 392 /* if count was odd number */393 buf8 = (u8 *)(buf + (count >> 1));394 395 /*396 * FIXME397 *398 * driver and this function are assuming that399 * it is used as little endian400 */401 if (is_read)402 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;403 else404 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);405}406 407/*408 * This chip always returns (at least?) as much data as you ask for.409 * I'm unsure what happens if you ask for less than a block. This should be410 * looked into to ensure that a funny length read doesn't hose the controller.411 */412static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)413{414 struct mmc_data *data = host->data;415 void *sg_virt;416 unsigned short *buf;417 unsigned int count;418 419 if (host->dma_on) {420 pr_err("PIO IRQ in DMA mode!\n");421 return;422 } else if (!data) {423 pr_debug("Spurious PIO IRQ\n");424 return;425 }426 427 sg_virt = kmap_local_page(sg_page(host->sg_ptr));428 buf = (unsigned short *)(sg_virt + host->sg_ptr->offset + host->sg_off);429 430 count = host->sg_ptr->length - host->sg_off;431 if (count > data->blksz)432 count = data->blksz;433 434 pr_debug("count: %08x offset: %08x flags %08x\n",435 count, host->sg_off, data->flags);436 437 /* Transfer the data */438 tmio_mmc_transfer_data(host, buf, count);439 440 host->sg_off += count;441 442 kunmap_local(sg_virt);443 444 if (host->sg_off == host->sg_ptr->length)445 tmio_mmc_next_sg(host);446}447 448static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)449{450 if (host->sg_ptr == &host->bounce_sg) {451 void *sg_virt = kmap_local_page(sg_page(host->sg_orig));452 453 memcpy(sg_virt + host->sg_orig->offset, host->bounce_buf,454 host->bounce_sg.length);455 kunmap_local(sg_virt);456 }457}458 459/* needs to be called with host->lock held */460void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)461{462 struct mmc_data *data = host->data;463 struct mmc_command *stop;464 465 host->data = NULL;466 467 if (!data) {468 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");469 return;470 }471 stop = data->stop;472 473 /* FIXME - return correct transfer count on errors */474 if (!data->error)475 data->bytes_xfered = data->blocks * data->blksz;476 else477 data->bytes_xfered = 0;478 479 pr_debug("Completed data request\n");480 481 /*482 * FIXME: other drivers allow an optional stop command of any given type483 * which we dont do, as the chip can auto generate them.484 * Perhaps we can be smarter about when to use auto CMD12 and485 * only issue the auto request when we know this is the desired486 * stop command, allowing fallback to the stop command the487 * upper layers expect. For now, we do what works.488 */489 490 if (data->flags & MMC_DATA_READ) {491 if (host->dma_on)492 tmio_mmc_check_bounce_buffer(host);493 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",494 host->mrq);495 } else {496 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",497 host->mrq);498 }499 500 if (stop && !host->mrq->sbc) {501 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)502 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",503 stop->opcode, stop->arg);504 505 /* fill in response from auto CMD12 */506 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);507 508 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);509 }510 511 schedule_work(&host->done);512}513EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);514 515static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)516{517 struct mmc_data *data;518 519 spin_lock(&host->lock);520 data = host->data;521 522 if (!data)523 goto out;524 525 if (stat & TMIO_STAT_DATATIMEOUT)526 data->error = -ETIMEDOUT;527 else if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||528 stat & TMIO_STAT_TXUNDERRUN)529 data->error = -EILSEQ;530 if (host->dma_on && (data->flags & MMC_DATA_WRITE)) {531 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);532 bool done = false;533 534 /*535 * Has all data been written out yet? Testing on SuperH showed,536 * that in most cases the first interrupt comes already with the537 * BUSY status bit clear, but on some operations, like mount or538 * in the beginning of a write / sync / umount, there is one539 * DATAEND interrupt with the BUSY bit set, in this cases540 * waiting for one more interrupt fixes the problem.541 */542 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {543 if (status & TMIO_STAT_SCLKDIVEN)544 done = true;545 } else {546 if (!(status & TMIO_STAT_CMD_BUSY))547 done = true;548 }549 550 if (done) {551 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);552 tmio_mmc_dataend_dma(host);553 }554 } else if (host->dma_on && (data->flags & MMC_DATA_READ)) {555 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);556 tmio_mmc_dataend_dma(host);557 } else {558 tmio_mmc_do_data_irq(host);559 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);560 }561out:562 spin_unlock(&host->lock);563}564 565static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)566{567 struct mmc_command *cmd = host->cmd;568 int i, addr;569 570 spin_lock(&host->lock);571 572 if (!host->cmd) {573 pr_debug("Spurious CMD irq\n");574 goto out;575 }576 577 /* This controller is sicker than the PXA one. Not only do we need to578 * drop the top 8 bits of the first response word, we also need to579 * modify the order of the response for short response command types.580 */581 582 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)583 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);584 585 if (cmd->flags & MMC_RSP_136) {586 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);587 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);588 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);589 cmd->resp[3] <<= 8;590 } else if (cmd->flags & MMC_RSP_R3) {591 cmd->resp[0] = cmd->resp[3];592 }593 594 if (stat & TMIO_STAT_CMDTIMEOUT)595 cmd->error = -ETIMEDOUT;596 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||597 stat & TMIO_STAT_STOPBIT_ERR ||598 stat & TMIO_STAT_CMD_IDX_ERR)599 cmd->error = -EILSEQ;600 601 /* If there is data to handle we enable data IRQs here, and602 * we will ultimatley finish the request in the data_end handler.603 * If theres no data or we encountered an error, finish now.604 */605 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {606 if (host->data->flags & MMC_DATA_READ) {607 if (!host->dma_on) {608 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);609 } else {610 tmio_mmc_disable_mmc_irqs(host,611 TMIO_MASK_READOP);612 queue_work(system_bh_wq, &host->dma_issue);613 }614 } else {615 if (!host->dma_on) {616 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);617 } else {618 tmio_mmc_disable_mmc_irqs(host,619 TMIO_MASK_WRITEOP);620 queue_work(system_bh_wq, &host->dma_issue);621 }622 }623 } else {624 schedule_work(&host->done);625 }626 627out:628 spin_unlock(&host->lock);629}630 631static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,632 int ireg, int status)633{634 struct mmc_host *mmc = host->mmc;635 636 /* Card insert / remove attempts */637 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {638 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |639 TMIO_STAT_CARD_REMOVE);640 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||641 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&642 !work_pending(&mmc->detect.work))643 mmc_detect_change(host->mmc, msecs_to_jiffies(100));644 return true;645 }646 647 return false;648}649 650static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,651 int status)652{653 /* Command completion */654 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {655 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |656 TMIO_STAT_CMDTIMEOUT);657 tmio_mmc_cmd_irq(host, status);658 return true;659 }660 661 /* Data transfer */662 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {663 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);664 tmio_mmc_pio_irq(host);665 return true;666 }667 668 /* Data transfer completion */669 if (ireg & TMIO_STAT_DATAEND) {670 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);671 tmio_mmc_data_irq(host, status);672 return true;673 }674 675 if (host->dma_ops && host->dma_ops->dma_irq && host->dma_ops->dma_irq(host))676 return true;677 678 return false;679}680 681static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)682{683 struct mmc_host *mmc = host->mmc;684 struct tmio_mmc_data *pdata = host->pdata;685 unsigned int ireg, status;686 unsigned int sdio_status;687 688 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))689 return false;690 691 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);692 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;693 694 sdio_status = status & ~TMIO_SDIO_MASK_ALL;695 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)696 sdio_status |= TMIO_SDIO_SETBITS_MASK;697 698 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);699 700 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)701 mmc_signal_sdio_irq(mmc);702 703 return ireg;704}705 706irqreturn_t tmio_mmc_irq(int irq, void *devid)707{708 struct tmio_mmc_host *host = devid;709 unsigned int ireg, status;710 711 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);712 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;713 714 /* Clear the status except the interrupt status */715 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);716 717 if (__tmio_mmc_card_detect_irq(host, ireg, status))718 return IRQ_HANDLED;719 if (__tmio_mmc_sdcard_irq(host, ireg, status))720 return IRQ_HANDLED;721 722 if (__tmio_mmc_sdio_irq(host))723 return IRQ_HANDLED;724 725 return IRQ_NONE;726}727EXPORT_SYMBOL_GPL(tmio_mmc_irq);728 729static int tmio_mmc_start_data(struct tmio_mmc_host *host,730 struct mmc_data *data)731{732 struct tmio_mmc_data *pdata = host->pdata;733 734 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",735 data->blksz, data->blocks);736 737 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */738 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||739 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {740 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;741 742 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {743 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",744 mmc_hostname(host->mmc), data->blksz);745 return -EINVAL;746 }747 }748 749 tmio_mmc_init_sg(host, data);750 host->data = data;751 host->dma_on = false;752 753 /* Set transfer length / blocksize */754 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);755 if (host->mmc->max_blk_count >= SZ_64K)756 sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks);757 else758 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);759 760 tmio_mmc_start_dma(host, data);761 762 return 0;763}764 765static void tmio_process_mrq(struct tmio_mmc_host *host,766 struct mmc_request *mrq)767{768 struct mmc_command *cmd;769 int ret;770 771 if (mrq->sbc && host->cmd != mrq->sbc) {772 cmd = mrq->sbc;773 } else {774 cmd = mrq->cmd;775 if (mrq->data) {776 ret = tmio_mmc_start_data(host, mrq->data);777 if (ret)778 goto fail;779 }780 }781 782 ret = tmio_mmc_start_command(host, cmd);783 if (ret)784 goto fail;785 786 schedule_delayed_work(&host->delayed_reset_work,787 msecs_to_jiffies(CMDREQ_TIMEOUT));788 return;789 790fail:791 host->mrq = NULL;792 mrq->cmd->error = ret;793 mmc_request_done(host->mmc, mrq);794}795 796/* Process requests from the MMC layer */797static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)798{799 struct tmio_mmc_host *host = mmc_priv(mmc);800 unsigned long flags;801 802 spin_lock_irqsave(&host->lock, flags);803 804 if (host->mrq) {805 pr_debug("request not null\n");806 if (IS_ERR(host->mrq)) {807 spin_unlock_irqrestore(&host->lock, flags);808 mrq->cmd->error = -EAGAIN;809 mmc_request_done(mmc, mrq);810 return;811 }812 }813 814 host->last_req_ts = jiffies;815 wmb();816 host->mrq = mrq;817 818 spin_unlock_irqrestore(&host->lock, flags);819 820 tmio_process_mrq(host, mrq);821}822 823static void tmio_mmc_finish_request(struct tmio_mmc_host *host)824{825 struct mmc_request *mrq;826 unsigned long flags;827 828 spin_lock_irqsave(&host->lock, flags);829 830 tmio_mmc_end_dma(host);831 832 mrq = host->mrq;833 if (IS_ERR_OR_NULL(mrq)) {834 spin_unlock_irqrestore(&host->lock, flags);835 return;836 }837 838 /* If not SET_BLOCK_COUNT, clear old data */839 if (host->cmd != mrq->sbc) {840 host->cmd = NULL;841 host->data = NULL;842 host->mrq = NULL;843 }844 845 cancel_delayed_work(&host->delayed_reset_work);846 847 spin_unlock_irqrestore(&host->lock, flags);848 849 if (mrq->cmd->error || (mrq->data && mrq->data->error)) {850 tmio_mmc_ack_mmc_irqs(host, TMIO_MASK_IRQ); /* Clear all */851 tmio_mmc_abort_dma(host);852 }853 854 /* Error means retune, but executed command was still successful */855 if (host->check_retune && host->check_retune(host, mrq))856 mmc_retune_needed(host->mmc);857 858 /* If SET_BLOCK_COUNT, continue with main command */859 if (host->mrq && !mrq->cmd->error) {860 tmio_process_mrq(host, mrq);861 return;862 }863 864 if (host->fixup_request)865 host->fixup_request(host, mrq);866 867 mmc_request_done(host->mmc, mrq);868}869 870static void tmio_mmc_done_work(struct work_struct *work)871{872 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,873 done);874 tmio_mmc_finish_request(host);875}876 877static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)878{879 struct mmc_host *mmc = host->mmc;880 int ret = 0;881 882 /* .set_ios() is returning void, so, no chance to report an error */883 884 if (!IS_ERR(mmc->supply.vmmc)) {885 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);886 /*887 * Attention: empiric value. With a b43 WiFi SDIO card this888 * delay proved necessary for reliable card-insertion probing.889 * 100us were not enough. Is this the same 140us delay, as in890 * tmio_mmc_set_ios()?891 */892 usleep_range(200, 300);893 }894 /*895 * It seems, VccQ should be switched on after Vcc, this is also what the896 * omap_hsmmc.c driver does.897 */898 if (!ret) {899 ret = mmc_regulator_enable_vqmmc(mmc);900 usleep_range(200, 300);901 }902 903 if (ret < 0)904 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",905 ret);906}907 908static void tmio_mmc_power_off(struct tmio_mmc_host *host)909{910 struct mmc_host *mmc = host->mmc;911 912 mmc_regulator_disable_vqmmc(mmc);913 914 if (!IS_ERR(mmc->supply.vmmc))915 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);916}917 918static unsigned int tmio_mmc_get_timeout_cycles(struct tmio_mmc_host *host)919{920 u16 val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);921 922 val = (val & CARD_OPT_TOP_MASK) >> CARD_OPT_TOP_SHIFT;923 return 1 << (13 + val);924}925 926static void tmio_mmc_max_busy_timeout(struct tmio_mmc_host *host)927{928 unsigned int clk_rate = host->mmc->actual_clock ?: host->mmc->f_max;929 930 host->mmc->max_busy_timeout = host->get_timeout_cycles(host) /931 (clk_rate / MSEC_PER_SEC);932}933 934/* Set MMC clock / power.935 * Note: This controller uses a simple divider scheme therefore it cannot936 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as937 * MMC wont run that fast, it has to be clocked at 12MHz which is the next938 * slowest setting.939 */940static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)941{942 struct tmio_mmc_host *host = mmc_priv(mmc);943 struct device *dev = &host->pdev->dev;944 unsigned long flags;945 946 mutex_lock(&host->ios_lock);947 948 spin_lock_irqsave(&host->lock, flags);949 if (host->mrq) {950 if (IS_ERR(host->mrq)) {951 dev_dbg(dev,952 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",953 current->comm, task_pid_nr(current),954 ios->clock, ios->power_mode);955 host->mrq = ERR_PTR(-EINTR);956 } else {957 dev_dbg(dev,958 "%s.%d: CMD%u active since %lu, now %lu!\n",959 current->comm, task_pid_nr(current),960 host->mrq->cmd->opcode, host->last_req_ts,961 jiffies);962 }963 spin_unlock_irqrestore(&host->lock, flags);964 965 mutex_unlock(&host->ios_lock);966 return;967 }968 969 /* Disallow new mrqs and work handlers to run */970 host->mrq = ERR_PTR(-EBUSY);971 972 spin_unlock_irqrestore(&host->lock, flags);973 974 switch (ios->power_mode) {975 case MMC_POWER_OFF:976 tmio_mmc_power_off(host);977 /* For R-Car Gen2+, we need to reset SDHI specific SCC */978 if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)979 tmio_mmc_reset(host, false);980 981 host->set_clock(host, 0);982 break;983 case MMC_POWER_UP:984 tmio_mmc_power_on(host, ios->vdd);985 host->set_clock(host, ios->clock);986 tmio_mmc_set_bus_width(host, ios->bus_width);987 break;988 case MMC_POWER_ON:989 host->set_clock(host, ios->clock);990 tmio_mmc_set_bus_width(host, ios->bus_width);991 break;992 }993 994 if (host->pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT)995 tmio_mmc_max_busy_timeout(host);996 997 /* Let things settle. delay taken from winCE driver */998 usleep_range(140, 200);999 if (PTR_ERR(host->mrq) == -EINTR)1000 dev_dbg(&host->pdev->dev,1001 "%s.%d: IOS interrupted: clk %u, mode %u",1002 current->comm, task_pid_nr(current),1003 ios->clock, ios->power_mode);1004 1005 /* Ready for new mrqs */1006 host->mrq = NULL;1007 host->clk_cache = ios->clock;1008 1009 mutex_unlock(&host->ios_lock);1010}1011 1012static int tmio_mmc_get_ro(struct mmc_host *mmc)1013{1014 struct tmio_mmc_host *host = mmc_priv(mmc);1015 1016 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &1017 TMIO_STAT_WRPROTECT);1018}1019 1020static int tmio_mmc_get_cd(struct mmc_host *mmc)1021{1022 struct tmio_mmc_host *host = mmc_priv(mmc);1023 1024 return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &1025 TMIO_STAT_SIGSTATE);1026}1027 1028static int tmio_multi_io_quirk(struct mmc_card *card,1029 unsigned int direction, int blk_size)1030{1031 struct tmio_mmc_host *host = mmc_priv(card->host);1032 1033 if (host->multi_io_quirk)1034 return host->multi_io_quirk(card, direction, blk_size);1035 1036 return blk_size;1037}1038 1039static struct mmc_host_ops tmio_mmc_ops = {1040 .request = tmio_mmc_request,1041 .set_ios = tmio_mmc_set_ios,1042 .get_ro = tmio_mmc_get_ro,1043 .get_cd = tmio_mmc_get_cd,1044 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,1045 .multi_io_quirk = tmio_multi_io_quirk,1046};1047 1048static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)1049{1050 struct tmio_mmc_data *pdata = host->pdata;1051 struct mmc_host *mmc = host->mmc;1052 int err;1053 1054 err = mmc_regulator_get_supply(mmc);1055 if (err)1056 return err;1057 1058 /* use ocr_mask if no regulator */1059 if (!mmc->ocr_avail)1060 mmc->ocr_avail = pdata->ocr_mask;1061 1062 /*1063 * try again.1064 * There is possibility that regulator has not been probed1065 */1066 if (!mmc->ocr_avail)1067 return -EPROBE_DEFER;1068 1069 return 0;1070}1071 1072static void tmio_mmc_of_parse(struct platform_device *pdev,1073 struct mmc_host *mmc)1074{1075 const struct device_node *np = pdev->dev.of_node;1076 1077 if (!np)1078 return;1079 1080 /*1081 * DEPRECATED:1082 * For new platforms, please use "disable-wp" instead of1083 * "toshiba,mmc-wrprotect-disable"1084 */1085 if (of_property_read_bool(np, "toshiba,mmc-wrprotect-disable"))1086 mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;1087}1088 1089struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,1090 struct tmio_mmc_data *pdata)1091{1092 struct tmio_mmc_host *host;1093 struct mmc_host *mmc;1094 void __iomem *ctl;1095 int ret;1096 1097 ctl = devm_platform_ioremap_resource(pdev, 0);1098 if (IS_ERR(ctl))1099 return ERR_CAST(ctl);1100 1101 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);1102 if (!mmc)1103 return ERR_PTR(-ENOMEM);1104 1105 host = mmc_priv(mmc);1106 host->ctl = ctl;1107 host->mmc = mmc;1108 host->pdev = pdev;1109 host->pdata = pdata;1110 host->ops = tmio_mmc_ops;1111 mmc->ops = &host->ops;1112 1113 ret = mmc_of_parse(host->mmc);1114 if (ret) {1115 host = ERR_PTR(ret);1116 goto free;1117 }1118 1119 tmio_mmc_of_parse(pdev, mmc);1120 1121 platform_set_drvdata(pdev, host);1122 1123 return host;1124free:1125 mmc_free_host(mmc);1126 1127 return host;1128}1129EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);1130 1131void tmio_mmc_host_free(struct tmio_mmc_host *host)1132{1133 mmc_free_host(host->mmc);1134}1135EXPORT_SYMBOL_GPL(tmio_mmc_host_free);1136 1137int tmio_mmc_host_probe(struct tmio_mmc_host *_host)1138{1139 struct platform_device *pdev = _host->pdev;1140 struct tmio_mmc_data *pdata = _host->pdata;1141 struct mmc_host *mmc = _host->mmc;1142 int ret;1143 1144 /*1145 * Check the sanity of mmc->f_min to prevent host->set_clock() from1146 * looping forever...1147 */1148 if (mmc->f_min == 0)1149 return -EINVAL;1150 1151 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))1152 _host->write16_hook = NULL;1153 1154 if (pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT && !_host->get_timeout_cycles)1155 _host->get_timeout_cycles = tmio_mmc_get_timeout_cycles;1156 1157 ret = tmio_mmc_init_ocr(_host);1158 if (ret < 0)1159 return ret;1160 1161 /*1162 * Look for a card detect GPIO, if it fails with anything1163 * else than a probe deferral, just live without it.1164 */1165 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0);1166 if (ret == -EPROBE_DEFER)1167 return ret;1168 1169 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;1170 mmc->caps2 |= pdata->capabilities2;1171 mmc->max_segs = pdata->max_segs ? : 32;1172 mmc->max_blk_size = TMIO_MAX_BLK_SIZE;1173 mmc->max_blk_count = pdata->max_blk_count ? :1174 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;1175 mmc->max_req_size = min_t(size_t,1176 mmc->max_blk_size * mmc->max_blk_count,1177 dma_max_mapping_size(&pdev->dev));1178 mmc->max_seg_size = mmc->max_req_size;1179 1180 if (mmc_can_gpio_ro(mmc))1181 _host->ops.get_ro = mmc_gpio_get_ro;1182 1183 if (mmc_can_gpio_cd(mmc))1184 _host->ops.get_cd = mmc_gpio_get_cd;1185 1186 /* must be set before tmio_mmc_reset() */1187 _host->native_hotplug = !(mmc_can_gpio_cd(mmc) ||1188 mmc->caps & MMC_CAP_NEEDS_POLL ||1189 !mmc_card_is_removable(mmc));1190 1191 /*1192 * While using internal tmio hardware logic for card detection, we need1193 * to ensure it stays powered for it to work.1194 */1195 if (_host->native_hotplug)1196 pm_runtime_get_noresume(&pdev->dev);1197 1198 _host->sdio_irq_enabled = false;1199 if (pdata->flags & TMIO_MMC_SDIO_IRQ)1200 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;1201 1202 if (!_host->sdcard_irq_mask_all)1203 _host->sdcard_irq_mask_all = TMIO_MASK_ALL;1204 1205 _host->set_clock(_host, 0);1206 tmio_mmc_reset(_host, false);1207 1208 spin_lock_init(&_host->lock);1209 mutex_init(&_host->ios_lock);1210 1211 /* Init delayed work for request timeouts */1212 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);1213 INIT_WORK(&_host->done, tmio_mmc_done_work);1214 1215 /* See if we also get DMA */1216 tmio_mmc_request_dma(_host, pdata);1217 1218 pm_runtime_get_noresume(&pdev->dev);1219 pm_runtime_set_active(&pdev->dev);1220 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);1221 pm_runtime_use_autosuspend(&pdev->dev);1222 pm_runtime_enable(&pdev->dev);1223 1224 ret = mmc_add_host(mmc);1225 if (ret)1226 goto remove_host;1227 1228 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);1229 pm_runtime_put(&pdev->dev);1230 1231 return 0;1232 1233remove_host:1234 pm_runtime_put_noidle(&pdev->dev);1235 tmio_mmc_host_remove(_host);1236 return ret;1237}1238EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);1239 1240void tmio_mmc_host_remove(struct tmio_mmc_host *host)1241{1242 struct platform_device *pdev = host->pdev;1243 struct mmc_host *mmc = host->mmc;1244 1245 pm_runtime_get_sync(&pdev->dev);1246 1247 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)1248 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);1249 1250 dev_pm_qos_hide_latency_limit(&pdev->dev);1251 1252 mmc_remove_host(mmc);1253 cancel_work_sync(&host->done);1254 cancel_delayed_work_sync(&host->delayed_reset_work);1255 tmio_mmc_release_dma(host);1256 tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all);1257 1258 if (host->native_hotplug)1259 pm_runtime_put_noidle(&pdev->dev);1260 1261 pm_runtime_disable(&pdev->dev);1262 pm_runtime_dont_use_autosuspend(&pdev->dev);1263 pm_runtime_put_noidle(&pdev->dev);1264}1265EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);1266 1267#ifdef CONFIG_PM1268static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)1269{1270 if (!host->clk_enable)1271 return -ENOTSUPP;1272 1273 return host->clk_enable(host);1274}1275 1276static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)1277{1278 if (host->clk_disable)1279 host->clk_disable(host);1280}1281 1282int tmio_mmc_host_runtime_suspend(struct device *dev)1283{1284 struct tmio_mmc_host *host = dev_get_drvdata(dev);1285 1286 tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all);1287 1288 if (host->clk_cache)1289 host->set_clock(host, 0);1290 1291 tmio_mmc_clk_disable(host);1292 1293 return 0;1294}1295EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);1296 1297int tmio_mmc_host_runtime_resume(struct device *dev)1298{1299 struct tmio_mmc_host *host = dev_get_drvdata(dev);1300 1301 tmio_mmc_clk_enable(host);1302 tmio_mmc_reset(host, false);1303 1304 if (host->clk_cache)1305 host->set_clock(host, host->clk_cache);1306 1307 tmio_mmc_enable_dma(host, true);1308 1309 return 0;1310}1311EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);1312#endif1313 1314MODULE_DESCRIPTION("TMIO MMC core driver");1315MODULE_LICENSE("GPL v2");1316