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1# SPDX-License-Identifier: GPL-2.0-only2menu "RAM/ROM/Flash chip drivers"3 depends on MTD!=n4 5config MTD_CFI6 tristate "Detect flash chips by Common Flash Interface (CFI) probe"7 select MTD_GEN_PROBE8 select MTD_CFI_UTIL9 help10 The Common Flash Interface specification was developed by Intel,11 AMD and other flash manufactures that provides a universal method12 for probing the capabilities of flash devices. If you wish to13 support any device that is CFI-compliant, you need to enable this14 option. Visit <https://www.amd.com/products/nvd/overview/cfi.html>15 for more information on CFI.16 17config MTD_JEDECPROBE18 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"19 select MTD_GEN_PROBE20 select MTD_CFI_UTIL21 help22 This option enables JEDEC-style probing of flash chips which are not23 compatible with the Common Flash Interface, but will use the common24 CFI-targeted flash drivers for any chips which are identified which25 are in fact compatible in all but the probe method. This actually26 covers most AMD/Fujitsu-compatible chips and also non-CFI27 Intel chips.28 29config MTD_GEN_PROBE30 tristate31 32config MTD_CFI_ADV_OPTIONS33 bool "Flash chip driver advanced configuration options"34 depends on MTD_GEN_PROBE35 help36 If you need to specify a specific endianness for access to flash37 chips, or if you wish to reduce the size of the kernel by including38 support for only specific arrangements of flash chips, say 'Y'. This39 option does not directly affect the code, but will enable other40 configuration options which allow you to do so.41 42 If unsure, say 'N'.43 44choice45 prompt "Flash cmd/query data swapping"46 depends on MTD_CFI_ADV_OPTIONS47 default MTD_CFI_NOSWAP48 help49 This option defines the way in which the CPU attempts to arrange50 data bits when writing the 'magic' commands to the chips. Saying51 'NO', which is the default when CONFIG_MTD_CFI_ADV_OPTIONS isn't52 enabled, means that the CPU will not do any swapping; the chips53 are expected to be wired to the CPU in 'host-endian' form.54 Specific arrangements are possible with the BIG_ENDIAN_BYTE and55 LITTLE_ENDIAN_BYTE, if the bytes are reversed.56 57config MTD_CFI_NOSWAP58 depends on !ARCH_IXP4XX || CPU_BIG_ENDIAN59 bool "NO"60 61config MTD_CFI_BE_BYTE_SWAP62 bool "BIG_ENDIAN_BYTE"63 64config MTD_CFI_LE_BYTE_SWAP65 depends on !ARCH_IXP4XX66 bool "LITTLE_ENDIAN_BYTE"67 68endchoice69 70config MTD_CFI_GEOMETRY71 bool "Specific CFI Flash geometry selection"72 depends on MTD_CFI_ADV_OPTIONS73 select MTD_MAP_BANK_WIDTH_1 if !(MTD_MAP_BANK_WIDTH_2 || \74 MTD_MAP_BANK_WIDTH_4 || MTD_MAP_BANK_WIDTH_8 || \75 MTD_MAP_BANK_WIDTH_16 || MTD_MAP_BANK_WIDTH_32)76 select MTD_CFI_I1 if !(MTD_CFI_I2 || MTD_CFI_I4 || MTD_CFI_I8)77 help78 This option does not affect the code directly, but will enable79 some other configuration options which would allow you to reduce80 the size of the kernel by including support for only certain81 arrangements of CFI chips. If unsure, say 'N' and all options82 which are supported by the current code will be enabled.83 84config MTD_MAP_BANK_WIDTH_185 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY86 default y87 help88 If you wish to support CFI devices on a physical bus which is89 8 bits wide, say 'Y'.90 91config MTD_MAP_BANK_WIDTH_292 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY93 default y94 help95 If you wish to support CFI devices on a physical bus which is96 16 bits wide, say 'Y'.97 98config MTD_MAP_BANK_WIDTH_499 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY100 default y101 help102 If you wish to support CFI devices on a physical bus which is103 32 bits wide, say 'Y'.104 105config MTD_MAP_BANK_WIDTH_8106 bool "Support 64-bit buswidth" if MTD_CFI_GEOMETRY107 default n108 help109 If you wish to support CFI devices on a physical bus which is110 64 bits wide, say 'Y'.111 112config MTD_MAP_BANK_WIDTH_16113 bool "Support 128-bit buswidth" if MTD_CFI_GEOMETRY114 default n115 help116 If you wish to support CFI devices on a physical bus which is117 128 bits wide, say 'Y'.118 119config MTD_MAP_BANK_WIDTH_32120 bool "Support 256-bit buswidth" if MTD_CFI_GEOMETRY121 select MTD_COMPLEX_MAPPINGS if HAS_IOMEM122 default n123 help124 If you wish to support CFI devices on a physical bus which is125 256 bits wide, say 'Y'.126 127config MTD_CFI_I1128 bool "Support 1-chip flash interleave" if MTD_CFI_GEOMETRY129 default y130 help131 If your flash chips are not interleaved - i.e. you only have one132 flash chip addressed by each bus cycle, then say 'Y'.133 134config MTD_CFI_I2135 bool "Support 2-chip flash interleave" if MTD_CFI_GEOMETRY136 default y137 help138 If your flash chips are interleaved in pairs - i.e. you have two139 flash chips addressed by each bus cycle, then say 'Y'.140 141config MTD_CFI_I4142 bool "Support 4-chip flash interleave" if MTD_CFI_GEOMETRY143 default n144 help145 If your flash chips are interleaved in fours - i.e. you have four146 flash chips addressed by each bus cycle, then say 'Y'.147 148config MTD_CFI_I8149 bool "Support 8-chip flash interleave" if MTD_CFI_GEOMETRY150 default n151 help152 If your flash chips are interleaved in eights - i.e. you have eight153 flash chips addressed by each bus cycle, then say 'Y'.154 155config MTD_OTP156 bool "Protection Registers aka one-time programmable (OTP) bits"157 depends on MTD_CFI_ADV_OPTIONS158 default n159 help160 This enables support for reading, writing and locking so called161 "Protection Registers" present on some flash chips.162 A subset of them are pre-programmed at the factory with a163 unique set of values. The rest is user-programmable.164 165 The user-programmable Protection Registers contain one-time166 programmable (OTP) bits; when programmed, register bits cannot be167 erased. Each Protection Register can be accessed multiple times to168 program individual bits, as long as the register remains unlocked.169 170 Each Protection Register has an associated Lock Register bit. When a171 Lock Register bit is programmed, the associated Protection Register172 can only be read; it can no longer be programmed. Additionally,173 because the Lock Register bits themselves are OTP, when programmed,174 Lock Register bits cannot be erased. Therefore, when a Protection175 Register is locked, it cannot be unlocked.176 177 This feature should therefore be used with extreme care. Any mistake178 in the programming of OTP bits will waste them.179 180config MTD_CFI_INTELEXT181 tristate "Support for CFI command set 0001 (Intel/Sharp chips)"182 depends on MTD_GEN_PROBE183 select MTD_CFI_UTIL184 help185 The Common Flash Interface defines a number of different command186 sets which a CFI-compliant chip may claim to implement. This code187 provides support for command set 0001, used on Intel StrataFlash188 and other parts.189 190config MTD_CFI_AMDSTD191 tristate "Support for CFI command set 0002 (AMD/Fujitsu/Spansion chips)"192 depends on MTD_GEN_PROBE193 select MTD_CFI_UTIL194 help195 The Common Flash Interface defines a number of different command196 sets which a CFI-compliant chip may claim to implement. This code197 provides support for command set 0002, used on chips including198 the AMD Am29LV320.199 200config MTD_CFI_STAA201 tristate "Support for CFI command set 0020 (ST (Advanced Architecture) chips)"202 depends on MTD_GEN_PROBE203 select MTD_CFI_UTIL204 help205 The Common Flash Interface defines a number of different command206 sets which a CFI-compliant chip may claim to implement. This code207 provides support for command set 0020.208 209config MTD_CFI_UTIL210 tristate211 212config MTD_RAM213 tristate "Support for RAM chips in bus mapping"214 help215 This option enables basic support for RAM chips accessed through216 a bus mapping driver.217 218config MTD_ROM219 tristate "Support for ROM chips in bus mapping"220 help221 This option enables basic support for ROM chips accessed through222 a bus mapping driver.223 224config MTD_ABSENT225 tristate "Support for absent chips in bus mapping"226 help227 This option enables support for a dummy probing driver used to228 allocated placeholder MTD devices on systems that have socketed229 or removable media. Use of this driver as a fallback chip probe230 preserves the expected registration order of MTD device nodes on231 the system regardless of media presence. Device nodes created232 with this driver will return -ENODEV upon access.233 234config MTD_XIP235 bool "XIP aware MTD support"236 depends on !SMP && (MTD_CFI_INTELEXT || MTD_CFI_AMDSTD) && ARCH_MTD_XIP237 default y if XIP_KERNEL238 help239 This allows MTD support to work with flash memory which is also240 used for XIP purposes. If you're not sure what this is all about241 then say N.242 243endmenu244