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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * ichxrom.c4 *5 * Normal mappings of chips in physical memory6 */7 8#include <linux/module.h>9#include <linux/types.h>10#include <linux/kernel.h>11#include <linux/init.h>12#include <linux/slab.h>13#include <asm/io.h>14#include <linux/mtd/mtd.h>15#include <linux/mtd/map.h>16#include <linux/mtd/cfi.h>17#include <linux/mtd/flashchip.h>18#include <linux/pci.h>19#include <linux/pci_ids.h>20#include <linux/list.h>21 22#define xstr(s) str(s)23#define str(s) #s24#define MOD_NAME xstr(KBUILD_BASENAME)25 26#define ADDRESS_NAME_LEN 1827 28#define ROM_PROBE_STEP_SIZE (64*1024) /* 64KiB */29 30#define BIOS_CNTL 0x4e31#define FWH_DEC_EN1 0xE332#define FWH_DEC_EN2 0xF033#define FWH_SEL1 0xE834#define FWH_SEL2 0xEE35 36struct ichxrom_window {37 void __iomem* virt;38 unsigned long phys;39 unsigned long size;40 struct list_head maps;41 struct resource rsrc;42 struct pci_dev *pdev;43};44 45struct ichxrom_map_info {46 struct list_head list;47 struct map_info map;48 struct mtd_info *mtd;49 struct resource rsrc;50 char map_name[sizeof(MOD_NAME) + 2 + ADDRESS_NAME_LEN];51};52 53static struct ichxrom_window ichxrom_window = {54 .maps = LIST_HEAD_INIT(ichxrom_window.maps),55};56 57static void ichxrom_cleanup(struct ichxrom_window *window)58{59 struct ichxrom_map_info *map, *scratch;60 u16 word;61 int ret;62 63 /* Disable writes through the rom window */64 ret = pci_read_config_word(window->pdev, BIOS_CNTL, &word);65 if (!ret)66 pci_write_config_word(window->pdev, BIOS_CNTL, word & ~1);67 pci_dev_put(window->pdev);68 69 /* Free all of the mtd devices */70 list_for_each_entry_safe(map, scratch, &window->maps, list) {71 if (map->rsrc.parent)72 release_resource(&map->rsrc);73 mtd_device_unregister(map->mtd);74 map_destroy(map->mtd);75 list_del(&map->list);76 kfree(map);77 }78 if (window->rsrc.parent)79 release_resource(&window->rsrc);80 if (window->virt) {81 iounmap(window->virt);82 window->virt = NULL;83 window->phys = 0;84 window->size = 0;85 window->pdev = NULL;86 }87}88 89 90static int __init ichxrom_init_one(struct pci_dev *pdev,91 const struct pci_device_id *ent)92{93 static char *rom_probe_types[] = { "cfi_probe", "jedec_probe", NULL };94 struct ichxrom_window *window = &ichxrom_window;95 struct ichxrom_map_info *map = NULL;96 unsigned long map_top;97 u8 byte;98 u16 word;99 100 /* For now I just handle the ichx and I assume there101 * are not a lot of resources up at the top of the address102 * space. It is possible to handle other devices in the103 * top 16MB but it is very painful. Also since104 * you can only really attach a FWH to an ICHX there105 * a number of simplifications you can make.106 *107 * Also you can page firmware hubs if an 8MB window isn't enough108 * but don't currently handle that case either.109 */110 window->pdev = pdev;111 112 /* Find a region continuous to the end of the ROM window */113 window->phys = 0;114 pci_read_config_byte(pdev, FWH_DEC_EN1, &byte);115 if (byte == 0xff) {116 window->phys = 0xffc00000;117 pci_read_config_byte(pdev, FWH_DEC_EN2, &byte);118 if ((byte & 0x0f) == 0x0f) {119 window->phys = 0xff400000;120 }121 else if ((byte & 0x0e) == 0x0e) {122 window->phys = 0xff500000;123 }124 else if ((byte & 0x0c) == 0x0c) {125 window->phys = 0xff600000;126 }127 else if ((byte & 0x08) == 0x08) {128 window->phys = 0xff700000;129 }130 }131 else if ((byte & 0xfe) == 0xfe) {132 window->phys = 0xffc80000;133 }134 else if ((byte & 0xfc) == 0xfc) {135 window->phys = 0xffd00000;136 }137 else if ((byte & 0xf8) == 0xf8) {138 window->phys = 0xffd80000;139 }140 else if ((byte & 0xf0) == 0xf0) {141 window->phys = 0xffe00000;142 }143 else if ((byte & 0xe0) == 0xe0) {144 window->phys = 0xffe80000;145 }146 else if ((byte & 0xc0) == 0xc0) {147 window->phys = 0xfff00000;148 }149 else if ((byte & 0x80) == 0x80) {150 window->phys = 0xfff80000;151 }152 153 if (window->phys == 0) {154 printk(KERN_ERR MOD_NAME ": Rom window is closed\n");155 goto out;156 }157 window->phys -= 0x400000UL;158 window->size = (0xffffffffUL - window->phys) + 1UL;159 160 /* Enable writes through the rom window */161 pci_read_config_word(pdev, BIOS_CNTL, &word);162 if (!(word & 1) && (word & (1<<1))) {163 /* The BIOS will generate an error if I enable164 * this device, so don't even try.165 */166 printk(KERN_ERR MOD_NAME ": firmware access control, I can't enable writes\n");167 goto out;168 }169 pci_write_config_word(pdev, BIOS_CNTL, word | 1);170 171 /*172 * Try to reserve the window mem region. If this fails then173 * it is likely due to the window being "reserved" by the BIOS.174 */175 window->rsrc.name = MOD_NAME;176 window->rsrc.start = window->phys;177 window->rsrc.end = window->phys + window->size - 1;178 window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;179 if (request_resource(&iomem_resource, &window->rsrc)) {180 window->rsrc.parent = NULL;181 printk(KERN_DEBUG MOD_NAME ": "182 "%s(): Unable to register resource %pR - kernel bug?\n",183 __func__, &window->rsrc);184 }185 186 /* Map the firmware hub into my address space. */187 window->virt = ioremap(window->phys, window->size);188 if (!window->virt) {189 printk(KERN_ERR MOD_NAME ": ioremap(%08lx, %08lx) failed\n",190 window->phys, window->size);191 goto out;192 }193 194 /* Get the first address to look for an rom chip at */195 map_top = window->phys;196 if ((window->phys & 0x3fffff) != 0) {197 map_top = window->phys + 0x400000;198 }199#if 1200 /* The probe sequence run over the firmware hub lock201 * registers sets them to 0x7 (no access).202 * Probe at most the last 4M of the address space.203 */204 if (map_top < 0xffc00000) {205 map_top = 0xffc00000;206 }207#endif208 /* Loop through and look for rom chips */209 while((map_top - 1) < 0xffffffffUL) {210 struct cfi_private *cfi;211 unsigned long offset;212 int i;213 214 if (!map) {215 map = kmalloc(sizeof(*map), GFP_KERNEL);216 if (!map)217 goto out;218 }219 memset(map, 0, sizeof(*map));220 INIT_LIST_HEAD(&map->list);221 map->map.name = map->map_name;222 map->map.phys = map_top;223 offset = map_top - window->phys;224 map->map.virt = (void __iomem *)225 (((unsigned long)(window->virt)) + offset);226 map->map.size = 0xffffffffUL - map_top + 1UL;227 /* Set the name of the map to the address I am trying */228 sprintf(map->map_name, "%s @%08Lx",229 MOD_NAME, (unsigned long long)map->map.phys);230 231 /* Firmware hubs only use vpp when being programmed232 * in a factory setting. So in-place programming233 * needs to use a different method.234 */235 for(map->map.bankwidth = 32; map->map.bankwidth;236 map->map.bankwidth >>= 1)237 {238 char **probe_type;239 /* Skip bankwidths that are not supported */240 if (!map_bankwidth_supported(map->map.bankwidth))241 continue;242 243 /* Setup the map methods */244 simple_map_init(&map->map);245 246 /* Try all of the probe methods */247 probe_type = rom_probe_types;248 for(; *probe_type; probe_type++) {249 map->mtd = do_map_probe(*probe_type, &map->map);250 if (map->mtd)251 goto found;252 }253 }254 map_top += ROM_PROBE_STEP_SIZE;255 continue;256 found:257 /* Trim the size if we are larger than the map */258 if (map->mtd->size > map->map.size) {259 printk(KERN_WARNING MOD_NAME260 " rom(%llu) larger than window(%lu). fixing...\n",261 (unsigned long long)map->mtd->size, map->map.size);262 map->mtd->size = map->map.size;263 }264 if (window->rsrc.parent) {265 /*266 * Registering the MTD device in iomem may not be possible267 * if there is a BIOS "reserved" and BUSY range. If this268 * fails then continue anyway.269 */270 map->rsrc.name = map->map_name;271 map->rsrc.start = map->map.phys;272 map->rsrc.end = map->map.phys + map->mtd->size - 1;273 map->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;274 if (request_resource(&window->rsrc, &map->rsrc)) {275 printk(KERN_ERR MOD_NAME276 ": cannot reserve MTD resource\n");277 map->rsrc.parent = NULL;278 }279 }280 281 /* Make the whole region visible in the map */282 map->map.virt = window->virt;283 map->map.phys = window->phys;284 cfi = map->map.fldrv_priv;285 for(i = 0; i < cfi->numchips; i++) {286 cfi->chips[i].start += offset;287 }288 289 /* Now that the mtd devices is complete claim and export it */290 map->mtd->owner = THIS_MODULE;291 if (mtd_device_register(map->mtd, NULL, 0)) {292 map_destroy(map->mtd);293 map->mtd = NULL;294 goto out;295 }296 297 298 /* Calculate the new value of map_top */299 map_top += map->mtd->size;300 301 /* File away the map structure */302 list_add(&map->list, &window->maps);303 map = NULL;304 }305 306 out:307 /* Free any left over map structures */308 kfree(map);309 310 /* See if I have any map structures */311 if (list_empty(&window->maps)) {312 ichxrom_cleanup(window);313 return -ENODEV;314 }315 return 0;316}317 318 319static void ichxrom_remove_one(struct pci_dev *pdev)320{321 struct ichxrom_window *window = &ichxrom_window;322 ichxrom_cleanup(window);323}324 325static const struct pci_device_id ichxrom_pci_tbl[] = {326 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0,327 PCI_ANY_ID, PCI_ANY_ID, },328 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0,329 PCI_ANY_ID, PCI_ANY_ID, },330 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0,331 PCI_ANY_ID, PCI_ANY_ID, },332 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0,333 PCI_ANY_ID, PCI_ANY_ID, },334 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1,335 PCI_ANY_ID, PCI_ANY_ID, },336 { 0, },337};338 339#if 0340MODULE_DEVICE_TABLE(pci, ichxrom_pci_tbl);341 342static struct pci_driver ichxrom_driver = {343 .name = MOD_NAME,344 .id_table = ichxrom_pci_tbl,345 .probe = ichxrom_init_one,346 .remove = ichxrom_remove_one,347};348#endif349 350static int __init init_ichxrom(void)351{352 struct pci_dev *pdev;353 const struct pci_device_id *id;354 355 pdev = NULL;356 for (id = ichxrom_pci_tbl; id->vendor; id++) {357 pdev = pci_get_device(id->vendor, id->device, NULL);358 if (pdev) {359 break;360 }361 }362 if (pdev) {363 return ichxrom_init_one(pdev, &ichxrom_pci_tbl[0]);364 }365 return -ENXIO;366#if 0367 return pci_register_driver(&ichxrom_driver);368#endif369}370 371static void __exit cleanup_ichxrom(void)372{373 ichxrom_remove_one(ichxrom_window.pdev);374}375 376module_init(init_ichxrom);377module_exit(cleanup_ichxrom);378 379MODULE_LICENSE("GPL");380MODULE_AUTHOR("Eric Biederman <ebiederman@lnxi.com>");381MODULE_DESCRIPTION("MTD map driver for BIOS chips on the ICHX southbridge");382