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1# SPDX-License-Identifier: GPL-2.0-only2menuconfig MTD_RAW_NAND3	tristate "Raw/Parallel NAND Device Support"4	select MTD_NAND_CORE5	select MTD_NAND_ECC6	help7	  This enables support for accessing all type of raw/parallel8	  NAND flash devices. For further information see9	  <http://www.linux-mtd.infradead.org/doc/nand.html>.10 11if MTD_RAW_NAND12 13comment "Raw/parallel NAND flash controllers"14 15config MTD_NAND_DENALI16	tristate17 18config MTD_NAND_DENALI_PCI19	tristate "Denali NAND controller on Intel Moorestown"20	select MTD_NAND_DENALI21	depends on PCI22	help23	  Enable the driver for NAND flash on Intel Moorestown, using the24	  Denali NAND controller core.25 26config MTD_NAND_DENALI_DT27	tristate "Denali NAND controller as a DT device"28	select MTD_NAND_DENALI29	depends on HAS_DMA && HAVE_CLK && OF && HAS_IOMEM30	help31	  Enable the driver for NAND flash on platforms using a Denali NAND32	  controller as a DT device.33 34config MTD_NAND_AMS_DELTA35	tristate "Amstrad E3 NAND controller"36	depends on MACH_AMS_DELTA || COMPILE_TEST37	default y38	help39	  Support for NAND flash on Amstrad E3 (Delta).40 41config MTD_NAND_OMAP242	tristate "OMAP2, OMAP3, OMAP4 and Keystone NAND controller"43	depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST44	depends on HAS_IOMEM45	depends on OMAP_GPMC46	help47	  Support for NAND flash on Texas Instruments OMAP2, OMAP3, OMAP448	  and Keystone platforms.49 50config MTD_NAND_OMAP_BCH51	depends on MTD_NAND_OMAP252	bool "Support hardware based BCH error correction"53	default n54	select BCH55	help56	  This config enables the ELM hardware engine, which can be used to57	  locate and correct errors when using BCH ECC scheme. This offloads58	  the cpu from doing ECC error searching and correction. However some59	  legacy OMAP families like OMAP2xxx, OMAP3xxx do not have ELM engine60	  so this is optional for them.61 62config MTD_NAND_OMAP_BCH_BUILD63	def_tristate MTD_NAND_OMAP2 && MTD_NAND_OMAP_BCH64 65config MTD_NAND_AU155066	tristate "Au1550/1200 NAND support"67	depends on MIPS_ALCHEMY68	help69	  This enables the driver for the NAND flash controller on the70	  AMD/Alchemy 1550 SOC.71 72config MTD_NAND_NDFC73	tristate "IBM/MCC 4xx NAND controller"74	depends on 4xx75	select MTD_NAND_ECC_SW_HAMMING76	select MTD_NAND_ECC_SW_HAMMING_SMC77	help78	  NDFC Nand Flash Controllers are integrated in IBM/AMCC's 4xx SoCs79 80config MTD_NAND_S3C241081	tristate "Samsung S3C NAND controller"82	depends on ARCH_S3C64XX83	help84	  This enables the NAND flash controller on the S3C24xx and S3C64xx85	  SoCs86 87	  No board specific support is done by this driver, each board88	  must advertise a platform_device for the driver to attach.89 90config MTD_NAND_S3C2410_DEBUG91	bool "Samsung S3C NAND controller debug"92	depends on MTD_NAND_S3C241093	help94	  Enable debugging of the S3C NAND driver95 96config MTD_NAND_S3C2410_CLKSTOP97	bool "Samsung S3C NAND IDLE clock stop"98	depends on MTD_NAND_S3C241099	default n100	help101	  Stop the clock to the NAND controller when there is no chip102	  selected to save power. This will mean there is a small delay103	  when the is NAND chip selected or released, but will save104	  approximately 5mA of power when there is nothing happening.105 106config MTD_NAND_SHARPSL107	tristate "Sharp SL Series (C7xx + others) NAND controller"108	depends on ARCH_PXA || COMPILE_TEST109	depends on HAS_IOMEM110 111config MTD_NAND_CAFE112	tristate "OLPC CAFÉ NAND controller"113	depends on PCI114	select REED_SOLOMON115	select REED_SOLOMON_DEC16116	help117	  Use NAND flash attached to the CAFÉ chip designed for the OLPC118	  laptop.119 120config MTD_NAND_CS553X121	tristate "CS5535/CS5536 (AMD Geode companion) NAND controller"122	depends on X86_32123	depends on !UML && HAS_IOMEM124	help125	  The CS553x companion chips for the AMD Geode processor126	  include NAND flash controllers with built-in hardware ECC127	  capabilities; enabling this option will allow you to use128	  these. The driver will check the MSRs to verify that the129	  controller is enabled for NAND, and currently requires that130	  the controller be in MMIO mode.131 132	  If you say "m", the module will be called cs553x_nand.133 134config MTD_NAND_ATMEL135	tristate "Atmel AT91 NAND Flash/SmartMedia NAND controller"136	depends on ARCH_AT91 || COMPILE_TEST137	depends on HAS_IOMEM138	select GENERIC_ALLOCATOR139	select MFD_ATMEL_SMC140	help141	  Enables support for NAND Flash / Smart Media Card interface142	  on Atmel AT91 processors.143 144config MTD_NAND_ORION145	tristate "Marvell Orion NAND controller"146	depends on PLAT_ORION147	help148	  This enables the NAND flash controller on Orion machines.149 150	  No board specific support is done by this driver, each board151	  must advertise a platform_device for the driver to attach.152 153config MTD_NAND_MARVELL154	tristate "Marvell EBU NAND controller"155	depends on PXA3xx || ARCH_MMP || PLAT_ORION || ARCH_MVEBU || \156		   COMPILE_TEST157	depends on HAS_IOMEM158	help159	  This enables the NAND flash controller driver for Marvell boards,160	  including:161	  - PXA3xx processors (NFCv1)162	  - 32-bit Armada platforms (XP, 37x, 38x, 39x) (NFCv2)163	  - 64-bit Aramda platforms (7k, 8k, ac5) (NFCv2)164 165config MTD_NAND_SLC_LPC32XX166	tristate "NXP LPC32xx SLC NAND controller"167	depends on ARCH_LPC32XX || COMPILE_TEST168	depends on HAS_IOMEM169	help170	  Enables support for NXP's LPC32XX SLC (i.e. for Single Level Cell171	  chips) NAND controller. This is the default for the PHYTEC 3250172	  reference board which contains a NAND256R3A2CZA6 chip.173 174	  Please check the actual NAND chip connected and its support175	  by the SLC NAND controller.176 177config MTD_NAND_MLC_LPC32XX178	tristate "NXP LPC32xx MLC NAND controller"179	depends on ARCH_LPC32XX || COMPILE_TEST180	depends on HAS_IOMEM181	help182	  Uses the LPC32XX MLC (i.e. for Multi Level Cell chips) NAND183	  controller. This is the default for the WORK92105 controller184	  board.185 186	  Please check the actual NAND chip connected and its support187	  by the MLC NAND controller.188 189config MTD_NAND_PASEMI190	tristate "PA Semi PWRficient NAND controller"191	depends on PPC_PASEMI192	help193	  Enables support for NAND Flash interface on PA Semi PWRficient194	  based boards195 196source "drivers/mtd/nand/raw/brcmnand/Kconfig"197 198config MTD_NAND_BCM47XXNFLASH199	tristate "BCM4706 BCMA NAND controller"200	depends on BCMA_NFLASH201	depends on BCMA202	help203	  BCMA bus can have various flash memories attached, they are204	  registered by bcma as platform devices. This enables driver for205	  NAND flash memories. For now only BCM4706 is supported.206 207config MTD_NAND_MPC5121_NFC208	tristate "MPC5121 NAND controller"209	depends on PPC_MPC512x210	help211	  This enables the driver for the NAND flash controller on the212	  MPC5121 SoC.213 214config MTD_NAND_GPMI_NAND215	tristate "Freescale GPMI NAND controller"216	depends on MXS_DMA217	help218	  Enables NAND Flash support for IMX23, IMX28 or IMX6.219	  The GPMI controller is very powerful, with the help of BCH220	  module, it can do the hardware ECC. The GPMI supports several221	  NAND flashs at the same time.222 223config MTD_NAND_FSL_ELBC224	tristate "Freescale eLBC NAND controller"225	depends on FSL_SOC226	select FSL_LBC227	help228	  Various Freescale chips, including the 8313, include a NAND Flash229	  Controller Module with built-in hardware ECC capabilities.230	  Enabling this option will enable you to use this to control231	  external NAND devices.232 233config MTD_NAND_FSL_IFC234	tristate "Freescale IFC NAND controller"235	depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST236	depends on HAS_IOMEM237	depends on FSL_IFC238	help239	  Various Freescale chips e.g P1010, include a NAND Flash machine240	  with built-in hardware ECC capabilities.241	  Enabling this option will enable you to use this to control242	  external NAND devices.243 244config MTD_NAND_FSL_UPM245	tristate "Freescale UPM NAND controller"246	depends on PPC_83xx || PPC_85xx247	select FSL_LBC248	help249	  Enables support for NAND Flash chips wired onto Freescale PowerPC250	  processor localbus with User-Programmable Machine support.251 252config MTD_NAND_VF610_NFC253	tristate "Freescale VF610/MPC5125 NAND controller"254	depends on (SOC_VF610 || COMPILE_TEST)255	depends on HAS_IOMEM256	help257	  Enables support for NAND Flash Controller on some Freescale258	  processors like the VF610, MPC5125, MCF54418 or Kinetis K70.259	  The driver supports a maximum 2k page size. With 2k pages and260	  64 bytes or more of OOB, hardware ECC with up to 32-bit error261	  correction is supported. Hardware ECC is only enabled through262	  device tree.263 264config MTD_NAND_MXC265	tristate "Freescale MXC NAND controller"266	depends on ARCH_MXC || COMPILE_TEST267	depends on HAS_IOMEM && OF268	help269	  This enables the driver for the NAND flash controller on the270	  MXC processors.271 272config MTD_NAND_SH_FLCTL273	tristate "Renesas SuperH FLCTL NAND controller"274	depends on SUPERH || COMPILE_TEST275	depends on HAS_IOMEM276	help277	  Several Renesas SuperH CPU has FLCTL. This option enables support278	  for NAND Flash using FLCTL.279 280config MTD_NAND_DAVINCI281	tristate "DaVinci/Keystone NAND controller"282	depends on ARCH_DAVINCI || (ARCH_KEYSTONE && TI_AEMIF) || COMPILE_TEST283	depends on HAS_IOMEM284	help285	  Enable the driver for NAND flash chips on Texas Instruments286	  DaVinci/Keystone processors.287 288config MTD_NAND_TXX9NDFMC289	tristate "TXx9 NAND controller"290	depends on SOC_TX4938 || COMPILE_TEST291	depends on HAS_IOMEM292	help293	  This enables the NAND flash controller on the TXx9 SoCs.294 295config MTD_NAND_SOCRATES296	tristate "Socrates NAND controller"297	depends on SOCRATES298	help299	  Enables support for NAND Flash chips wired onto Socrates board.300 301source "drivers/mtd/nand/raw/ingenic/Kconfig"302 303config MTD_NAND_FSMC304	tristate "ST Micros FSMC NAND controller"305	depends on OF && HAS_IOMEM306	depends on PLAT_SPEAR || ARCH_NOMADIK || ARCH_U8500 || COMPILE_TEST307	help308	  Enables support for NAND Flash chips on the ST Microelectronics309	  Flexible Static Memory Controller (FSMC)310 311config MTD_NAND_XWAY312	bool "Lantiq XWAY NAND controller"313	depends on LANTIQ && SOC_TYPE_XWAY314	help315	  Enables support for NAND Flash chips on Lantiq XWAY SoCs. NAND is attached316	  to the External Bus Unit (EBU).317 318config MTD_NAND_SUNXI319	tristate "Allwinner NAND controller"320	depends on ARCH_SUNXI || COMPILE_TEST321	depends on HAS_IOMEM322	help323	  Enables support for NAND Flash chips on Allwinner SoCs.324 325config MTD_NAND_HISI504326	tristate "Hisilicon Hip04 NAND controller"327	depends on ARCH_HISI || COMPILE_TEST328	depends on HAS_IOMEM329	help330	  Enables support for NAND controller on Hisilicon SoC Hip04.331 332config MTD_NAND_QCOM333	tristate "QCOM NAND controller"334	depends on ARCH_QCOM || COMPILE_TEST335	depends on HAS_IOMEM336	help337	  Enables support for NAND flash chips on SoCs containing the EBI2 NAND338	  controller. This controller is found on IPQ806x SoC.339 340config MTD_NAND_MTK341	tristate "MTK NAND controller"342	depends on MTD_NAND_ECC_MEDIATEK343	depends on ARCH_MEDIATEK || COMPILE_TEST344	depends on HAS_IOMEM345	help346	  Enables support for NAND controller on MTK SoCs.347	  This controller is found on mt27xx, mt81xx, mt65xx SoCs.348 349config MTD_NAND_MXIC350	tristate "Macronix raw NAND controller"351	depends on HAS_IOMEM || COMPILE_TEST352	help353	  This selects the Macronix raw NAND controller driver.354 355config MTD_NAND_TEGRA356	tristate "NVIDIA Tegra NAND controller"357	depends on ARCH_TEGRA || COMPILE_TEST358	depends on HAS_IOMEM359	help360	  Enables support for NAND flash controller on NVIDIA Tegra SoC.361	  The driver has been developed and tested on a Tegra 2 SoC. DMA362	  support, raw read/write page as well as HW ECC read/write page363	  is supported. Extra OOB bytes when using HW ECC are currently364	  not supported.365 366config MTD_NAND_STM32_FMC2367	tristate "Support for NAND controller on STM32MP SoCs"368	depends on ARCH_STM32 || COMPILE_TEST369	select MFD_SYSCON370	help371	  Enables support for NAND Flash chips on SoCs containing the FMC2372	  NAND controller. This controller is found on STM32MP SoCs.373	  The controller supports a maximum 8k page size and supports374	  a maximum 8-bit correction error per sector of 512 bytes.375 376config MTD_NAND_MESON377	tristate "Support for NAND controller on Amlogic's Meson SoCs"378	depends on COMMON_CLK && (ARCH_MESON || COMPILE_TEST)379	select MFD_SYSCON380	help381	  Enables support for NAND controller on Amlogic's Meson SoCs.382	  This controller is found on Meson SoCs.383 384config MTD_NAND_GPIO385	tristate "GPIO assisted NAND controller"386	depends on GPIOLIB || COMPILE_TEST387	depends on HAS_IOMEM388	help389	  This enables a NAND flash driver where control signals are390	  connected to GPIO pins, and commands and data are communicated391	  via a memory mapped interface.392 393config MTD_NAND_PLATFORM394	tristate "Generic NAND controller"395	depends on HAS_IOMEM396	help397	  This implements a generic NAND driver for on-SOC platform398	  devices. You will need to provide platform-specific functions399	  via platform_data.400 401config MTD_NAND_CADENCE402	tristate "Support Cadence NAND (HPNFC) controller"403	depends on OF && HAS_IOMEM404	help405	  Enable the driver for NAND flash on platforms using a Cadence NAND406	  controller.407 408config MTD_NAND_ARASAN409	tristate "Support for Arasan NAND flash controller"410	depends on HAS_IOMEM && HAS_DMA411	select BCH412	help413	  Enables the driver for the Arasan NAND flash controller on414	  Zynq Ultrascale+ MPSoC.415 416config MTD_NAND_INTEL_LGM417	tristate "Support for NAND controller on Intel LGM SoC"418	depends on OF419	depends on HAS_IOMEM420	help421	  Enables support for NAND Flash chips on Intel's LGM SoC.422	  NAND flash controller interfaced through the External Bus Unit.423 424config MTD_NAND_ROCKCHIP425	tristate "Rockchip NAND controller"426	depends on ARCH_ROCKCHIP && HAS_IOMEM427	help428	  Enables support for NAND controller on Rockchip SoCs.429	  There are four different versions of NAND FLASH Controllers,430	  including:431	    NFC v600: RK2928, RK3066, RK3188432	    NFC v622: RK3036, RK3128433	    NFC v800: RK3308, RV1108434	    NFC v900: PX30, RK3326435 436config MTD_NAND_PL35X437	tristate "ARM PL35X NAND controller"438	depends on OF439	depends on PL353_SMC440	help441	  Enables support for PrimeCell SMC PL351 and PL353 NAND442	  controller found on Zynq7000.443 444config MTD_NAND_RENESAS445	tristate "Renesas R-Car Gen3 & RZ/N1 NAND controller"446	depends on ARCH_RENESAS || COMPILE_TEST447	help448	  Enables support for the NAND controller found on Renesas R-Car449	  Gen3 and RZ/N1 SoC families.450 451config MTD_NAND_TS72XX452	tristate "ts72xx NAND controller"453	depends on ARCH_EP93XX && HAS_IOMEM454	help455	  Enables support for NAND controller on ts72xx SBCs.456 457comment "Misc"458 459config MTD_SM_COMMON460	tristate461	default n462 463config MTD_NAND_NANDSIM464	tristate "Support for NAND Flash Simulator"465	help466	  The simulator may simulate various NAND flash chips for the467	  MTD nand layer.468 469config MTD_NAND_RICOH470	tristate "Ricoh xD card reader"471	default n472	depends on PCI473	select MTD_SM_COMMON474	help475	  Enable support for Ricoh R5C852 xD card reader476	  You also need to enable either477	  NAND SSFDC (SmartMedia) read only translation layer' or new478	  experimental, readwrite479	  'SmartMedia/xD new translation layer'480 481config MTD_NAND_DISKONCHIP482	tristate "DiskOnChip 2000, Millennium and Millennium Plus (NAND reimplementation)"483	depends on HAS_IOMEM484	select REED_SOLOMON485	select REED_SOLOMON_DEC16486	help487	  This is a reimplementation of M-Systems DiskOnChip 2000,488	  Millennium and Millennium Plus as a standard NAND device driver,489	  as opposed to the earlier self-contained MTD device drivers.490	  This should enable, among other things, proper JFFS2 operation on491	  these devices.492 493config MTD_NAND_DISKONCHIP_PROBE_ADVANCED494	bool "Advanced detection options for DiskOnChip"495	depends on MTD_NAND_DISKONCHIP496	help497	  This option allows you to specify nonstandard address at which to498	  probe for a DiskOnChip, or to change the detection options.  You499	  are unlikely to need any of this unless you are using LinuxBIOS.500	  Say 'N'.501 502config MTD_NAND_DISKONCHIP_PROBE_ADDRESS503	hex "Physical address of DiskOnChip" if MTD_NAND_DISKONCHIP_PROBE_ADVANCED504	depends on MTD_NAND_DISKONCHIP505	default "0"506	help507	  By default, the probe for DiskOnChip devices will look for a508	  DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000.509	  This option allows you to specify a single address at which to probe510	  for the device, which is useful if you have other devices in that511	  range which get upset when they are probed.512 513	  (Note that on PowerPC, the normal probe will only check at514	  0xE4000000.)515 516	  Normally, you should leave this set to zero, to allow the probe at517	  the normal addresses.518 519config MTD_NAND_DISKONCHIP_PROBE_HIGH520	bool "Probe high addresses"521	depends on MTD_NAND_DISKONCHIP_PROBE_ADVANCED522	help523	  By default, the probe for DiskOnChip devices will look for a524	  DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000.525	  This option changes to make it probe between 0xFFFC8000 and526	  0xFFFEE000.  Unless you are using LinuxBIOS, this is unlikely to be527	  useful to you.  Say 'N'.528 529config MTD_NAND_DISKONCHIP_BBTWRITE530	bool "Allow BBT writes on DiskOnChip Millennium and 2000TSOP"531	depends on MTD_NAND_DISKONCHIP532	help533	  On DiskOnChip devices shipped with the INFTL filesystem (Millennium534	  and 2000 TSOP/Alon), Linux reserves some space at the end of the535	  device for the Bad Block Table (BBT).  If you have existing INFTL536	  data on your device (created by non-Linux tools such as M-Systems'537	  DOS drivers), your data might overlap the area Linux wants to use for538	  the BBT.  If this is a concern for you, leave this option disabled and539	  Linux will not write BBT data into this area.540	  The downside of leaving this option disabled is that if bad blocks541	  are detected by Linux, they will not be recorded in the BBT, which542	  could cause future problems.543	  Once you enable this option, new filesystems (INFTL or others, created544	  in Linux or other operating systems) will not use the reserved area.545	  The only reason not to enable this option is to prevent damage to546	  preexisting filesystems.547	  Even if you leave this disabled, you can enable BBT writes at module548	  load time (assuming you build diskonchip as a module) with the module549	  parameter "inftl_bbt_write=1".550 551endif # MTD_RAW_NAND552