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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * Copyright (C) 2004 Richard Purdie4 * Copyright (C) 2008 Dmitry Baryshkov5 *6 * Based on Sharp's NAND driver sharp_sl.c7 */8 9#include <linux/slab.h>10#include <linux/module.h>11#include <linux/delay.h>12#include <linux/mtd/mtd.h>13#include <linux/mtd/rawnand.h>14#include <linux/mtd/partitions.h>15#include <linux/mtd/sharpsl.h>16#include <linux/interrupt.h>17#include <linux/platform_device.h>18#include <linux/io.h>19 20struct sharpsl_nand {21 struct nand_controller controller;22 struct nand_chip chip;23 24 void __iomem *io;25};26 27static inline struct sharpsl_nand *mtd_to_sharpsl(struct mtd_info *mtd)28{29 return container_of(mtd_to_nand(mtd), struct sharpsl_nand, chip);30}31 32/* register offset */33#define ECCLPLB 0x00 /* line parity 7 - 0 bit */34#define ECCLPUB 0x04 /* line parity 15 - 8 bit */35#define ECCCP 0x08 /* column parity 5 - 0 bit */36#define ECCCNTR 0x0C /* ECC byte counter */37#define ECCCLRR 0x10 /* cleare ECC */38#define FLASHIO 0x14 /* Flash I/O */39#define FLASHCTL 0x18 /* Flash Control */40 41/* Flash control bit */42#define FLRYBY (1 << 5)43#define FLCE1 (1 << 4)44#define FLWP (1 << 3)45#define FLALE (1 << 2)46#define FLCLE (1 << 1)47#define FLCE0 (1 << 0)48 49/*50 * hardware specific access to control-lines51 * ctrl:52 * NAND_CNE: bit 0 -> ! bit 0 & 453 * NAND_CLE: bit 1 -> bit 154 * NAND_ALE: bit 2 -> bit 255 *56 */57static void sharpsl_nand_hwcontrol(struct nand_chip *chip, int cmd,58 unsigned int ctrl)59{60 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(nand_to_mtd(chip));61 62 if (ctrl & NAND_CTRL_CHANGE) {63 unsigned char bits = ctrl & 0x07;64 65 bits |= (ctrl & 0x01) << 4;66 67 bits ^= 0x11;68 69 writeb((readb(sharpsl->io + FLASHCTL) & ~0x17) | bits, sharpsl->io + FLASHCTL);70 }71 72 if (cmd != NAND_CMD_NONE)73 writeb(cmd, chip->legacy.IO_ADDR_W);74}75 76static int sharpsl_nand_dev_ready(struct nand_chip *chip)77{78 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(nand_to_mtd(chip));79 return !((readb(sharpsl->io + FLASHCTL) & FLRYBY) == 0);80}81 82static void sharpsl_nand_enable_hwecc(struct nand_chip *chip, int mode)83{84 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(nand_to_mtd(chip));85 writeb(0, sharpsl->io + ECCCLRR);86}87 88static int sharpsl_nand_calculate_ecc(struct nand_chip *chip,89 const u_char * dat, u_char * ecc_code)90{91 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(nand_to_mtd(chip));92 ecc_code[0] = ~readb(sharpsl->io + ECCLPUB);93 ecc_code[1] = ~readb(sharpsl->io + ECCLPLB);94 ecc_code[2] = (~readb(sharpsl->io + ECCCP) << 2) | 0x03;95 return readb(sharpsl->io + ECCCNTR) != 0;96}97 98static int sharpsl_attach_chip(struct nand_chip *chip)99{100 if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)101 return 0;102 103 chip->ecc.size = 256;104 chip->ecc.bytes = 3;105 chip->ecc.strength = 1;106 chip->ecc.hwctl = sharpsl_nand_enable_hwecc;107 chip->ecc.calculate = sharpsl_nand_calculate_ecc;108 chip->ecc.correct = rawnand_sw_hamming_correct;109 110 return 0;111}112 113static const struct nand_controller_ops sharpsl_ops = {114 .attach_chip = sharpsl_attach_chip,115};116 117/*118 * Main initialization routine119 */120static int sharpsl_nand_probe(struct platform_device *pdev)121{122 struct nand_chip *this;123 struct mtd_info *mtd;124 struct resource *r;125 int err = 0;126 struct sharpsl_nand *sharpsl;127 struct sharpsl_nand_platform_data *data = dev_get_platdata(&pdev->dev);128 129 if (!data) {130 dev_err(&pdev->dev, "no platform data!\n");131 return -EINVAL;132 }133 134 /* Allocate memory for MTD device structure and private data */135 sharpsl = kzalloc(sizeof(struct sharpsl_nand), GFP_KERNEL);136 if (!sharpsl)137 return -ENOMEM;138 139 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);140 if (!r) {141 dev_err(&pdev->dev, "no io memory resource defined!\n");142 err = -ENODEV;143 goto err_get_res;144 }145 146 /* map physical address */147 sharpsl->io = ioremap(r->start, resource_size(r));148 if (!sharpsl->io) {149 dev_err(&pdev->dev, "ioremap to access Sharp SL NAND chip failed\n");150 err = -EIO;151 goto err_ioremap;152 }153 154 /* Get pointer to private data */155 this = (struct nand_chip *)(&sharpsl->chip);156 157 nand_controller_init(&sharpsl->controller);158 sharpsl->controller.ops = &sharpsl_ops;159 this->controller = &sharpsl->controller;160 161 /* Link the private data with the MTD structure */162 mtd = nand_to_mtd(this);163 mtd->dev.parent = &pdev->dev;164 mtd_set_ooblayout(mtd, data->ecc_layout);165 166 platform_set_drvdata(pdev, sharpsl);167 168 /*169 * PXA initialize170 */171 writeb(readb(sharpsl->io + FLASHCTL) | FLWP, sharpsl->io + FLASHCTL);172 173 /* Set address of NAND IO lines */174 this->legacy.IO_ADDR_R = sharpsl->io + FLASHIO;175 this->legacy.IO_ADDR_W = sharpsl->io + FLASHIO;176 /* Set address of hardware control function */177 this->legacy.cmd_ctrl = sharpsl_nand_hwcontrol;178 this->legacy.dev_ready = sharpsl_nand_dev_ready;179 /* 15 us command delay time */180 this->legacy.chip_delay = 15;181 this->badblock_pattern = data->badblock_pattern;182 183 /* Scan to find existence of the device */184 err = nand_scan(this, 1);185 if (err)186 goto err_scan;187 188 /* Register the partitions */189 mtd->name = "sharpsl-nand";190 191 err = mtd_device_parse_register(mtd, data->part_parsers, NULL,192 data->partitions, data->nr_partitions);193 if (err)194 goto err_add;195 196 /* Return happy */197 return 0;198 199err_add:200 nand_cleanup(this);201 202err_scan:203 iounmap(sharpsl->io);204err_ioremap:205err_get_res:206 kfree(sharpsl);207 return err;208}209 210/*211 * Clean up routine212 */213static void sharpsl_nand_remove(struct platform_device *pdev)214{215 struct sharpsl_nand *sharpsl = platform_get_drvdata(pdev);216 struct nand_chip *chip = &sharpsl->chip;217 int ret;218 219 /* Unregister device */220 ret = mtd_device_unregister(nand_to_mtd(chip));221 WARN_ON(ret);222 223 /* Release resources */224 nand_cleanup(chip);225 226 iounmap(sharpsl->io);227 228 /* Free the driver's structure */229 kfree(sharpsl);230}231 232static struct platform_driver sharpsl_nand_driver = {233 .driver = {234 .name = "sharpsl-nand",235 },236 .probe = sharpsl_nand_probe,237 .remove_new = sharpsl_nand_remove,238};239 240module_platform_driver(sharpsl_nand_driver);241 242MODULE_LICENSE("GPL");243MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");244MODULE_DESCRIPTION("Device specific logic for NAND flash on Sharp SL-C7xx Series");245