706 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Copyright (C) 2005, Intec Automation Inc.4 * Copyright (C) 2014, Freescale Semiconductor, Inc.5 */6 7#ifndef __LINUX_MTD_SPI_NOR_INTERNAL_H8#define __LINUX_MTD_SPI_NOR_INTERNAL_H9 10#include "sfdp.h"11 12#define SPI_NOR_MAX_ID_LEN 613/*14 * 256 bytes is a sane default for most older flashes. Newer flashes will15 * have the page size defined within their SFDP tables.16 */17#define SPI_NOR_DEFAULT_PAGE_SIZE 25618#define SPI_NOR_DEFAULT_N_BANKS 119#define SPI_NOR_DEFAULT_SECTOR_SIZE SZ_64K20 21/* Standard SPI NOR flash operations. */22#define SPI_NOR_READID_OP(naddr, ndummy, buf, len) \23 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDID, 0), \24 SPI_MEM_OP_ADDR(naddr, 0, 0), \25 SPI_MEM_OP_DUMMY(ndummy, 0), \26 SPI_MEM_OP_DATA_IN(len, buf, 0))27 28#define SPI_NOR_WREN_OP \29 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WREN, 0), \30 SPI_MEM_OP_NO_ADDR, \31 SPI_MEM_OP_NO_DUMMY, \32 SPI_MEM_OP_NO_DATA)33 34#define SPI_NOR_WRDI_OP \35 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRDI, 0), \36 SPI_MEM_OP_NO_ADDR, \37 SPI_MEM_OP_NO_DUMMY, \38 SPI_MEM_OP_NO_DATA)39 40#define SPI_NOR_RDSR_OP(buf) \41 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR, 0), \42 SPI_MEM_OP_NO_ADDR, \43 SPI_MEM_OP_NO_DUMMY, \44 SPI_MEM_OP_DATA_IN(1, buf, 0))45 46#define SPI_NOR_WRSR_OP(buf, len) \47 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR, 0), \48 SPI_MEM_OP_NO_ADDR, \49 SPI_MEM_OP_NO_DUMMY, \50 SPI_MEM_OP_DATA_OUT(len, buf, 0))51 52#define SPI_NOR_RDSR2_OP(buf) \53 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR2, 0), \54 SPI_MEM_OP_NO_ADDR, \55 SPI_MEM_OP_NO_DUMMY, \56 SPI_MEM_OP_DATA_OUT(1, buf, 0))57 58#define SPI_NOR_WRSR2_OP(buf) \59 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR2, 0), \60 SPI_MEM_OP_NO_ADDR, \61 SPI_MEM_OP_NO_DUMMY, \62 SPI_MEM_OP_DATA_OUT(1, buf, 0))63 64#define SPI_NOR_RDCR_OP(buf) \65 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDCR, 0), \66 SPI_MEM_OP_NO_ADDR, \67 SPI_MEM_OP_NO_DUMMY, \68 SPI_MEM_OP_DATA_IN(1, buf, 0))69 70#define SPI_NOR_EN4B_EX4B_OP(enable) \71 SPI_MEM_OP(SPI_MEM_OP_CMD(enable ? SPINOR_OP_EN4B : SPINOR_OP_EX4B, 0), \72 SPI_MEM_OP_NO_ADDR, \73 SPI_MEM_OP_NO_DUMMY, \74 SPI_MEM_OP_NO_DATA)75 76#define SPI_NOR_BRWR_OP(buf) \77 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_BRWR, 0), \78 SPI_MEM_OP_NO_ADDR, \79 SPI_MEM_OP_NO_DUMMY, \80 SPI_MEM_OP_DATA_OUT(1, buf, 0))81 82#define SPI_NOR_GBULK_OP \83 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_GBULK, 0), \84 SPI_MEM_OP_NO_ADDR, \85 SPI_MEM_OP_NO_DUMMY, \86 SPI_MEM_OP_NO_DATA)87 88#define SPI_NOR_DIE_ERASE_OP(opcode, addr_nbytes, addr, dice) \89 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \90 SPI_MEM_OP_ADDR(dice ? addr_nbytes : 0, addr, 0), \91 SPI_MEM_OP_NO_DUMMY, \92 SPI_MEM_OP_NO_DATA)93 94#define SPI_NOR_SECTOR_ERASE_OP(opcode, addr_nbytes, addr) \95 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \96 SPI_MEM_OP_ADDR(addr_nbytes, addr, 0), \97 SPI_MEM_OP_NO_DUMMY, \98 SPI_MEM_OP_NO_DATA)99 100#define SPI_NOR_READ_OP(opcode) \101 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \102 SPI_MEM_OP_ADDR(3, 0, 0), \103 SPI_MEM_OP_DUMMY(1, 0), \104 SPI_MEM_OP_DATA_IN(2, NULL, 0))105 106#define SPI_NOR_PP_OP(opcode) \107 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \108 SPI_MEM_OP_ADDR(3, 0, 0), \109 SPI_MEM_OP_NO_DUMMY, \110 SPI_MEM_OP_DATA_OUT(2, NULL, 0))111 112#define SPINOR_SRSTEN_OP \113 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRSTEN, 0), \114 SPI_MEM_OP_NO_DUMMY, \115 SPI_MEM_OP_NO_ADDR, \116 SPI_MEM_OP_NO_DATA)117 118#define SPINOR_SRST_OP \119 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRST, 0), \120 SPI_MEM_OP_NO_DUMMY, \121 SPI_MEM_OP_NO_ADDR, \122 SPI_MEM_OP_NO_DATA)123 124/* Keep these in sync with the list in debugfs.c */125enum spi_nor_option_flags {126 SNOR_F_HAS_SR_TB = BIT(0),127 SNOR_F_NO_OP_CHIP_ERASE = BIT(1),128 SNOR_F_BROKEN_RESET = BIT(2),129 SNOR_F_4B_OPCODES = BIT(3),130 SNOR_F_HAS_4BAIT = BIT(4),131 SNOR_F_HAS_LOCK = BIT(5),132 SNOR_F_HAS_16BIT_SR = BIT(6),133 SNOR_F_NO_READ_CR = BIT(7),134 SNOR_F_HAS_SR_TB_BIT6 = BIT(8),135 SNOR_F_HAS_4BIT_BP = BIT(9),136 SNOR_F_HAS_SR_BP3_BIT6 = BIT(10),137 SNOR_F_IO_MODE_EN_VOLATILE = BIT(11),138 SNOR_F_SOFT_RESET = BIT(12),139 SNOR_F_SWP_IS_VOLATILE = BIT(13),140 SNOR_F_RWW = BIT(14),141 SNOR_F_ECC = BIT(15),142 SNOR_F_NO_WP = BIT(16),143};144 145struct spi_nor_read_command {146 u8 num_mode_clocks;147 u8 num_wait_states;148 u8 opcode;149 enum spi_nor_protocol proto;150};151 152struct spi_nor_pp_command {153 u8 opcode;154 enum spi_nor_protocol proto;155};156 157enum spi_nor_read_command_index {158 SNOR_CMD_READ,159 SNOR_CMD_READ_FAST,160 SNOR_CMD_READ_1_1_1_DTR,161 162 /* Dual SPI */163 SNOR_CMD_READ_1_1_2,164 SNOR_CMD_READ_1_2_2,165 SNOR_CMD_READ_2_2_2,166 SNOR_CMD_READ_1_2_2_DTR,167 168 /* Quad SPI */169 SNOR_CMD_READ_1_1_4,170 SNOR_CMD_READ_1_4_4,171 SNOR_CMD_READ_4_4_4,172 SNOR_CMD_READ_1_4_4_DTR,173 174 /* Octal SPI */175 SNOR_CMD_READ_1_1_8,176 SNOR_CMD_READ_1_8_8,177 SNOR_CMD_READ_8_8_8,178 SNOR_CMD_READ_1_8_8_DTR,179 SNOR_CMD_READ_8_8_8_DTR,180 181 SNOR_CMD_READ_MAX182};183 184enum spi_nor_pp_command_index {185 SNOR_CMD_PP,186 187 /* Quad SPI */188 SNOR_CMD_PP_1_1_4,189 SNOR_CMD_PP_1_4_4,190 SNOR_CMD_PP_4_4_4,191 192 /* Octal SPI */193 SNOR_CMD_PP_1_1_8,194 SNOR_CMD_PP_1_8_8,195 SNOR_CMD_PP_8_8_8,196 SNOR_CMD_PP_8_8_8_DTR,197 198 SNOR_CMD_PP_MAX199};200 201/**202 * struct spi_nor_erase_type - Structure to describe a SPI NOR erase type203 * @size: the size of the sector/block erased by the erase type.204 * JEDEC JESD216B imposes erase sizes to be a power of 2.205 * @size_shift: @size is a power of 2, the shift is stored in206 * @size_shift.207 * @size_mask: the size mask based on @size_shift.208 * @opcode: the SPI command op code to erase the sector/block.209 * @idx: Erase Type index as sorted in the Basic Flash Parameter210 * Table. It will be used to synchronize the supported211 * Erase Types with the ones identified in the SFDP212 * optional tables.213 */214struct spi_nor_erase_type {215 u32 size;216 u32 size_shift;217 u32 size_mask;218 u8 opcode;219 u8 idx;220};221 222/**223 * struct spi_nor_erase_command - Used for non-uniform erases224 * The structure is used to describe a list of erase commands to be executed225 * once we validate that the erase can be performed. The elements in the list226 * are run-length encoded.227 * @list: for inclusion into the list of erase commands.228 * @count: how many times the same erase command should be229 * consecutively used.230 * @size: the size of the sector/block erased by the command.231 * @opcode: the SPI command op code to erase the sector/block.232 */233struct spi_nor_erase_command {234 struct list_head list;235 u32 count;236 u32 size;237 u8 opcode;238};239 240/**241 * struct spi_nor_erase_region - Structure to describe a SPI NOR erase region242 * @offset: the offset in the data array of erase region start.243 * @size: the size of the region in bytes.244 * @erase_mask: bitmask to indicate all the supported erase commands245 * inside this region. The erase types are sorted in246 * ascending order with the smallest Erase Type size being247 * at BIT(0).248 * @overlaid: determine if this region is overlaid.249 */250struct spi_nor_erase_region {251 u64 offset;252 u64 size;253 u8 erase_mask;254 bool overlaid;255};256 257#define SNOR_ERASE_TYPE_MAX 4258 259/**260 * struct spi_nor_erase_map - Structure to describe the SPI NOR erase map261 * @regions: array of erase regions. The regions are consecutive in262 * address space. Walking through the regions is done263 * incrementally.264 * @uniform_region: a pre-allocated erase region for SPI NOR with a uniform265 * sector size (legacy implementation).266 * @erase_type: an array of erase types shared by all the regions.267 * The erase types are sorted in ascending order, with the268 * smallest Erase Type size being the first member in the269 * erase_type array.270 * @n_regions: number of erase regions.271 */272struct spi_nor_erase_map {273 struct spi_nor_erase_region *regions;274 struct spi_nor_erase_region uniform_region;275 struct spi_nor_erase_type erase_type[SNOR_ERASE_TYPE_MAX];276 unsigned int n_regions;277};278 279/**280 * struct spi_nor_locking_ops - SPI NOR locking methods281 * @lock: lock a region of the SPI NOR.282 * @unlock: unlock a region of the SPI NOR.283 * @is_locked: check if a region of the SPI NOR is completely locked284 */285struct spi_nor_locking_ops {286 int (*lock)(struct spi_nor *nor, loff_t ofs, u64 len);287 int (*unlock)(struct spi_nor *nor, loff_t ofs, u64 len);288 int (*is_locked)(struct spi_nor *nor, loff_t ofs, u64 len);289};290 291/**292 * struct spi_nor_otp_organization - Structure to describe the SPI NOR OTP regions293 * @len: size of one OTP region in bytes.294 * @base: start address of the OTP area.295 * @offset: offset between consecutive OTP regions if there are more296 * than one.297 * @n_regions: number of individual OTP regions.298 */299struct spi_nor_otp_organization {300 size_t len;301 loff_t base;302 loff_t offset;303 unsigned int n_regions;304};305 306/**307 * struct spi_nor_otp_ops - SPI NOR OTP methods308 * @read: read from the SPI NOR OTP area.309 * @write: write to the SPI NOR OTP area.310 * @lock: lock an OTP region.311 * @erase: erase an OTP region.312 * @is_locked: check if an OTP region of the SPI NOR is locked.313 */314struct spi_nor_otp_ops {315 int (*read)(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf);316 int (*write)(struct spi_nor *nor, loff_t addr, size_t len,317 const u8 *buf);318 int (*lock)(struct spi_nor *nor, unsigned int region);319 int (*erase)(struct spi_nor *nor, loff_t addr);320 int (*is_locked)(struct spi_nor *nor, unsigned int region);321};322 323/**324 * struct spi_nor_otp - SPI NOR OTP grouping structure325 * @org: OTP region organization326 * @ops: OTP access ops327 */328struct spi_nor_otp {329 const struct spi_nor_otp_organization *org;330 const struct spi_nor_otp_ops *ops;331};332 333/**334 * struct spi_nor_flash_parameter - SPI NOR flash parameters and settings.335 * Includes legacy flash parameters and settings that can be overwritten336 * by the spi_nor_fixups hooks, or dynamically when parsing the JESD216337 * Serial Flash Discoverable Parameters (SFDP) tables.338 *339 * @bank_size: the flash memory bank density in bytes.340 * @size: the total flash memory density in bytes.341 * @writesize Minimal writable flash unit size. Defaults to 1. Set to342 * ECC unit size for ECC-ed flashes.343 * @page_size: the page size of the SPI NOR flash memory.344 * @addr_nbytes: number of address bytes to send.345 * @addr_mode_nbytes: number of address bytes of current address mode. Useful346 * when the flash operates with 4B opcodes but needs the347 * internal address mode for opcodes that don't have a 4B348 * opcode correspondent.349 * @rdsr_dummy: dummy cycles needed for Read Status Register command350 * in octal DTR mode.351 * @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register352 * command in octal DTR mode.353 * @n_banks: number of banks.354 * @n_dice: number of dice in the flash memory.355 * @die_erase_opcode: die erase opcode. Defaults to SPINOR_OP_CHIP_ERASE.356 * @vreg_offset: volatile register offset for each die.357 * @hwcaps: describes the read and page program hardware358 * capabilities.359 * @reads: read capabilities ordered by priority: the higher index360 * in the array, the higher priority.361 * @page_programs: page program capabilities ordered by priority: the362 * higher index in the array, the higher priority.363 * @erase_map: the erase map parsed from the SFDP Sector Map Parameter364 * Table.365 * @otp: SPI NOR OTP info.366 * @set_octal_dtr: enables or disables SPI NOR octal DTR mode.367 * @quad_enable: enables SPI NOR quad mode.368 * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.369 * @ready: (optional) flashes might use a different mechanism370 * than reading the status register to indicate they371 * are ready for a new command372 * @locking_ops: SPI NOR locking methods.373 * @priv: flash's private data.374 */375struct spi_nor_flash_parameter {376 u64 bank_size;377 u64 size;378 u32 writesize;379 u32 page_size;380 u8 addr_nbytes;381 u8 addr_mode_nbytes;382 u8 rdsr_dummy;383 u8 rdsr_addr_nbytes;384 u8 n_banks;385 u8 n_dice;386 u8 die_erase_opcode;387 u32 *vreg_offset;388 389 struct spi_nor_hwcaps hwcaps;390 struct spi_nor_read_command reads[SNOR_CMD_READ_MAX];391 struct spi_nor_pp_command page_programs[SNOR_CMD_PP_MAX];392 393 struct spi_nor_erase_map erase_map;394 struct spi_nor_otp otp;395 396 int (*set_octal_dtr)(struct spi_nor *nor, bool enable);397 int (*quad_enable)(struct spi_nor *nor);398 int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable);399 int (*ready)(struct spi_nor *nor);400 401 const struct spi_nor_locking_ops *locking_ops;402 void *priv;403};404 405/**406 * struct spi_nor_fixups - SPI NOR fixup hooks407 * @default_init: called after default flash parameters init. Used to tweak408 * flash parameters when information provided by the flash_info409 * table is incomplete or wrong.410 * @post_bfpt: called after the BFPT table has been parsed411 * @post_sfdp: called after SFDP has been parsed (is also called for SPI NORs412 * that do not support RDSFDP). Typically used to tweak various413 * parameters that could not be extracted by other means (i.e.414 * when information provided by the SFDP/flash_info tables are415 * incomplete or wrong).416 * @late_init: used to initialize flash parameters that are not declared in the417 * JESD216 SFDP standard, or where SFDP tables not defined at all.418 * Will replace the default_init() hook.419 *420 * Those hooks can be used to tweak the SPI NOR configuration when the SFDP421 * table is broken or not available.422 */423struct spi_nor_fixups {424 void (*default_init)(struct spi_nor *nor);425 int (*post_bfpt)(struct spi_nor *nor,426 const struct sfdp_parameter_header *bfpt_header,427 const struct sfdp_bfpt *bfpt);428 int (*post_sfdp)(struct spi_nor *nor);429 int (*late_init)(struct spi_nor *nor);430};431 432/**433 * struct spi_nor_id - SPI NOR flash ID.434 *435 * @bytes: the bytes returned by the flash when issuing command 9F. Typically,436 * the first byte is the manufacturer ID code (see JEP106) and the next437 * two bytes are a flash part specific ID.438 * @len: the number of bytes of ID.439 */440struct spi_nor_id {441 const u8 *bytes;442 u8 len;443};444 445/**446 * struct flash_info - SPI NOR flash_info entry.447 * @id: pointer to struct spi_nor_id or NULL, which means "no ID" (mostly448 * older chips).449 * @name: (obsolete) the name of the flash. Do not set it for new additions.450 * @size: the size of the flash in bytes.451 * @sector_size: (optional) the size listed here is what works with452 * SPINOR_OP_SE, which isn't necessarily called a "sector" by453 * the vendor. Defaults to 64k.454 * @n_banks: (optional) the number of banks. Defaults to 1.455 * @page_size: (optional) the flash's page size. Defaults to 256.456 * @addr_nbytes: number of address bytes to send.457 *458 * @flags: flags that indicate support that is not defined by the459 * JESD216 standard in its SFDP tables. Flag meanings:460 * SPI_NOR_HAS_LOCK: flash supports lock/unlock via SR461 * SPI_NOR_HAS_TB: flash SR has Top/Bottom (TB) protect bit. Must be462 * used with SPI_NOR_HAS_LOCK.463 * SPI_NOR_TB_SR_BIT6: Top/Bottom (TB) is bit 6 of status register.464 * Must be used with SPI_NOR_HAS_TB.465 * SPI_NOR_4BIT_BP: flash SR has 4 bit fields (BP0-3) for block466 * protection.467 * SPI_NOR_BP3_SR_BIT6: BP3 is bit 6 of status register. Must be used with468 * SPI_NOR_4BIT_BP.469 * SPI_NOR_SWP_IS_VOLATILE: flash has volatile software write protection bits.470 * Usually these will power-up in a write-protected471 * state.472 * SPI_NOR_NO_ERASE: no erase command needed.473 * SPI_NOR_QUAD_PP: flash supports Quad Input Page Program.474 * SPI_NOR_RWW: flash supports reads while write.475 *476 * @no_sfdp_flags: flags that indicate support that can be discovered via SFDP.477 * Used when SFDP tables are not defined in the flash. These478 * flags are used together with the SPI_NOR_SKIP_SFDP flag.479 * SPI_NOR_SKIP_SFDP: skip parsing of SFDP tables.480 * SECT_4K: SPINOR_OP_BE_4K works uniformly.481 * SPI_NOR_DUAL_READ: flash supports Dual Read.482 * SPI_NOR_QUAD_READ: flash supports Quad Read.483 * SPI_NOR_OCTAL_READ: flash supports Octal Read.484 * SPI_NOR_OCTAL_DTR_READ: flash supports octal DTR Read.485 * SPI_NOR_OCTAL_DTR_PP: flash supports Octal DTR Page Program.486 *487 * @fixup_flags: flags that indicate support that can be discovered via SFDP488 * ideally, but can not be discovered for this particular flash489 * because the SFDP table that indicates this support is not490 * defined by the flash. In case the table for this support is491 * defined but has wrong values, one should instead use a492 * post_sfdp() hook to set the SNOR_F equivalent flag.493 *494 * SPI_NOR_4B_OPCODES: use dedicated 4byte address op codes to support495 * memory size above 128Mib.496 * SPI_NOR_IO_MODE_EN_VOLATILE: flash enables the best available I/O mode497 * via a volatile bit.498 * @mfr_flags: manufacturer private flags. Used in the manufacturer fixup499 * hooks to differentiate support between flashes of the same500 * manufacturer.501 * @otp_org: flash's OTP organization.502 * @fixups: part specific fixup hooks.503 */504struct flash_info {505 char *name;506 const struct spi_nor_id *id;507 size_t size;508 unsigned sector_size;509 u16 page_size;510 u8 n_banks;511 u8 addr_nbytes;512 513 u16 flags;514#define SPI_NOR_HAS_LOCK BIT(0)515#define SPI_NOR_HAS_TB BIT(1)516#define SPI_NOR_TB_SR_BIT6 BIT(2)517#define SPI_NOR_4BIT_BP BIT(3)518#define SPI_NOR_BP3_SR_BIT6 BIT(4)519#define SPI_NOR_SWP_IS_VOLATILE BIT(5)520#define SPI_NOR_NO_ERASE BIT(6)521#define SPI_NOR_QUAD_PP BIT(8)522#define SPI_NOR_RWW BIT(9)523 524 u8 no_sfdp_flags;525#define SPI_NOR_SKIP_SFDP BIT(0)526#define SECT_4K BIT(1)527#define SPI_NOR_DUAL_READ BIT(3)528#define SPI_NOR_QUAD_READ BIT(4)529#define SPI_NOR_OCTAL_READ BIT(5)530#define SPI_NOR_OCTAL_DTR_READ BIT(6)531#define SPI_NOR_OCTAL_DTR_PP BIT(7)532 533 u8 fixup_flags;534#define SPI_NOR_4B_OPCODES BIT(0)535#define SPI_NOR_IO_MODE_EN_VOLATILE BIT(1)536 537 u8 mfr_flags;538 539 const struct spi_nor_otp_organization *otp;540 const struct spi_nor_fixups *fixups;541};542 543#define SNOR_ID(...) \544 (&(const struct spi_nor_id){ \545 .bytes = (const u8[]){ __VA_ARGS__ }, \546 .len = sizeof((u8[]){ __VA_ARGS__ }), \547 })548 549#define SNOR_OTP(_len, _n_regions, _base, _offset) \550 (&(const struct spi_nor_otp_organization){ \551 .len = (_len), \552 .base = (_base), \553 .offset = (_offset), \554 .n_regions = (_n_regions), \555 })556 557/**558 * struct spi_nor_manufacturer - SPI NOR manufacturer object559 * @name: manufacturer name560 * @parts: array of parts supported by this manufacturer561 * @nparts: number of entries in the parts array562 * @fixups: hooks called at various points in time during spi_nor_scan()563 */564struct spi_nor_manufacturer {565 const char *name;566 const struct flash_info *parts;567 unsigned int nparts;568 const struct spi_nor_fixups *fixups;569};570 571/**572 * struct sfdp - SFDP data573 * @num_dwords: number of entries in the dwords array574 * @dwords: array of double words of the SFDP data575 */576struct sfdp {577 size_t num_dwords;578 u32 *dwords;579};580 581/* Manufacturer drivers. */582extern const struct spi_nor_manufacturer spi_nor_atmel;583extern const struct spi_nor_manufacturer spi_nor_eon;584extern const struct spi_nor_manufacturer spi_nor_esmt;585extern const struct spi_nor_manufacturer spi_nor_everspin;586extern const struct spi_nor_manufacturer spi_nor_gigadevice;587extern const struct spi_nor_manufacturer spi_nor_intel;588extern const struct spi_nor_manufacturer spi_nor_issi;589extern const struct spi_nor_manufacturer spi_nor_macronix;590extern const struct spi_nor_manufacturer spi_nor_micron;591extern const struct spi_nor_manufacturer spi_nor_st;592extern const struct spi_nor_manufacturer spi_nor_spansion;593extern const struct spi_nor_manufacturer spi_nor_sst;594extern const struct spi_nor_manufacturer spi_nor_winbond;595extern const struct spi_nor_manufacturer spi_nor_xmc;596 597extern const struct attribute_group *spi_nor_sysfs_groups[];598 599void spi_nor_spimem_setup_op(const struct spi_nor *nor,600 struct spi_mem_op *op,601 const enum spi_nor_protocol proto);602int spi_nor_write_enable(struct spi_nor *nor);603int spi_nor_write_disable(struct spi_nor *nor);604int spi_nor_set_4byte_addr_mode_en4b_ex4b(struct spi_nor *nor, bool enable);605int spi_nor_set_4byte_addr_mode_wren_en4b_ex4b(struct spi_nor *nor,606 bool enable);607int spi_nor_set_4byte_addr_mode_brwr(struct spi_nor *nor, bool enable);608int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable);609int spi_nor_wait_till_ready(struct spi_nor *nor);610int spi_nor_global_block_unlock(struct spi_nor *nor);611int spi_nor_prep_and_lock(struct spi_nor *nor);612void spi_nor_unlock_and_unprep(struct spi_nor *nor);613int spi_nor_sr1_bit6_quad_enable(struct spi_nor *nor);614int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor);615int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor);616int spi_nor_read_id(struct spi_nor *nor, u8 naddr, u8 ndummy, u8 *id,617 enum spi_nor_protocol reg_proto);618int spi_nor_read_sr(struct spi_nor *nor, u8 *sr);619int spi_nor_sr_ready(struct spi_nor *nor);620int spi_nor_read_cr(struct spi_nor *nor, u8 *cr);621int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len);622int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1);623int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr);624 625ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len,626 u8 *buf);627ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,628 const u8 *buf);629int spi_nor_read_any_reg(struct spi_nor *nor, struct spi_mem_op *op,630 enum spi_nor_protocol proto);631int spi_nor_write_any_volatile_reg(struct spi_nor *nor, struct spi_mem_op *op,632 enum spi_nor_protocol proto);633int spi_nor_erase_sector(struct spi_nor *nor, u32 addr);634 635int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf);636int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, size_t len,637 const u8 *buf);638int spi_nor_otp_erase_secr(struct spi_nor *nor, loff_t addr);639int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigned int region);640int spi_nor_otp_is_locked_sr2(struct spi_nor *nor, unsigned int region);641 642int spi_nor_hwcaps_read2cmd(u32 hwcaps);643int spi_nor_hwcaps_pp2cmd(u32 hwcaps);644u8 spi_nor_convert_3to4_read(u8 opcode);645void spi_nor_set_read_settings(struct spi_nor_read_command *read,646 u8 num_mode_clocks,647 u8 num_wait_states,648 u8 opcode,649 enum spi_nor_protocol proto);650void spi_nor_set_pp_settings(struct spi_nor_pp_command *pp, u8 opcode,651 enum spi_nor_protocol proto);652 653void spi_nor_set_erase_type(struct spi_nor_erase_type *erase, u32 size,654 u8 opcode);655void spi_nor_mask_erase_type(struct spi_nor_erase_type *erase);656void spi_nor_init_uniform_erase_map(struct spi_nor_erase_map *map,657 u8 erase_mask, u64 flash_size);658 659int spi_nor_post_bfpt_fixups(struct spi_nor *nor,660 const struct sfdp_parameter_header *bfpt_header,661 const struct sfdp_bfpt *bfpt);662 663void spi_nor_init_default_locking_ops(struct spi_nor *nor);664void spi_nor_try_unlock_all(struct spi_nor *nor);665void spi_nor_set_mtd_locking_ops(struct spi_nor *nor);666void spi_nor_set_mtd_otp_ops(struct spi_nor *nor);667 668int spi_nor_controller_ops_read_reg(struct spi_nor *nor, u8 opcode,669 u8 *buf, size_t len);670int spi_nor_controller_ops_write_reg(struct spi_nor *nor, u8 opcode,671 const u8 *buf, size_t len);672 673int spi_nor_check_sfdp_signature(struct spi_nor *nor);674int spi_nor_parse_sfdp(struct spi_nor *nor);675 676static inline struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd)677{678 return container_of(mtd, struct spi_nor, mtd);679}680 681/**682 * spi_nor_needs_sfdp() - returns true if SFDP parsing is used for this flash.683 *684 * Return: true if SFDP parsing is needed685 */686static inline bool spi_nor_needs_sfdp(const struct spi_nor *nor)687{688 /*689 * The flash size is one property parsed by the SFDP. We use it as an690 * indicator whether we need SFDP parsing for a particular flash. I.e.691 * non-legacy flash entries in flash_info will have a size of zero iff692 * SFDP should be used.693 */694 return !nor->info->size;695}696 697#ifdef CONFIG_DEBUG_FS698void spi_nor_debugfs_register(struct spi_nor *nor);699void spi_nor_debugfs_shutdown(void);700#else701static inline void spi_nor_debugfs_register(struct spi_nor *nor) {}702static inline void spi_nor_debugfs_shutdown(void) {}703#endif704 705#endif /* __LINUX_MTD_SPI_NOR_INTERNAL_H */706