1585 lines · c
1// SPDX-License-Identifier: GPL-2.02/*3 * Copyright (C) 2005, Intec Automation Inc.4 * Copyright (C) 2014, Freescale Semiconductor, Inc.5 */6 7#include <linux/bitfield.h>8#include <linux/mtd/spi-nor.h>9#include <linux/slab.h>10#include <linux/sort.h>11 12#include "core.h"13 14#define SFDP_PARAM_HEADER_ID(p) (((p)->id_msb << 8) | (p)->id_lsb)15#define SFDP_PARAM_HEADER_PTP(p) \16 (((p)->parameter_table_pointer[2] << 16) | \17 ((p)->parameter_table_pointer[1] << 8) | \18 ((p)->parameter_table_pointer[0] << 0))19#define SFDP_PARAM_HEADER_PARAM_LEN(p) ((p)->length * 4)20 21#define SFDP_BFPT_ID 0xff00 /* Basic Flash Parameter Table */22#define SFDP_SECTOR_MAP_ID 0xff81 /* Sector Map Table */23#define SFDP_4BAIT_ID 0xff84 /* 4-byte Address Instruction Table */24#define SFDP_PROFILE1_ID 0xff05 /* xSPI Profile 1.0 table. */25#define SFDP_SCCR_MAP_ID 0xff87 /*26 * Status, Control and Configuration27 * Register Map.28 */29#define SFDP_SCCR_MAP_MC_ID 0xff88 /*30 * Status, Control and Configuration31 * Register Map Offsets for Multi-Chip32 * SPI Memory Devices.33 */34 35#define SFDP_SIGNATURE 0x50444653U36 37struct sfdp_header {38 u32 signature; /* Ox50444653U <=> "SFDP" */39 u8 minor;40 u8 major;41 u8 nph; /* 0-base number of parameter headers */42 u8 unused;43 44 /* Basic Flash Parameter Table. */45 struct sfdp_parameter_header bfpt_header;46};47 48/* Fast Read settings. */49struct sfdp_bfpt_read {50 /* The Fast Read x-y-z hardware capability in params->hwcaps.mask. */51 u32 hwcaps;52 53 /*54 * The <supported_bit> bit in <supported_dword> BFPT DWORD tells us55 * whether the Fast Read x-y-z command is supported.56 */57 u32 supported_dword;58 u32 supported_bit;59 60 /*61 * The half-word at offset <setting_shift> in <setting_dword> BFPT DWORD62 * encodes the op code, the number of mode clocks and the number of wait63 * states to be used by Fast Read x-y-z command.64 */65 u32 settings_dword;66 u32 settings_shift;67 68 /* The SPI protocol for this Fast Read x-y-z command. */69 enum spi_nor_protocol proto;70};71 72struct sfdp_bfpt_erase {73 /*74 * The half-word at offset <shift> in DWORD <dword> encodes the75 * op code and erase sector size to be used by Sector Erase commands.76 */77 u32 dword;78 u32 shift;79};80 81#define SMPT_CMD_ADDRESS_LEN_MASK GENMASK(23, 22)82#define SMPT_CMD_ADDRESS_LEN_0 (0x0UL << 22)83#define SMPT_CMD_ADDRESS_LEN_3 (0x1UL << 22)84#define SMPT_CMD_ADDRESS_LEN_4 (0x2UL << 22)85#define SMPT_CMD_ADDRESS_LEN_USE_CURRENT (0x3UL << 22)86 87#define SMPT_CMD_READ_DUMMY_MASK GENMASK(19, 16)88#define SMPT_CMD_READ_DUMMY_SHIFT 1689#define SMPT_CMD_READ_DUMMY(_cmd) \90 (((_cmd) & SMPT_CMD_READ_DUMMY_MASK) >> SMPT_CMD_READ_DUMMY_SHIFT)91#define SMPT_CMD_READ_DUMMY_IS_VARIABLE 0xfUL92 93#define SMPT_CMD_READ_DATA_MASK GENMASK(31, 24)94#define SMPT_CMD_READ_DATA_SHIFT 2495#define SMPT_CMD_READ_DATA(_cmd) \96 (((_cmd) & SMPT_CMD_READ_DATA_MASK) >> SMPT_CMD_READ_DATA_SHIFT)97 98#define SMPT_CMD_OPCODE_MASK GENMASK(15, 8)99#define SMPT_CMD_OPCODE_SHIFT 8100#define SMPT_CMD_OPCODE(_cmd) \101 (((_cmd) & SMPT_CMD_OPCODE_MASK) >> SMPT_CMD_OPCODE_SHIFT)102 103#define SMPT_MAP_REGION_COUNT_MASK GENMASK(23, 16)104#define SMPT_MAP_REGION_COUNT_SHIFT 16105#define SMPT_MAP_REGION_COUNT(_header) \106 ((((_header) & SMPT_MAP_REGION_COUNT_MASK) >> \107 SMPT_MAP_REGION_COUNT_SHIFT) + 1)108 109#define SMPT_MAP_ID_MASK GENMASK(15, 8)110#define SMPT_MAP_ID_SHIFT 8111#define SMPT_MAP_ID(_header) \112 (((_header) & SMPT_MAP_ID_MASK) >> SMPT_MAP_ID_SHIFT)113 114#define SMPT_MAP_REGION_SIZE_MASK GENMASK(31, 8)115#define SMPT_MAP_REGION_SIZE_SHIFT 8116#define SMPT_MAP_REGION_SIZE(_region) \117 (((((_region) & SMPT_MAP_REGION_SIZE_MASK) >> \118 SMPT_MAP_REGION_SIZE_SHIFT) + 1) * 256)119 120#define SMPT_MAP_REGION_ERASE_TYPE_MASK GENMASK(3, 0)121#define SMPT_MAP_REGION_ERASE_TYPE(_region) \122 ((_region) & SMPT_MAP_REGION_ERASE_TYPE_MASK)123 124#define SMPT_DESC_TYPE_MAP BIT(1)125#define SMPT_DESC_END BIT(0)126 127#define SFDP_4BAIT_DWORD_MAX 2128 129struct sfdp_4bait {130 /* The hardware capability. */131 u32 hwcaps;132 133 /*134 * The <supported_bit> bit in DWORD1 of the 4BAIT tells us whether135 * the associated 4-byte address op code is supported.136 */137 u32 supported_bit;138};139 140/**141 * spi_nor_read_raw() - raw read of serial flash memory. read_opcode,142 * addr_nbytes and read_dummy members of the struct spi_nor143 * should be previously set.144 * @nor: pointer to a 'struct spi_nor'145 * @addr: offset in the serial flash memory146 * @len: number of bytes to read147 * @buf: buffer where the data is copied into (dma-safe memory)148 *149 * Return: 0 on success, -errno otherwise.150 */151static int spi_nor_read_raw(struct spi_nor *nor, u32 addr, size_t len, u8 *buf)152{153 ssize_t ret;154 155 while (len) {156 ret = spi_nor_read_data(nor, addr, len, buf);157 if (ret < 0)158 return ret;159 if (!ret || ret > len)160 return -EIO;161 162 buf += ret;163 addr += ret;164 len -= ret;165 }166 return 0;167}168 169/**170 * spi_nor_read_sfdp() - read Serial Flash Discoverable Parameters.171 * @nor: pointer to a 'struct spi_nor'172 * @addr: offset in the SFDP area to start reading data from173 * @len: number of bytes to read174 * @buf: buffer where the SFDP data are copied into (dma-safe memory)175 *176 * Whatever the actual numbers of bytes for address and dummy cycles are177 * for (Fast) Read commands, the Read SFDP (5Ah) instruction is always178 * followed by a 3-byte address and 8 dummy clock cycles.179 *180 * Return: 0 on success, -errno otherwise.181 */182static int spi_nor_read_sfdp(struct spi_nor *nor, u32 addr,183 size_t len, void *buf)184{185 u8 addr_nbytes, read_opcode, read_dummy;186 int ret;187 188 read_opcode = nor->read_opcode;189 addr_nbytes = nor->addr_nbytes;190 read_dummy = nor->read_dummy;191 192 nor->read_opcode = SPINOR_OP_RDSFDP;193 nor->addr_nbytes = 3;194 nor->read_dummy = 8;195 196 ret = spi_nor_read_raw(nor, addr, len, buf);197 198 nor->read_opcode = read_opcode;199 nor->addr_nbytes = addr_nbytes;200 nor->read_dummy = read_dummy;201 202 return ret;203}204 205/**206 * spi_nor_read_sfdp_dma_unsafe() - read Serial Flash Discoverable Parameters.207 * @nor: pointer to a 'struct spi_nor'208 * @addr: offset in the SFDP area to start reading data from209 * @len: number of bytes to read210 * @buf: buffer where the SFDP data are copied into211 *212 * Wrap spi_nor_read_sfdp() using a kmalloc'ed bounce buffer as @buf is now not213 * guaranteed to be dma-safe.214 *215 * Return: -ENOMEM if kmalloc() fails, the return code of spi_nor_read_sfdp()216 * otherwise.217 */218static int spi_nor_read_sfdp_dma_unsafe(struct spi_nor *nor, u32 addr,219 size_t len, void *buf)220{221 void *dma_safe_buf;222 int ret;223 224 dma_safe_buf = kmalloc(len, GFP_KERNEL);225 if (!dma_safe_buf)226 return -ENOMEM;227 228 ret = spi_nor_read_sfdp(nor, addr, len, dma_safe_buf);229 memcpy(buf, dma_safe_buf, len);230 kfree(dma_safe_buf);231 232 return ret;233}234 235static void236spi_nor_set_read_settings_from_bfpt(struct spi_nor_read_command *read,237 u16 half,238 enum spi_nor_protocol proto)239{240 read->num_mode_clocks = (half >> 5) & 0x07;241 read->num_wait_states = (half >> 0) & 0x1f;242 read->opcode = (half >> 8) & 0xff;243 read->proto = proto;244}245 246static const struct sfdp_bfpt_read sfdp_bfpt_reads[] = {247 /* Fast Read 1-1-2 */248 {249 SNOR_HWCAPS_READ_1_1_2,250 SFDP_DWORD(1), BIT(16), /* Supported bit */251 SFDP_DWORD(4), 0, /* Settings */252 SNOR_PROTO_1_1_2,253 },254 255 /* Fast Read 1-2-2 */256 {257 SNOR_HWCAPS_READ_1_2_2,258 SFDP_DWORD(1), BIT(20), /* Supported bit */259 SFDP_DWORD(4), 16, /* Settings */260 SNOR_PROTO_1_2_2,261 },262 263 /* Fast Read 2-2-2 */264 {265 SNOR_HWCAPS_READ_2_2_2,266 SFDP_DWORD(5), BIT(0), /* Supported bit */267 SFDP_DWORD(6), 16, /* Settings */268 SNOR_PROTO_2_2_2,269 },270 271 /* Fast Read 1-1-4 */272 {273 SNOR_HWCAPS_READ_1_1_4,274 SFDP_DWORD(1), BIT(22), /* Supported bit */275 SFDP_DWORD(3), 16, /* Settings */276 SNOR_PROTO_1_1_4,277 },278 279 /* Fast Read 1-4-4 */280 {281 SNOR_HWCAPS_READ_1_4_4,282 SFDP_DWORD(1), BIT(21), /* Supported bit */283 SFDP_DWORD(3), 0, /* Settings */284 SNOR_PROTO_1_4_4,285 },286 287 /* Fast Read 4-4-4 */288 {289 SNOR_HWCAPS_READ_4_4_4,290 SFDP_DWORD(5), BIT(4), /* Supported bit */291 SFDP_DWORD(7), 16, /* Settings */292 SNOR_PROTO_4_4_4,293 },294};295 296static const struct sfdp_bfpt_erase sfdp_bfpt_erases[] = {297 /* Erase Type 1 in DWORD8 bits[15:0] */298 {SFDP_DWORD(8), 0},299 300 /* Erase Type 2 in DWORD8 bits[31:16] */301 {SFDP_DWORD(8), 16},302 303 /* Erase Type 3 in DWORD9 bits[15:0] */304 {SFDP_DWORD(9), 0},305 306 /* Erase Type 4 in DWORD9 bits[31:16] */307 {SFDP_DWORD(9), 16},308};309 310/**311 * spi_nor_set_erase_settings_from_bfpt() - set erase type settings from BFPT312 * @erase: pointer to a structure that describes a SPI NOR erase type313 * @size: the size of the sector/block erased by the erase type314 * @opcode: the SPI command op code to erase the sector/block315 * @i: erase type index as sorted in the Basic Flash Parameter Table316 *317 * The supported Erase Types will be sorted at init in ascending order, with318 * the smallest Erase Type size being the first member in the erase_type array319 * of the spi_nor_erase_map structure. Save the Erase Type index as sorted in320 * the Basic Flash Parameter Table since it will be used later on to321 * synchronize with the supported Erase Types defined in SFDP optional tables.322 */323static void324spi_nor_set_erase_settings_from_bfpt(struct spi_nor_erase_type *erase,325 u32 size, u8 opcode, u8 i)326{327 erase->idx = i;328 spi_nor_set_erase_type(erase, size, opcode);329}330 331/**332 * spi_nor_map_cmp_erase_type() - compare the map's erase types by size333 * @l: member in the left half of the map's erase_type array334 * @r: member in the right half of the map's erase_type array335 *336 * Comparison function used in the sort() call to sort in ascending order the337 * map's erase types, the smallest erase type size being the first member in the338 * sorted erase_type array.339 *340 * Return: the result of @l->size - @r->size341 */342static int spi_nor_map_cmp_erase_type(const void *l, const void *r)343{344 const struct spi_nor_erase_type *left = l, *right = r;345 346 return left->size - right->size;347}348 349/**350 * spi_nor_sort_erase_mask() - sort erase mask351 * @map: the erase map of the SPI NOR352 * @erase_mask: the erase type mask to be sorted353 *354 * Replicate the sort done for the map's erase types in BFPT: sort the erase355 * mask in ascending order with the smallest erase type size starting from356 * BIT(0) in the sorted erase mask.357 *358 * Return: sorted erase mask.359 */360static u8 spi_nor_sort_erase_mask(struct spi_nor_erase_map *map, u8 erase_mask)361{362 struct spi_nor_erase_type *erase_type = map->erase_type;363 int i;364 u8 sorted_erase_mask = 0;365 366 if (!erase_mask)367 return 0;368 369 /* Replicate the sort done for the map's erase types. */370 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++)371 if (erase_type[i].size && erase_mask & BIT(erase_type[i].idx))372 sorted_erase_mask |= BIT(i);373 374 return sorted_erase_mask;375}376 377/**378 * spi_nor_regions_sort_erase_types() - sort erase types in each region379 * @map: the erase map of the SPI NOR380 *381 * Function assumes that the erase types defined in the erase map are already382 * sorted in ascending order, with the smallest erase type size being the first383 * member in the erase_type array. It replicates the sort done for the map's384 * erase types. Each region's erase bitmask will indicate which erase types are385 * supported from the sorted erase types defined in the erase map.386 * Sort the all region's erase type at init in order to speed up the process of387 * finding the best erase command at runtime.388 */389static void spi_nor_regions_sort_erase_types(struct spi_nor_erase_map *map)390{391 struct spi_nor_erase_region *region = map->regions;392 u8 sorted_erase_mask;393 unsigned int i;394 395 for (i = 0; i < map->n_regions; i++) {396 sorted_erase_mask =397 spi_nor_sort_erase_mask(map, region[i].erase_mask);398 399 /* Overwrite erase mask. */400 region[i].erase_mask = sorted_erase_mask;401 }402}403 404/**405 * spi_nor_parse_bfpt() - read and parse the Basic Flash Parameter Table.406 * @nor: pointer to a 'struct spi_nor'407 * @bfpt_header: pointer to the 'struct sfdp_parameter_header' describing408 * the Basic Flash Parameter Table length and version409 *410 * The Basic Flash Parameter Table is the main and only mandatory table as411 * defined by the SFDP (JESD216) specification.412 * It provides us with the total size (memory density) of the data array and413 * the number of address bytes for Fast Read, Page Program and Sector Erase414 * commands.415 * For Fast READ commands, it also gives the number of mode clock cycles and416 * wait states (regrouped in the number of dummy clock cycles) for each417 * supported instruction op code.418 * For Page Program, the page size is now available since JESD216 rev A, however419 * the supported instruction op codes are still not provided.420 * For Sector Erase commands, this table stores the supported instruction op421 * codes and the associated sector sizes.422 * Finally, the Quad Enable Requirements (QER) are also available since JESD216423 * rev A. The QER bits encode the manufacturer dependent procedure to be424 * executed to set the Quad Enable (QE) bit in some internal register of the425 * Quad SPI memory. Indeed the QE bit, when it exists, must be set before426 * sending any Quad SPI command to the memory. Actually, setting the QE bit427 * tells the memory to reassign its WP# and HOLD#/RESET# pins to functions IO2428 * and IO3 hence enabling 4 (Quad) I/O lines.429 *430 * Return: 0 on success, -errno otherwise.431 */432static int spi_nor_parse_bfpt(struct spi_nor *nor,433 const struct sfdp_parameter_header *bfpt_header)434{435 struct spi_nor_flash_parameter *params = nor->params;436 struct spi_nor_erase_map *map = ¶ms->erase_map;437 struct spi_nor_erase_type *erase_type = map->erase_type;438 struct sfdp_bfpt bfpt;439 size_t len;440 int i, cmd, err;441 u32 addr, val;442 u32 dword;443 u16 half;444 u8 erase_mask;445 u8 wait_states, mode_clocks, opcode;446 447 /* JESD216 Basic Flash Parameter Table length is at least 9 DWORDs. */448 if (bfpt_header->length < BFPT_DWORD_MAX_JESD216)449 return -EINVAL;450 451 /* Read the Basic Flash Parameter Table. */452 len = min_t(size_t, sizeof(bfpt),453 bfpt_header->length * sizeof(u32));454 addr = SFDP_PARAM_HEADER_PTP(bfpt_header);455 memset(&bfpt, 0, sizeof(bfpt));456 err = spi_nor_read_sfdp_dma_unsafe(nor, addr, len, &bfpt);457 if (err < 0)458 return err;459 460 /* Fix endianness of the BFPT DWORDs. */461 le32_to_cpu_array(bfpt.dwords, BFPT_DWORD_MAX);462 463 /* Number of address bytes. */464 switch (bfpt.dwords[SFDP_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) {465 case BFPT_DWORD1_ADDRESS_BYTES_3_ONLY:466 case BFPT_DWORD1_ADDRESS_BYTES_3_OR_4:467 params->addr_nbytes = 3;468 params->addr_mode_nbytes = 3;469 break;470 471 case BFPT_DWORD1_ADDRESS_BYTES_4_ONLY:472 params->addr_nbytes = 4;473 params->addr_mode_nbytes = 4;474 break;475 476 default:477 break;478 }479 480 /* Flash Memory Density (in bits). */481 val = bfpt.dwords[SFDP_DWORD(2)];482 if (val & BIT(31)) {483 val &= ~BIT(31);484 485 /*486 * Prevent overflows on params->size. Anyway, a NOR of 2^64487 * bits is unlikely to exist so this error probably means488 * the BFPT we are reading is corrupted/wrong.489 */490 if (val > 63)491 return -EINVAL;492 493 params->size = 1ULL << val;494 } else {495 params->size = val + 1;496 }497 params->size >>= 3; /* Convert to bytes. */498 499 /* Fast Read settings. */500 for (i = 0; i < ARRAY_SIZE(sfdp_bfpt_reads); i++) {501 const struct sfdp_bfpt_read *rd = &sfdp_bfpt_reads[i];502 struct spi_nor_read_command *read;503 504 if (!(bfpt.dwords[rd->supported_dword] & rd->supported_bit)) {505 params->hwcaps.mask &= ~rd->hwcaps;506 continue;507 }508 509 params->hwcaps.mask |= rd->hwcaps;510 cmd = spi_nor_hwcaps_read2cmd(rd->hwcaps);511 read = ¶ms->reads[cmd];512 half = bfpt.dwords[rd->settings_dword] >> rd->settings_shift;513 spi_nor_set_read_settings_from_bfpt(read, half, rd->proto);514 }515 516 /*517 * Sector Erase settings. Reinitialize the uniform erase map using the518 * Erase Types defined in the bfpt table.519 */520 erase_mask = 0;521 memset(¶ms->erase_map, 0, sizeof(params->erase_map));522 for (i = 0; i < ARRAY_SIZE(sfdp_bfpt_erases); i++) {523 const struct sfdp_bfpt_erase *er = &sfdp_bfpt_erases[i];524 u32 erasesize;525 u8 opcode;526 527 half = bfpt.dwords[er->dword] >> er->shift;528 erasesize = half & 0xff;529 530 /* erasesize == 0 means this Erase Type is not supported. */531 if (!erasesize)532 continue;533 534 erasesize = 1U << erasesize;535 opcode = (half >> 8) & 0xff;536 erase_mask |= BIT(i);537 spi_nor_set_erase_settings_from_bfpt(&erase_type[i], erasesize,538 opcode, i);539 }540 spi_nor_init_uniform_erase_map(map, erase_mask, params->size);541 /*542 * Sort all the map's Erase Types in ascending order with the smallest543 * erase size being the first member in the erase_type array.544 */545 sort(erase_type, SNOR_ERASE_TYPE_MAX, sizeof(erase_type[0]),546 spi_nor_map_cmp_erase_type, NULL);547 /*548 * Sort the erase types in the uniform region in order to update the549 * uniform_erase_type bitmask. The bitmask will be used later on when550 * selecting the uniform erase.551 */552 spi_nor_regions_sort_erase_types(map);553 554 /* Stop here if not JESD216 rev A or later. */555 if (bfpt_header->length == BFPT_DWORD_MAX_JESD216)556 return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt);557 558 /* Page size: this field specifies 'N' so the page size = 2^N bytes. */559 val = bfpt.dwords[SFDP_DWORD(11)];560 val &= BFPT_DWORD11_PAGE_SIZE_MASK;561 val >>= BFPT_DWORD11_PAGE_SIZE_SHIFT;562 params->page_size = 1U << val;563 564 /* Quad Enable Requirements. */565 switch (bfpt.dwords[SFDP_DWORD(15)] & BFPT_DWORD15_QER_MASK) {566 case BFPT_DWORD15_QER_NONE:567 params->quad_enable = NULL;568 break;569 570 case BFPT_DWORD15_QER_SR2_BIT1_BUGGY:571 /*572 * Writing only one byte to the Status Register has the573 * side-effect of clearing Status Register 2.574 */575 case BFPT_DWORD15_QER_SR2_BIT1_NO_RD:576 /*577 * Read Configuration Register (35h) instruction is not578 * supported.579 */580 nor->flags |= SNOR_F_HAS_16BIT_SR | SNOR_F_NO_READ_CR;581 params->quad_enable = spi_nor_sr2_bit1_quad_enable;582 break;583 584 case BFPT_DWORD15_QER_SR1_BIT6:585 nor->flags &= ~SNOR_F_HAS_16BIT_SR;586 params->quad_enable = spi_nor_sr1_bit6_quad_enable;587 break;588 589 case BFPT_DWORD15_QER_SR2_BIT7:590 nor->flags &= ~SNOR_F_HAS_16BIT_SR;591 params->quad_enable = spi_nor_sr2_bit7_quad_enable;592 break;593 594 case BFPT_DWORD15_QER_SR2_BIT1:595 /*596 * JESD216 rev B or later does not specify if writing only one597 * byte to the Status Register clears or not the Status598 * Register 2, so let's be cautious and keep the default599 * assumption of a 16-bit Write Status (01h) command.600 */601 nor->flags |= SNOR_F_HAS_16BIT_SR;602 603 params->quad_enable = spi_nor_sr2_bit1_quad_enable;604 break;605 606 default:607 dev_dbg(nor->dev, "BFPT QER reserved value used\n");608 break;609 }610 611 dword = bfpt.dwords[SFDP_DWORD(16)] & BFPT_DWORD16_4B_ADDR_MODE_MASK;612 if (SFDP_MASK_CHECK(dword, BFPT_DWORD16_4B_ADDR_MODE_BRWR))613 params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode_brwr;614 else if (SFDP_MASK_CHECK(dword, BFPT_DWORD16_4B_ADDR_MODE_WREN_EN4B_EX4B))615 params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode_wren_en4b_ex4b;616 else if (SFDP_MASK_CHECK(dword, BFPT_DWORD16_4B_ADDR_MODE_EN4B_EX4B))617 params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode_en4b_ex4b;618 else619 dev_dbg(nor->dev, "BFPT: 4-Byte Address Mode method is not recognized or not implemented\n");620 621 /* Soft Reset support. */622 if (bfpt.dwords[SFDP_DWORD(16)] & BFPT_DWORD16_SWRST_EN_RST)623 nor->flags |= SNOR_F_SOFT_RESET;624 625 /* Stop here if not JESD216 rev C or later. */626 if (bfpt_header->length == BFPT_DWORD_MAX_JESD216B)627 return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt);628 629 /* Parse 1-1-8 read instruction */630 opcode = FIELD_GET(BFPT_DWORD17_RD_1_1_8_CMD, bfpt.dwords[SFDP_DWORD(17)]);631 if (opcode) {632 mode_clocks = FIELD_GET(BFPT_DWORD17_RD_1_1_8_MODE_CLOCKS,633 bfpt.dwords[SFDP_DWORD(17)]);634 wait_states = FIELD_GET(BFPT_DWORD17_RD_1_1_8_WAIT_STATES,635 bfpt.dwords[SFDP_DWORD(17)]);636 params->hwcaps.mask |= SNOR_HWCAPS_READ_1_1_8;637 spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_1_1_8],638 mode_clocks, wait_states, opcode,639 SNOR_PROTO_1_1_8);640 }641 642 /* Parse 1-8-8 read instruction */643 opcode = FIELD_GET(BFPT_DWORD17_RD_1_8_8_CMD, bfpt.dwords[SFDP_DWORD(17)]);644 if (opcode) {645 mode_clocks = FIELD_GET(BFPT_DWORD17_RD_1_8_8_MODE_CLOCKS,646 bfpt.dwords[SFDP_DWORD(17)]);647 wait_states = FIELD_GET(BFPT_DWORD17_RD_1_8_8_WAIT_STATES,648 bfpt.dwords[SFDP_DWORD(17)]);649 params->hwcaps.mask |= SNOR_HWCAPS_READ_1_8_8;650 spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_1_8_8],651 mode_clocks, wait_states, opcode,652 SNOR_PROTO_1_8_8);653 }654 655 /* 8D-8D-8D command extension. */656 switch (bfpt.dwords[SFDP_DWORD(18)] & BFPT_DWORD18_CMD_EXT_MASK) {657 case BFPT_DWORD18_CMD_EXT_REP:658 nor->cmd_ext_type = SPI_NOR_EXT_REPEAT;659 break;660 661 case BFPT_DWORD18_CMD_EXT_INV:662 nor->cmd_ext_type = SPI_NOR_EXT_INVERT;663 break;664 665 case BFPT_DWORD18_CMD_EXT_RES:666 dev_dbg(nor->dev, "Reserved command extension used\n");667 break;668 669 case BFPT_DWORD18_CMD_EXT_16B:670 dev_dbg(nor->dev, "16-bit opcodes not supported\n");671 return -EOPNOTSUPP;672 }673 674 return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt);675}676 677/**678 * spi_nor_smpt_addr_nbytes() - return the number of address bytes used in the679 * configuration detection command.680 * @nor: pointer to a 'struct spi_nor'681 * @settings: configuration detection command descriptor, dword1682 */683static u8 spi_nor_smpt_addr_nbytes(const struct spi_nor *nor, const u32 settings)684{685 switch (settings & SMPT_CMD_ADDRESS_LEN_MASK) {686 case SMPT_CMD_ADDRESS_LEN_0:687 return 0;688 case SMPT_CMD_ADDRESS_LEN_3:689 return 3;690 case SMPT_CMD_ADDRESS_LEN_4:691 return 4;692 case SMPT_CMD_ADDRESS_LEN_USE_CURRENT:693 default:694 return nor->params->addr_mode_nbytes;695 }696}697 698/**699 * spi_nor_smpt_read_dummy() - return the configuration detection command read700 * latency, in clock cycles.701 * @nor: pointer to a 'struct spi_nor'702 * @settings: configuration detection command descriptor, dword1703 *704 * Return: the number of dummy cycles for an SMPT read705 */706static u8 spi_nor_smpt_read_dummy(const struct spi_nor *nor, const u32 settings)707{708 u8 read_dummy = SMPT_CMD_READ_DUMMY(settings);709 710 if (read_dummy == SMPT_CMD_READ_DUMMY_IS_VARIABLE)711 return nor->read_dummy;712 return read_dummy;713}714 715/**716 * spi_nor_get_map_in_use() - get the configuration map in use717 * @nor: pointer to a 'struct spi_nor'718 * @smpt: pointer to the sector map parameter table719 * @smpt_len: sector map parameter table length720 *721 * Return: pointer to the map in use, ERR_PTR(-errno) otherwise.722 */723static const u32 *spi_nor_get_map_in_use(struct spi_nor *nor, const u32 *smpt,724 u8 smpt_len)725{726 const u32 *ret;727 u8 *buf;728 u32 addr;729 int err;730 u8 i;731 u8 addr_nbytes, read_opcode, read_dummy;732 u8 read_data_mask, map_id;733 734 /* Use a kmalloc'ed bounce buffer to guarantee it is DMA-able. */735 buf = kmalloc(sizeof(*buf), GFP_KERNEL);736 if (!buf)737 return ERR_PTR(-ENOMEM);738 739 addr_nbytes = nor->addr_nbytes;740 read_dummy = nor->read_dummy;741 read_opcode = nor->read_opcode;742 743 map_id = 0;744 /* Determine if there are any optional Detection Command Descriptors */745 for (i = 0; i < smpt_len; i += 2) {746 if (smpt[i] & SMPT_DESC_TYPE_MAP)747 break;748 749 read_data_mask = SMPT_CMD_READ_DATA(smpt[i]);750 nor->addr_nbytes = spi_nor_smpt_addr_nbytes(nor, smpt[i]);751 nor->read_dummy = spi_nor_smpt_read_dummy(nor, smpt[i]);752 nor->read_opcode = SMPT_CMD_OPCODE(smpt[i]);753 addr = smpt[i + 1];754 755 err = spi_nor_read_raw(nor, addr, 1, buf);756 if (err) {757 ret = ERR_PTR(err);758 goto out;759 }760 761 /*762 * Build an index value that is used to select the Sector Map763 * Configuration that is currently in use.764 */765 map_id = map_id << 1 | !!(*buf & read_data_mask);766 }767 768 /*769 * If command descriptors are provided, they always precede map770 * descriptors in the table. There is no need to start the iteration771 * over smpt array all over again.772 *773 * Find the matching configuration map.774 */775 ret = ERR_PTR(-EINVAL);776 while (i < smpt_len) {777 if (SMPT_MAP_ID(smpt[i]) == map_id) {778 ret = smpt + i;779 break;780 }781 782 /*783 * If there are no more configuration map descriptors and no784 * configuration ID matched the configuration identifier, the785 * sector address map is unknown.786 */787 if (smpt[i] & SMPT_DESC_END)788 break;789 790 /* increment the table index to the next map */791 i += SMPT_MAP_REGION_COUNT(smpt[i]) + 1;792 }793 794 /* fall through */795out:796 kfree(buf);797 nor->addr_nbytes = addr_nbytes;798 nor->read_dummy = read_dummy;799 nor->read_opcode = read_opcode;800 return ret;801}802 803/**804 * spi_nor_region_check_overlay() - set overlay bit when the region is overlaid805 * @region: pointer to a structure that describes a SPI NOR erase region806 * @erase: pointer to a structure that describes a SPI NOR erase type807 * @erase_type: erase type bitmask808 */809static void810spi_nor_region_check_overlay(struct spi_nor_erase_region *region,811 const struct spi_nor_erase_type *erase,812 const u8 erase_type)813{814 int i;815 816 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) {817 if (!(erase[i].size && erase_type & BIT(erase[i].idx)))818 continue;819 if (region->size & erase[i].size_mask) {820 region->overlaid = true;821 return;822 }823 }824}825 826/**827 * spi_nor_init_non_uniform_erase_map() - initialize the non-uniform erase map828 * @nor: pointer to a 'struct spi_nor'829 * @smpt: pointer to the sector map parameter table830 *831 * Return: 0 on success, -errno otherwise.832 */833static int spi_nor_init_non_uniform_erase_map(struct spi_nor *nor,834 const u32 *smpt)835{836 struct spi_nor_erase_map *map = &nor->params->erase_map;837 struct spi_nor_erase_type *erase = map->erase_type;838 struct spi_nor_erase_region *region;839 u64 offset;840 u32 region_count;841 int i, j;842 u8 uniform_erase_type, save_uniform_erase_type;843 u8 erase_type, regions_erase_type;844 845 region_count = SMPT_MAP_REGION_COUNT(*smpt);846 /*847 * The regions will be freed when the driver detaches from the848 * device.849 */850 region = devm_kcalloc(nor->dev, region_count, sizeof(*region),851 GFP_KERNEL);852 if (!region)853 return -ENOMEM;854 map->regions = region;855 map->n_regions = region_count;856 857 uniform_erase_type = 0xff;858 regions_erase_type = 0;859 offset = 0;860 /* Populate regions. */861 for (i = 0; i < region_count; i++) {862 j = i + 1; /* index for the region dword */863 region[i].offset = offset;864 region[i].size = SMPT_MAP_REGION_SIZE(smpt[j]);865 erase_type = SMPT_MAP_REGION_ERASE_TYPE(smpt[j]);866 region[i].erase_mask = erase_type;867 868 spi_nor_region_check_overlay(®ion[i], erase, erase_type);869 870 /*871 * Save the erase types that are supported in all regions and872 * can erase the entire flash memory.873 */874 uniform_erase_type &= erase_type;875 876 /*877 * regions_erase_type mask will indicate all the erase types878 * supported in this configuration map.879 */880 regions_erase_type |= erase_type;881 882 offset = region[i].offset + region[i].size;883 }884 885 save_uniform_erase_type = map->uniform_region.erase_mask;886 map->uniform_region.erase_mask =887 spi_nor_sort_erase_mask(map,888 uniform_erase_type);889 890 if (!regions_erase_type) {891 /*892 * Roll back to the previous uniform_erase_type mask, SMPT is893 * broken.894 */895 map->uniform_region.erase_mask = save_uniform_erase_type;896 return -EINVAL;897 }898 899 /*900 * BFPT advertises all the erase types supported by all the possible901 * map configurations. Mask out the erase types that are not supported902 * by the current map configuration.903 */904 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++)905 if (!(regions_erase_type & BIT(erase[i].idx)))906 spi_nor_mask_erase_type(&erase[i]);907 908 return 0;909}910 911/**912 * spi_nor_parse_smpt() - parse Sector Map Parameter Table913 * @nor: pointer to a 'struct spi_nor'914 * @smpt_header: sector map parameter table header915 *916 * This table is optional, but when available, we parse it to identify the917 * location and size of sectors within the main data array of the flash memory918 * device and to identify which Erase Types are supported by each sector.919 *920 * Return: 0 on success, -errno otherwise.921 */922static int spi_nor_parse_smpt(struct spi_nor *nor,923 const struct sfdp_parameter_header *smpt_header)924{925 const u32 *sector_map;926 u32 *smpt;927 size_t len;928 u32 addr;929 int ret;930 931 /* Read the Sector Map Parameter Table. */932 len = smpt_header->length * sizeof(*smpt);933 smpt = kmalloc(len, GFP_KERNEL);934 if (!smpt)935 return -ENOMEM;936 937 addr = SFDP_PARAM_HEADER_PTP(smpt_header);938 ret = spi_nor_read_sfdp(nor, addr, len, smpt);939 if (ret)940 goto out;941 942 /* Fix endianness of the SMPT DWORDs. */943 le32_to_cpu_array(smpt, smpt_header->length);944 945 sector_map = spi_nor_get_map_in_use(nor, smpt, smpt_header->length);946 if (IS_ERR(sector_map)) {947 ret = PTR_ERR(sector_map);948 goto out;949 }950 951 ret = spi_nor_init_non_uniform_erase_map(nor, sector_map);952 if (ret)953 goto out;954 955 spi_nor_regions_sort_erase_types(&nor->params->erase_map);956 /* fall through */957out:958 kfree(smpt);959 return ret;960}961 962/**963 * spi_nor_parse_4bait() - parse the 4-Byte Address Instruction Table964 * @nor: pointer to a 'struct spi_nor'.965 * @param_header: pointer to the 'struct sfdp_parameter_header' describing966 * the 4-Byte Address Instruction Table length and version.967 *968 * Return: 0 on success, -errno otherwise.969 */970static int spi_nor_parse_4bait(struct spi_nor *nor,971 const struct sfdp_parameter_header *param_header)972{973 static const struct sfdp_4bait reads[] = {974 { SNOR_HWCAPS_READ, BIT(0) },975 { SNOR_HWCAPS_READ_FAST, BIT(1) },976 { SNOR_HWCAPS_READ_1_1_2, BIT(2) },977 { SNOR_HWCAPS_READ_1_2_2, BIT(3) },978 { SNOR_HWCAPS_READ_1_1_4, BIT(4) },979 { SNOR_HWCAPS_READ_1_4_4, BIT(5) },980 { SNOR_HWCAPS_READ_1_1_1_DTR, BIT(13) },981 { SNOR_HWCAPS_READ_1_2_2_DTR, BIT(14) },982 { SNOR_HWCAPS_READ_1_4_4_DTR, BIT(15) },983 { SNOR_HWCAPS_READ_1_1_8, BIT(20) },984 { SNOR_HWCAPS_READ_1_8_8, BIT(21) },985 };986 static const struct sfdp_4bait programs[] = {987 { SNOR_HWCAPS_PP, BIT(6) },988 { SNOR_HWCAPS_PP_1_1_4, BIT(7) },989 { SNOR_HWCAPS_PP_1_4_4, BIT(8) },990 };991 static const struct sfdp_4bait erases[SNOR_ERASE_TYPE_MAX] = {992 { 0u /* not used */, BIT(9) },993 { 0u /* not used */, BIT(10) },994 { 0u /* not used */, BIT(11) },995 { 0u /* not used */, BIT(12) },996 };997 struct spi_nor_flash_parameter *params = nor->params;998 struct spi_nor_pp_command *params_pp = params->page_programs;999 struct spi_nor_erase_map *map = ¶ms->erase_map;1000 struct spi_nor_erase_type *erase_type = map->erase_type;1001 u32 *dwords;1002 size_t len;1003 u32 addr, discard_hwcaps, read_hwcaps, pp_hwcaps, erase_mask;1004 int i, ret;1005 1006 if (param_header->major != SFDP_JESD216_MAJOR ||1007 param_header->length < SFDP_4BAIT_DWORD_MAX)1008 return -EINVAL;1009 1010 /* Read the 4-byte Address Instruction Table. */1011 len = sizeof(*dwords) * SFDP_4BAIT_DWORD_MAX;1012 1013 /* Use a kmalloc'ed bounce buffer to guarantee it is DMA-able. */1014 dwords = kmalloc(len, GFP_KERNEL);1015 if (!dwords)1016 return -ENOMEM;1017 1018 addr = SFDP_PARAM_HEADER_PTP(param_header);1019 ret = spi_nor_read_sfdp(nor, addr, len, dwords);1020 if (ret)1021 goto out;1022 1023 /* Fix endianness of the 4BAIT DWORDs. */1024 le32_to_cpu_array(dwords, SFDP_4BAIT_DWORD_MAX);1025 1026 /*1027 * Compute the subset of (Fast) Read commands for which the 4-byte1028 * version is supported.1029 */1030 discard_hwcaps = 0;1031 read_hwcaps = 0;1032 for (i = 0; i < ARRAY_SIZE(reads); i++) {1033 const struct sfdp_4bait *read = &reads[i];1034 1035 discard_hwcaps |= read->hwcaps;1036 if ((params->hwcaps.mask & read->hwcaps) &&1037 (dwords[SFDP_DWORD(1)] & read->supported_bit))1038 read_hwcaps |= read->hwcaps;1039 }1040 1041 /*1042 * Compute the subset of Page Program commands for which the 4-byte1043 * version is supported.1044 */1045 pp_hwcaps = 0;1046 for (i = 0; i < ARRAY_SIZE(programs); i++) {1047 const struct sfdp_4bait *program = &programs[i];1048 1049 /*1050 * The 4 Byte Address Instruction (Optional) Table is the only1051 * SFDP table that indicates support for Page Program Commands.1052 * Bypass the params->hwcaps.mask and consider 4BAIT the biggest1053 * authority for specifying Page Program support.1054 */1055 discard_hwcaps |= program->hwcaps;1056 if (dwords[SFDP_DWORD(1)] & program->supported_bit)1057 pp_hwcaps |= program->hwcaps;1058 }1059 1060 /*1061 * Compute the subset of Sector Erase commands for which the 4-byte1062 * version is supported.1063 */1064 erase_mask = 0;1065 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) {1066 const struct sfdp_4bait *erase = &erases[i];1067 1068 if (dwords[SFDP_DWORD(1)] & erase->supported_bit)1069 erase_mask |= BIT(i);1070 }1071 1072 /* Replicate the sort done for the map's erase types in BFPT. */1073 erase_mask = spi_nor_sort_erase_mask(map, erase_mask);1074 1075 /*1076 * We need at least one 4-byte op code per read, program and erase1077 * operation; the .read(), .write() and .erase() hooks share the1078 * nor->addr_nbytes value.1079 */1080 if (!read_hwcaps || !pp_hwcaps || !erase_mask)1081 goto out;1082 1083 /*1084 * Discard all operations from the 4-byte instruction set which are1085 * not supported by this memory.1086 */1087 params->hwcaps.mask &= ~discard_hwcaps;1088 params->hwcaps.mask |= (read_hwcaps | pp_hwcaps);1089 1090 /* Use the 4-byte address instruction set. */1091 for (i = 0; i < SNOR_CMD_READ_MAX; i++) {1092 struct spi_nor_read_command *read_cmd = ¶ms->reads[i];1093 1094 read_cmd->opcode = spi_nor_convert_3to4_read(read_cmd->opcode);1095 }1096 1097 /* 4BAIT is the only SFDP table that indicates page program support. */1098 if (pp_hwcaps & SNOR_HWCAPS_PP) {1099 spi_nor_set_pp_settings(¶ms_pp[SNOR_CMD_PP],1100 SPINOR_OP_PP_4B, SNOR_PROTO_1_1_1);1101 /*1102 * Since xSPI Page Program opcode is backward compatible with1103 * Legacy SPI, use Legacy SPI opcode there as well.1104 */1105 spi_nor_set_pp_settings(¶ms_pp[SNOR_CMD_PP_8_8_8_DTR],1106 SPINOR_OP_PP_4B, SNOR_PROTO_8_8_8_DTR);1107 }1108 if (pp_hwcaps & SNOR_HWCAPS_PP_1_1_4)1109 spi_nor_set_pp_settings(¶ms_pp[SNOR_CMD_PP_1_1_4],1110 SPINOR_OP_PP_1_1_4_4B,1111 SNOR_PROTO_1_1_4);1112 if (pp_hwcaps & SNOR_HWCAPS_PP_1_4_4)1113 spi_nor_set_pp_settings(¶ms_pp[SNOR_CMD_PP_1_4_4],1114 SPINOR_OP_PP_1_4_4_4B,1115 SNOR_PROTO_1_4_4);1116 1117 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) {1118 if (erase_mask & BIT(i))1119 erase_type[i].opcode = (dwords[SFDP_DWORD(2)] >>1120 erase_type[i].idx * 8) & 0xFF;1121 else1122 spi_nor_mask_erase_type(&erase_type[i]);1123 }1124 1125 /*1126 * We set SNOR_F_HAS_4BAIT in order to skip spi_nor_set_4byte_opcodes()1127 * later because we already did the conversion to 4byte opcodes. Also,1128 * this latest function implements a legacy quirk for the erase size of1129 * Spansion memory. However this quirk is no longer needed with new1130 * SFDP compliant memories.1131 */1132 params->addr_nbytes = 4;1133 nor->flags |= SNOR_F_4B_OPCODES | SNOR_F_HAS_4BAIT;1134 1135 /* fall through */1136out:1137 kfree(dwords);1138 return ret;1139}1140 1141#define PROFILE1_DWORD1_RDSR_ADDR_BYTES BIT(29)1142#define PROFILE1_DWORD1_RDSR_DUMMY BIT(28)1143#define PROFILE1_DWORD1_RD_FAST_CMD GENMASK(15, 8)1144#define PROFILE1_DWORD4_DUMMY_200MHZ GENMASK(11, 7)1145#define PROFILE1_DWORD5_DUMMY_166MHZ GENMASK(31, 27)1146#define PROFILE1_DWORD5_DUMMY_133MHZ GENMASK(21, 17)1147#define PROFILE1_DWORD5_DUMMY_100MHZ GENMASK(11, 7)1148 1149/**1150 * spi_nor_parse_profile1() - parse the xSPI Profile 1.0 table1151 * @nor: pointer to a 'struct spi_nor'1152 * @profile1_header: pointer to the 'struct sfdp_parameter_header' describing1153 * the Profile 1.0 Table length and version.1154 *1155 * Return: 0 on success, -errno otherwise.1156 */1157static int spi_nor_parse_profile1(struct spi_nor *nor,1158 const struct sfdp_parameter_header *profile1_header)1159{1160 u32 *dwords, addr;1161 size_t len;1162 int ret;1163 u8 dummy, opcode;1164 1165 len = profile1_header->length * sizeof(*dwords);1166 dwords = kmalloc(len, GFP_KERNEL);1167 if (!dwords)1168 return -ENOMEM;1169 1170 addr = SFDP_PARAM_HEADER_PTP(profile1_header);1171 ret = spi_nor_read_sfdp(nor, addr, len, dwords);1172 if (ret)1173 goto out;1174 1175 le32_to_cpu_array(dwords, profile1_header->length);1176 1177 /* Get 8D-8D-8D fast read opcode and dummy cycles. */1178 opcode = FIELD_GET(PROFILE1_DWORD1_RD_FAST_CMD, dwords[SFDP_DWORD(1)]);1179 1180 /* Set the Read Status Register dummy cycles and dummy address bytes. */1181 if (dwords[SFDP_DWORD(1)] & PROFILE1_DWORD1_RDSR_DUMMY)1182 nor->params->rdsr_dummy = 8;1183 else1184 nor->params->rdsr_dummy = 4;1185 1186 if (dwords[SFDP_DWORD(1)] & PROFILE1_DWORD1_RDSR_ADDR_BYTES)1187 nor->params->rdsr_addr_nbytes = 4;1188 else1189 nor->params->rdsr_addr_nbytes = 0;1190 1191 /*1192 * We don't know what speed the controller is running at. Find the1193 * dummy cycles for the fastest frequency the flash can run at to be1194 * sure we are never short of dummy cycles. A value of 0 means the1195 * frequency is not supported.1196 *1197 * Default to PROFILE1_DUMMY_DEFAULT if we don't find anything, and let1198 * flashes set the correct value if needed in their fixup hooks.1199 */1200 dummy = FIELD_GET(PROFILE1_DWORD4_DUMMY_200MHZ, dwords[SFDP_DWORD(4)]);1201 if (!dummy)1202 dummy = FIELD_GET(PROFILE1_DWORD5_DUMMY_166MHZ,1203 dwords[SFDP_DWORD(5)]);1204 if (!dummy)1205 dummy = FIELD_GET(PROFILE1_DWORD5_DUMMY_133MHZ,1206 dwords[SFDP_DWORD(5)]);1207 if (!dummy)1208 dummy = FIELD_GET(PROFILE1_DWORD5_DUMMY_100MHZ,1209 dwords[SFDP_DWORD(5)]);1210 if (!dummy)1211 dev_dbg(nor->dev,1212 "Can't find dummy cycles from Profile 1.0 table\n");1213 1214 /* Round up to an even value to avoid tripping controllers up. */1215 dummy = round_up(dummy, 2);1216 1217 /* Update the fast read settings. */1218 nor->params->hwcaps.mask |= SNOR_HWCAPS_READ_8_8_8_DTR;1219 spi_nor_set_read_settings(&nor->params->reads[SNOR_CMD_READ_8_8_8_DTR],1220 0, dummy, opcode,1221 SNOR_PROTO_8_8_8_DTR);1222 1223 /*1224 * Page Program is "Required Command" in the xSPI Profile 1.0. Update1225 * the params->hwcaps.mask here.1226 */1227 nor->params->hwcaps.mask |= SNOR_HWCAPS_PP_8_8_8_DTR;1228 1229out:1230 kfree(dwords);1231 return ret;1232}1233 1234#define SCCR_DWORD22_OCTAL_DTR_EN_VOLATILE BIT(31)1235 1236/**1237 * spi_nor_parse_sccr() - Parse the Status, Control and Configuration Register1238 * Map.1239 * @nor: pointer to a 'struct spi_nor'1240 * @sccr_header: pointer to the 'struct sfdp_parameter_header' describing1241 * the SCCR Map table length and version.1242 *1243 * Return: 0 on success, -errno otherwise.1244 */1245static int spi_nor_parse_sccr(struct spi_nor *nor,1246 const struct sfdp_parameter_header *sccr_header)1247{1248 struct spi_nor_flash_parameter *params = nor->params;1249 u32 *dwords, addr;1250 size_t len;1251 int ret;1252 1253 len = sccr_header->length * sizeof(*dwords);1254 dwords = kmalloc(len, GFP_KERNEL);1255 if (!dwords)1256 return -ENOMEM;1257 1258 addr = SFDP_PARAM_HEADER_PTP(sccr_header);1259 ret = spi_nor_read_sfdp(nor, addr, len, dwords);1260 if (ret)1261 goto out;1262 1263 le32_to_cpu_array(dwords, sccr_header->length);1264 1265 /* Address offset for volatile registers (die 0) */1266 if (!params->vreg_offset) {1267 params->vreg_offset = devm_kmalloc(nor->dev, sizeof(*dwords),1268 GFP_KERNEL);1269 if (!params->vreg_offset) {1270 ret = -ENOMEM;1271 goto out;1272 }1273 }1274 params->vreg_offset[0] = dwords[SFDP_DWORD(1)];1275 params->n_dice = 1;1276 1277 if (FIELD_GET(SCCR_DWORD22_OCTAL_DTR_EN_VOLATILE,1278 dwords[SFDP_DWORD(22)]))1279 nor->flags |= SNOR_F_IO_MODE_EN_VOLATILE;1280 1281out:1282 kfree(dwords);1283 return ret;1284}1285 1286/**1287 * spi_nor_parse_sccr_mc() - Parse the Status, Control and Configuration1288 * Register Map Offsets for Multi-Chip SPI Memory1289 * Devices.1290 * @nor: pointer to a 'struct spi_nor'1291 * @sccr_mc_header: pointer to the 'struct sfdp_parameter_header' describing1292 * the SCCR Map offsets table length and version.1293 *1294 * Return: 0 on success, -errno otherwise.1295 */1296static int spi_nor_parse_sccr_mc(struct spi_nor *nor,1297 const struct sfdp_parameter_header *sccr_mc_header)1298{1299 struct spi_nor_flash_parameter *params = nor->params;1300 u32 *dwords, addr;1301 u8 i, n_dice;1302 size_t len;1303 int ret;1304 1305 len = sccr_mc_header->length * sizeof(*dwords);1306 dwords = kmalloc(len, GFP_KERNEL);1307 if (!dwords)1308 return -ENOMEM;1309 1310 addr = SFDP_PARAM_HEADER_PTP(sccr_mc_header);1311 ret = spi_nor_read_sfdp(nor, addr, len, dwords);1312 if (ret)1313 goto out;1314 1315 le32_to_cpu_array(dwords, sccr_mc_header->length);1316 1317 /*1318 * Pair of DOWRDs (volatile and non-volatile register offsets) per1319 * additional die. Hence, length = 2 * (number of additional dice).1320 */1321 n_dice = 1 + sccr_mc_header->length / 2;1322 1323 /* Address offset for volatile registers of additional dice */1324 params->vreg_offset =1325 devm_krealloc(nor->dev, params->vreg_offset,1326 n_dice * sizeof(*dwords),1327 GFP_KERNEL);1328 if (!params->vreg_offset) {1329 ret = -ENOMEM;1330 goto out;1331 }1332 1333 for (i = 1; i < n_dice; i++)1334 params->vreg_offset[i] = dwords[SFDP_DWORD(i) * 2];1335 1336 params->n_dice = n_dice;1337 1338out:1339 kfree(dwords);1340 return ret;1341}1342 1343/**1344 * spi_nor_post_sfdp_fixups() - Updates the flash's parameters and settings1345 * after SFDP has been parsed. Called only for flashes that define JESD216 SFDP1346 * tables.1347 * @nor: pointer to a 'struct spi_nor'1348 *1349 * Used to tweak various flash parameters when information provided by the SFDP1350 * tables are wrong.1351 */1352static int spi_nor_post_sfdp_fixups(struct spi_nor *nor)1353{1354 int ret;1355 1356 if (nor->manufacturer && nor->manufacturer->fixups &&1357 nor->manufacturer->fixups->post_sfdp) {1358 ret = nor->manufacturer->fixups->post_sfdp(nor);1359 if (ret)1360 return ret;1361 }1362 1363 if (nor->info->fixups && nor->info->fixups->post_sfdp)1364 return nor->info->fixups->post_sfdp(nor);1365 1366 return 0;1367}1368 1369/**1370 * spi_nor_check_sfdp_signature() - check for a valid SFDP signature1371 * @nor: pointer to a 'struct spi_nor'1372 *1373 * Used to detect if the flash supports the RDSFDP command as well as the1374 * presence of a valid SFDP table.1375 *1376 * Return: 0 on success, -errno otherwise.1377 */1378int spi_nor_check_sfdp_signature(struct spi_nor *nor)1379{1380 u32 signature;1381 int err;1382 1383 /* Get the SFDP header. */1384 err = spi_nor_read_sfdp_dma_unsafe(nor, 0, sizeof(signature),1385 &signature);1386 if (err < 0)1387 return err;1388 1389 /* Check the SFDP signature. */1390 if (le32_to_cpu(signature) != SFDP_SIGNATURE)1391 return -EINVAL;1392 1393 return 0;1394}1395 1396/**1397 * spi_nor_parse_sfdp() - parse the Serial Flash Discoverable Parameters.1398 * @nor: pointer to a 'struct spi_nor'1399 *1400 * The Serial Flash Discoverable Parameters are described by the JEDEC JESD2161401 * specification. This is a standard which tends to supported by almost all1402 * (Q)SPI memory manufacturers. Those hard-coded tables allow us to learn at1403 * runtime the main parameters needed to perform basic SPI flash operations such1404 * as Fast Read, Page Program or Sector Erase commands.1405 *1406 * Return: 0 on success, -errno otherwise.1407 */1408int spi_nor_parse_sfdp(struct spi_nor *nor)1409{1410 const struct sfdp_parameter_header *param_header, *bfpt_header;1411 struct sfdp_parameter_header *param_headers = NULL;1412 struct sfdp_header header;1413 struct device *dev = nor->dev;1414 struct sfdp *sfdp;1415 size_t sfdp_size;1416 size_t psize;1417 int i, err;1418 1419 /* Get the SFDP header. */1420 err = spi_nor_read_sfdp_dma_unsafe(nor, 0, sizeof(header), &header);1421 if (err < 0)1422 return err;1423 1424 /* Check the SFDP header version. */1425 if (le32_to_cpu(header.signature) != SFDP_SIGNATURE ||1426 header.major != SFDP_JESD216_MAJOR)1427 return -EINVAL;1428 1429 /*1430 * Verify that the first and only mandatory parameter header is a1431 * Basic Flash Parameter Table header as specified in JESD216.1432 */1433 bfpt_header = &header.bfpt_header;1434 if (SFDP_PARAM_HEADER_ID(bfpt_header) != SFDP_BFPT_ID ||1435 bfpt_header->major != SFDP_JESD216_MAJOR)1436 return -EINVAL;1437 1438 sfdp_size = SFDP_PARAM_HEADER_PTP(bfpt_header) +1439 SFDP_PARAM_HEADER_PARAM_LEN(bfpt_header);1440 1441 /*1442 * Allocate memory then read all parameter headers with a single1443 * Read SFDP command. These parameter headers will actually be parsed1444 * twice: a first time to get the latest revision of the basic flash1445 * parameter table, then a second time to handle the supported optional1446 * tables.1447 * Hence we read the parameter headers once for all to reduce the1448 * processing time. Also we use kmalloc() instead of devm_kmalloc()1449 * because we don't need to keep these parameter headers: the allocated1450 * memory is always released with kfree() before exiting this function.1451 */1452 if (header.nph) {1453 psize = header.nph * sizeof(*param_headers);1454 1455 param_headers = kmalloc(psize, GFP_KERNEL);1456 if (!param_headers)1457 return -ENOMEM;1458 1459 err = spi_nor_read_sfdp(nor, sizeof(header),1460 psize, param_headers);1461 if (err < 0) {1462 dev_dbg(dev, "failed to read SFDP parameter headers\n");1463 goto exit;1464 }1465 }1466 1467 /*1468 * Cache the complete SFDP data. It is not (easily) possible to fetch1469 * SFDP after probe time and we need it for the sysfs access.1470 */1471 for (i = 0; i < header.nph; i++) {1472 param_header = ¶m_headers[i];1473 sfdp_size = max_t(size_t, sfdp_size,1474 SFDP_PARAM_HEADER_PTP(param_header) +1475 SFDP_PARAM_HEADER_PARAM_LEN(param_header));1476 }1477 1478 /*1479 * Limit the total size to a reasonable value to avoid allocating too1480 * much memory just of because the flash returned some insane values.1481 */1482 if (sfdp_size > PAGE_SIZE) {1483 dev_dbg(dev, "SFDP data (%zu) too big, truncating\n",1484 sfdp_size);1485 sfdp_size = PAGE_SIZE;1486 }1487 1488 sfdp = devm_kzalloc(dev, sizeof(*sfdp), GFP_KERNEL);1489 if (!sfdp) {1490 err = -ENOMEM;1491 goto exit;1492 }1493 1494 /*1495 * The SFDP is organized in chunks of DWORDs. Thus, in theory, the1496 * sfdp_size should be a multiple of DWORDs. But in case a flash1497 * is not spec compliant, make sure that we have enough space to store1498 * the complete SFDP data.1499 */1500 sfdp->num_dwords = DIV_ROUND_UP(sfdp_size, sizeof(*sfdp->dwords));1501 sfdp->dwords = devm_kcalloc(dev, sfdp->num_dwords,1502 sizeof(*sfdp->dwords), GFP_KERNEL);1503 if (!sfdp->dwords) {1504 err = -ENOMEM;1505 devm_kfree(dev, sfdp);1506 goto exit;1507 }1508 1509 err = spi_nor_read_sfdp(nor, 0, sfdp_size, sfdp->dwords);1510 if (err < 0) {1511 dev_dbg(dev, "failed to read SFDP data\n");1512 devm_kfree(dev, sfdp->dwords);1513 devm_kfree(dev, sfdp);1514 goto exit;1515 }1516 1517 nor->sfdp = sfdp;1518 1519 /*1520 * Check other parameter headers to get the latest revision of1521 * the basic flash parameter table.1522 */1523 for (i = 0; i < header.nph; i++) {1524 param_header = ¶m_headers[i];1525 1526 if (SFDP_PARAM_HEADER_ID(param_header) == SFDP_BFPT_ID &&1527 param_header->major == SFDP_JESD216_MAJOR &&1528 (param_header->minor > bfpt_header->minor ||1529 (param_header->minor == bfpt_header->minor &&1530 param_header->length > bfpt_header->length)))1531 bfpt_header = param_header;1532 }1533 1534 err = spi_nor_parse_bfpt(nor, bfpt_header);1535 if (err)1536 goto exit;1537 1538 /* Parse optional parameter tables. */1539 for (i = 0; i < header.nph; i++) {1540 param_header = ¶m_headers[i];1541 1542 switch (SFDP_PARAM_HEADER_ID(param_header)) {1543 case SFDP_SECTOR_MAP_ID:1544 err = spi_nor_parse_smpt(nor, param_header);1545 break;1546 1547 case SFDP_4BAIT_ID:1548 err = spi_nor_parse_4bait(nor, param_header);1549 break;1550 1551 case SFDP_PROFILE1_ID:1552 err = spi_nor_parse_profile1(nor, param_header);1553 break;1554 1555 case SFDP_SCCR_MAP_ID:1556 err = spi_nor_parse_sccr(nor, param_header);1557 break;1558 1559 case SFDP_SCCR_MAP_MC_ID:1560 err = spi_nor_parse_sccr_mc(nor, param_header);1561 break;1562 1563 default:1564 break;1565 }1566 1567 if (err) {1568 dev_warn(dev, "Failed to parse optional parameter table: %04x\n",1569 SFDP_PARAM_HEADER_ID(param_header));1570 /*1571 * Let's not drop all information we extracted so far1572 * if optional table parsers fail. In case of failing,1573 * each optional parser is responsible to roll back to1574 * the previously known spi_nor data.1575 */1576 err = 0;1577 }1578 }1579 1580 err = spi_nor_post_sfdp_fixups(nor);1581exit:1582 kfree(param_headers);1583 return err;1584}1585