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1/*2 * Platform CAN bus driver for Bosch C_CAN controller3 *4 * Copyright (C) 2010 ST Microelectronics5 * Bhupesh Sharma <bhupesh.sharma@st.com>6 *7 * Borrowed heavily from the C_CAN driver originally written by:8 * Copyright (C) 20079 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de>10 * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch>11 *12 * Bosch C_CAN controller is compliant to CAN protocol version 2.0 part A and B.13 * Bosch C_CAN user manual can be obtained from:14 * http://www.semiconductors.bosch.de/media/en/pdf/ipmodules_1/c_can/15 * users_manual_c_can.pdf16 *17 * This file is licensed under the terms of the GNU General Public18 * License version 2. This program is licensed "as is" without any19 * warranty of any kind, whether express or implied.20 */21 22#include <linux/kernel.h>23#include <linux/module.h>24#include <linux/interrupt.h>25#include <linux/delay.h>26#include <linux/netdevice.h>27#include <linux/if_arp.h>28#include <linux/if_ether.h>29#include <linux/list.h>30#include <linux/io.h>31#include <linux/platform_device.h>32#include <linux/pm_runtime.h>33#include <linux/property.h>34#include <linux/clk.h>35#include <linux/of.h>36#include <linux/mfd/syscon.h>37#include <linux/regmap.h>38 39#include <linux/can/dev.h>40 41#include "c_can.h"42 43#define DCAN_RAM_INIT_BIT BIT(3)44 45static DEFINE_SPINLOCK(raminit_lock);46 47/* 16-bit c_can registers can be arranged differently in the memory48 * architecture of different implementations. For example: 16-bit49 * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.50 * Handle the same by providing a common read/write interface.51 */52static u16 c_can_plat_read_reg_aligned_to_16bit(const struct c_can_priv *priv,53 enum reg index)54{55 return readw(priv->base + priv->regs[index]);56}57 58static void c_can_plat_write_reg_aligned_to_16bit(const struct c_can_priv *priv,59 enum reg index, u16 val)60{61 writew(val, priv->base + priv->regs[index]);62}63 64static u16 c_can_plat_read_reg_aligned_to_32bit(const struct c_can_priv *priv,65 enum reg index)66{67 return readw(priv->base + 2 * priv->regs[index]);68}69 70static void c_can_plat_write_reg_aligned_to_32bit(const struct c_can_priv *priv,71 enum reg index, u16 val)72{73 writew(val, priv->base + 2 * priv->regs[index]);74}75 76static void c_can_hw_raminit_wait_syscon(const struct c_can_priv *priv,77 u32 mask, u32 val)78{79 const struct c_can_raminit *raminit = &priv->raminit_sys;80 int timeout = 0;81 u32 ctrl = 0;82 83 /* We look only at the bits of our instance. */84 val &= mask;85 do {86 udelay(1);87 timeout++;88 89 regmap_read(raminit->syscon, raminit->reg, &ctrl);90 if (timeout == 1000) {91 dev_err(&priv->dev->dev, "%s: time out\n", __func__);92 break;93 }94 } while ((ctrl & mask) != val);95}96 97static void c_can_hw_raminit_syscon(const struct c_can_priv *priv, bool enable)98{99 const struct c_can_raminit *raminit = &priv->raminit_sys;100 u32 ctrl = 0;101 u32 mask;102 103 spin_lock(&raminit_lock);104 105 mask = 1 << raminit->bits.start | 1 << raminit->bits.done;106 regmap_read(raminit->syscon, raminit->reg, &ctrl);107 108 /* We clear the start bit first. The start bit is109 * looking at the 0 -> transition, but is not self clearing;110 * NOTE: DONE must be written with 1 to clear it.111 * We can't clear the DONE bit here using regmap_update_bits()112 * as it will bypass the write if initial condition is START:0 DONE:1113 * e.g. on DRA7 which needs START pulse.114 */115 ctrl &= ~mask; /* START = 0, DONE = 0 */116 regmap_update_bits(raminit->syscon, raminit->reg, mask, ctrl);117 118 /* check if START bit is 0. Ignore DONE bit for now119 * as it can be either 0 or 1.120 */121 c_can_hw_raminit_wait_syscon(priv, 1 << raminit->bits.start, ctrl);122 123 if (enable) {124 /* Clear DONE bit & set START bit. */125 ctrl |= 1 << raminit->bits.start;126 /* DONE must be written with 1 to clear it */127 ctrl |= 1 << raminit->bits.done;128 regmap_update_bits(raminit->syscon, raminit->reg, mask, ctrl);129 /* prevent further clearing of DONE bit */130 ctrl &= ~(1 << raminit->bits.done);131 /* clear START bit if start pulse is needed */132 if (raminit->needs_pulse) {133 ctrl &= ~(1 << raminit->bits.start);134 regmap_update_bits(raminit->syscon, raminit->reg,135 mask, ctrl);136 }137 138 ctrl |= 1 << raminit->bits.done;139 c_can_hw_raminit_wait_syscon(priv, mask, ctrl);140 }141 spin_unlock(&raminit_lock);142}143 144static u32 c_can_plat_read_reg32(const struct c_can_priv *priv, enum reg index)145{146 u32 val;147 148 val = priv->read_reg(priv, index);149 val |= ((u32)priv->read_reg(priv, index + 1)) << 16;150 151 return val;152}153 154static void c_can_plat_write_reg32(const struct c_can_priv *priv,155 enum reg index, u32 val)156{157 priv->write_reg(priv, index + 1, val >> 16);158 priv->write_reg(priv, index, val);159}160 161static u32 d_can_plat_read_reg32(const struct c_can_priv *priv, enum reg index)162{163 return readl(priv->base + priv->regs[index]);164}165 166static void d_can_plat_write_reg32(const struct c_can_priv *priv,167 enum reg index, u32 val)168{169 writel(val, priv->base + priv->regs[index]);170}171 172static void c_can_hw_raminit_wait(const struct c_can_priv *priv, u32 mask)173{174 while (priv->read_reg32(priv, C_CAN_FUNCTION_REG) & mask)175 udelay(1);176}177 178static void c_can_hw_raminit(const struct c_can_priv *priv, bool enable)179{180 u32 ctrl;181 182 ctrl = priv->read_reg32(priv, C_CAN_FUNCTION_REG);183 ctrl &= ~DCAN_RAM_INIT_BIT;184 priv->write_reg32(priv, C_CAN_FUNCTION_REG, ctrl);185 c_can_hw_raminit_wait(priv, ctrl);186 187 if (enable) {188 ctrl |= DCAN_RAM_INIT_BIT;189 priv->write_reg32(priv, C_CAN_FUNCTION_REG, ctrl);190 c_can_hw_raminit_wait(priv, ctrl);191 }192}193 194static const struct c_can_driver_data c_can_drvdata = {195 .id = BOSCH_C_CAN,196 .msg_obj_num = 32,197};198 199static const struct c_can_driver_data d_can_drvdata = {200 .id = BOSCH_D_CAN,201 .msg_obj_num = 32,202};203 204static const struct raminit_bits dra7_raminit_bits[] = {205 [0] = { .start = 3, .done = 1, },206 [1] = { .start = 5, .done = 2, },207};208 209static const struct c_can_driver_data dra7_dcan_drvdata = {210 .id = BOSCH_D_CAN,211 .msg_obj_num = 64,212 .raminit_num = ARRAY_SIZE(dra7_raminit_bits),213 .raminit_bits = dra7_raminit_bits,214 .raminit_pulse = true,215};216 217static const struct raminit_bits am3352_raminit_bits[] = {218 [0] = { .start = 0, .done = 8, },219 [1] = { .start = 1, .done = 9, },220};221 222static const struct c_can_driver_data am3352_dcan_drvdata = {223 .id = BOSCH_D_CAN,224 .msg_obj_num = 64,225 .raminit_num = ARRAY_SIZE(am3352_raminit_bits),226 .raminit_bits = am3352_raminit_bits,227};228 229static const struct platform_device_id c_can_id_table[] = {230 {231 .name = KBUILD_MODNAME,232 .driver_data = (kernel_ulong_t)&c_can_drvdata,233 },234 {235 .name = "c_can",236 .driver_data = (kernel_ulong_t)&c_can_drvdata,237 },238 {239 .name = "d_can",240 .driver_data = (kernel_ulong_t)&d_can_drvdata,241 },242 { /* sentinel */ },243};244MODULE_DEVICE_TABLE(platform, c_can_id_table);245 246static const struct of_device_id c_can_of_table[] = {247 { .compatible = "bosch,c_can", .data = &c_can_drvdata },248 { .compatible = "bosch,d_can", .data = &d_can_drvdata },249 { .compatible = "ti,dra7-d_can", .data = &dra7_dcan_drvdata },250 { .compatible = "ti,am3352-d_can", .data = &am3352_dcan_drvdata },251 { .compatible = "ti,am4372-d_can", .data = &am3352_dcan_drvdata },252 { /* sentinel */ },253};254MODULE_DEVICE_TABLE(of, c_can_of_table);255 256static int c_can_plat_probe(struct platform_device *pdev)257{258 int ret;259 void __iomem *addr;260 struct net_device *dev;261 struct c_can_priv *priv;262 struct resource *mem;263 int irq;264 struct clk *clk;265 const struct c_can_driver_data *drvdata;266 struct device_node *np = pdev->dev.of_node;267 268 drvdata = device_get_match_data(&pdev->dev);269 270 /* get the appropriate clk */271 clk = devm_clk_get(&pdev->dev, NULL);272 if (IS_ERR(clk)) {273 ret = PTR_ERR(clk);274 goto exit;275 }276 277 /* get the platform data */278 irq = platform_get_irq(pdev, 0);279 if (irq < 0) {280 ret = irq;281 goto exit;282 }283 284 addr = devm_platform_get_and_ioremap_resource(pdev, 0, &mem);285 if (IS_ERR(addr)) {286 ret = PTR_ERR(addr);287 goto exit;288 }289 290 /* allocate the c_can device */291 dev = alloc_c_can_dev(drvdata->msg_obj_num);292 if (!dev) {293 ret = -ENOMEM;294 goto exit;295 }296 297 priv = netdev_priv(dev);298 switch (drvdata->id) {299 case BOSCH_C_CAN:300 priv->regs = reg_map_c_can;301 switch (mem->flags & IORESOURCE_MEM_TYPE_MASK) {302 case IORESOURCE_MEM_32BIT:303 priv->read_reg = c_can_plat_read_reg_aligned_to_32bit;304 priv->write_reg = c_can_plat_write_reg_aligned_to_32bit;305 priv->read_reg32 = c_can_plat_read_reg32;306 priv->write_reg32 = c_can_plat_write_reg32;307 break;308 case IORESOURCE_MEM_16BIT:309 default:310 priv->read_reg = c_can_plat_read_reg_aligned_to_16bit;311 priv->write_reg = c_can_plat_write_reg_aligned_to_16bit;312 priv->read_reg32 = c_can_plat_read_reg32;313 priv->write_reg32 = c_can_plat_write_reg32;314 break;315 }316 break;317 case BOSCH_D_CAN:318 priv->regs = reg_map_d_can;319 priv->read_reg = c_can_plat_read_reg_aligned_to_16bit;320 priv->write_reg = c_can_plat_write_reg_aligned_to_16bit;321 priv->read_reg32 = d_can_plat_read_reg32;322 priv->write_reg32 = d_can_plat_write_reg32;323 324 /* Check if we need custom RAMINIT via syscon. Mostly for TI325 * platforms. Only supported with DT boot.326 */327 if (np && of_property_read_bool(np, "syscon-raminit")) {328 u32 id;329 struct c_can_raminit *raminit = &priv->raminit_sys;330 331 ret = -EINVAL;332 raminit->syscon = syscon_regmap_lookup_by_phandle(np,333 "syscon-raminit");334 if (IS_ERR(raminit->syscon)) {335 /* can fail with -EPROBE_DEFER */336 ret = PTR_ERR(raminit->syscon);337 free_c_can_dev(dev);338 return ret;339 }340 341 if (of_property_read_u32_index(np, "syscon-raminit", 1,342 &raminit->reg)) {343 dev_err(&pdev->dev,344 "couldn't get the RAMINIT reg. offset!\n");345 goto exit_free_device;346 }347 348 if (of_property_read_u32_index(np, "syscon-raminit", 2,349 &id)) {350 dev_err(&pdev->dev,351 "couldn't get the CAN instance ID\n");352 goto exit_free_device;353 }354 355 if (id >= drvdata->raminit_num) {356 dev_err(&pdev->dev,357 "Invalid CAN instance ID\n");358 goto exit_free_device;359 }360 361 raminit->bits = drvdata->raminit_bits[id];362 raminit->needs_pulse = drvdata->raminit_pulse;363 364 priv->raminit = c_can_hw_raminit_syscon;365 } else {366 priv->raminit = c_can_hw_raminit;367 }368 break;369 default:370 ret = -EINVAL;371 goto exit_free_device;372 }373 374 dev->irq = irq;375 priv->base = addr;376 priv->device = &pdev->dev;377 priv->can.clock.freq = clk_get_rate(clk);378 priv->type = drvdata->id;379 380 platform_set_drvdata(pdev, dev);381 SET_NETDEV_DEV(dev, &pdev->dev);382 383 pm_runtime_enable(priv->device);384 ret = register_c_can_dev(dev);385 if (ret) {386 dev_err(&pdev->dev, "registering %s failed (err=%d)\n",387 KBUILD_MODNAME, ret);388 goto exit_free_device;389 }390 391 dev_info(&pdev->dev, "%s device registered (regs=%p, irq=%d)\n",392 KBUILD_MODNAME, priv->base, dev->irq);393 return 0;394 395exit_free_device:396 pm_runtime_disable(priv->device);397 free_c_can_dev(dev);398exit:399 dev_err(&pdev->dev, "probe failed\n");400 401 return ret;402}403 404static void c_can_plat_remove(struct platform_device *pdev)405{406 struct net_device *dev = platform_get_drvdata(pdev);407 struct c_can_priv *priv = netdev_priv(dev);408 409 unregister_c_can_dev(dev);410 pm_runtime_disable(priv->device);411 free_c_can_dev(dev);412}413 414#ifdef CONFIG_PM415static int c_can_suspend(struct platform_device *pdev, pm_message_t state)416{417 int ret;418 struct net_device *ndev = platform_get_drvdata(pdev);419 struct c_can_priv *priv = netdev_priv(ndev);420 421 if (priv->type != BOSCH_D_CAN) {422 dev_warn(&pdev->dev, "Not supported\n");423 return 0;424 }425 426 if (netif_running(ndev)) {427 netif_stop_queue(ndev);428 netif_device_detach(ndev);429 }430 431 ret = c_can_power_down(ndev);432 if (ret) {433 netdev_err(ndev, "failed to enter power down mode\n");434 return ret;435 }436 437 priv->can.state = CAN_STATE_SLEEPING;438 439 return 0;440}441 442static int c_can_resume(struct platform_device *pdev)443{444 int ret;445 struct net_device *ndev = platform_get_drvdata(pdev);446 struct c_can_priv *priv = netdev_priv(ndev);447 448 if (priv->type != BOSCH_D_CAN) {449 dev_warn(&pdev->dev, "Not supported\n");450 return 0;451 }452 453 ret = c_can_power_up(ndev);454 if (ret) {455 netdev_err(ndev, "Still in power down mode\n");456 return ret;457 }458 459 priv->can.state = CAN_STATE_ERROR_ACTIVE;460 461 if (netif_running(ndev)) {462 netif_device_attach(ndev);463 netif_start_queue(ndev);464 }465 466 return 0;467}468#else469#define c_can_suspend NULL470#define c_can_resume NULL471#endif472 473static struct platform_driver c_can_plat_driver = {474 .driver = {475 .name = KBUILD_MODNAME,476 .of_match_table = c_can_of_table,477 },478 .probe = c_can_plat_probe,479 .remove = c_can_plat_remove,480 .suspend = c_can_suspend,481 .resume = c_can_resume,482 .id_table = c_can_id_table,483};484 485module_platform_driver(c_can_plat_driver);486 487MODULE_AUTHOR("Bhupesh Sharma <bhupesh.sharma@st.com>");488MODULE_LICENSE("GPL v2");489MODULE_DESCRIPTION("Platform CAN bus driver for Bosch C_CAN controller");490