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1config CAN_CTUCANFD2 tristate "CTU CAN-FD IP core" if COMPILE_TEST3 help4 This driver adds support for the CTU CAN FD open-source IP core.5 More documentation and core sources at project page6 (https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core).7 The core integration to Xilinx Zynq system as platform driver8 is available (https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top).9 Implementation on Intel FPGA-based PCI Express board is available10 from project (https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd) and11 on Intel SoC from project (https://gitlab.fel.cvut.cz/canbus/intel-soc-ctucanfd).12 Guidepost CTU FEE CAN bus projects page https://canbus.pages.fel.cvut.cz/ .13 14config CAN_CTUCANFD_PCI15 tristate "CTU CAN-FD IP core PCI/PCIe driver"16 depends on PCI17 select CAN_CTUCANFD18 help19 This driver adds PCI/PCIe support for CTU CAN-FD IP core.20 The project providing FPGA design for Intel EP4CGX15 based DB4CGX1521 PCIe board with PiKRON.com designed transceiver riser shield is available22 at https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd .23 24config CAN_CTUCANFD_PLATFORM25 tristate "CTU CAN-FD IP core platform (FPGA, SoC) driver"26 depends on HAS_IOMEM && OF27 select CAN_CTUCANFD28 help29 The core has been tested together with OpenCores SJA100030 modified to be CAN FD frames tolerant on MicroZed Zynq based31 MZ_APO education kits designed by Petr Porazil from PiKRON.com32 company. FPGA design https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top.33 The kit description at the Computer Architectures course pages34 https://cw.fel.cvut.cz/wiki/courses/b35apo/documentation/mz_apo/start .35