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1/* SPDX-License-Identifier: GPL-2.0 */2/* Copyright 2019 NXP3 */4#ifndef _MSCC_FELIX_H5#define _MSCC_FELIX_H6 7#define ocelot_to_felix(o) container_of((o), struct felix, ocelot)8#define FELIX_MAC_QUIRKS OCELOT_QUIRK_PCS_PERFORMS_RATE_ADAPTATION9 10#define OCELOT_PORT_MODE_NONE 011#define OCELOT_PORT_MODE_INTERNAL BIT(0)12#define OCELOT_PORT_MODE_SGMII BIT(1)13#define OCELOT_PORT_MODE_QSGMII BIT(2)14#define OCELOT_PORT_MODE_2500BASEX BIT(3)15#define OCELOT_PORT_MODE_USXGMII BIT(4)16#define OCELOT_PORT_MODE_1000BASEX BIT(5)17 18struct device_node;19 20/* Platform-specific information */21struct felix_info {22 /* Hardcoded resources provided by the hardware instantiation. */23 const struct resource *resources;24 size_t num_resources;25 /* Names of the mandatory resources that will be requested during26 * probe. Must have TARGET_MAX elements, since it is indexed by target.27 */28 const char *const *resource_names;29 const struct reg_field *regfields;30 const u32 *const *map;31 const struct ocelot_ops *ops;32 const u32 *port_modes;33 int num_mact_rows;34 int num_ports;35 struct vcap_props *vcap;36 u16 vcap_pol_base;37 u16 vcap_pol_max;38 u16 vcap_pol_base2;39 u16 vcap_pol_max2;40 const struct ptp_clock_info *ptp_caps;41 unsigned long quirks;42 43 /* Some Ocelot switches are integrated into the SoC without the44 * extraction IRQ line connected to the ARM GIC. By enabling this45 * workaround, the few packets that are delivered to the CPU port46 * module (currently only PTP) are copied not only to the hardware CPU47 * port module, but also to the 802.1Q Ethernet CPU port, and polling48 * the extraction registers is triggered once the DSA tagger sees a PTP49 * frame. The Ethernet frame is only used as a notification: it is50 * dropped, and the original frame is extracted over MMIO and annotated51 * with the RX timestamp.52 */53 bool quirk_no_xtr_irq;54 55 int (*mdio_bus_alloc)(struct ocelot *ocelot);56 void (*mdio_bus_free)(struct ocelot *ocelot);57 int (*port_setup_tc)(struct dsa_switch *ds, int port,58 enum tc_setup_type type, void *type_data);59 void (*port_sched_speed_set)(struct ocelot *ocelot, int port,60 u32 speed);61 void (*phylink_mac_config)(struct ocelot *ocelot, int port,62 unsigned int mode,63 const struct phylink_link_state *state);64 int (*configure_serdes)(struct ocelot *ocelot, int port,65 struct device_node *portnp);66 int (*request_irq)(struct ocelot *ocelot);67};68 69/* Methods for initializing the hardware resources specific to a tagging70 * protocol (like the NPI port, for "ocelot" or "seville", or the VCAP TCAMs,71 * for "ocelot-8021q").72 * It is important that the resources configured here do not have side effects73 * for the other tagging protocols. If that is the case, their configuration74 * needs to go to felix_tag_proto_setup_shared().75 */76struct felix_tag_proto_ops {77 int (*setup)(struct dsa_switch *ds);78 void (*teardown)(struct dsa_switch *ds);79 unsigned long (*get_host_fwd_mask)(struct dsa_switch *ds);80 int (*change_conduit)(struct dsa_switch *ds, int port,81 struct net_device *conduit,82 struct netlink_ext_ack *extack);83};84 85/* DSA glue / front-end for struct ocelot */86struct felix {87 struct dsa_switch *ds;88 const struct felix_info *info;89 struct ocelot ocelot;90 struct mii_bus *imdio;91 struct phylink_pcs **pcs;92 resource_size_t switch_base;93 enum dsa_tag_protocol tag_proto;94 const struct felix_tag_proto_ops *tag_proto_ops;95 struct kthread_worker *xmit_worker;96 unsigned long host_flood_uc_mask;97 unsigned long host_flood_mc_mask;98};99 100int felix_register_switch(struct device *dev, resource_size_t switch_base,101 int num_flooding_pgids, bool ptp,102 bool mm_supported,103 enum dsa_tag_protocol init_tag_proto,104 const struct felix_info *info);105struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port);106int felix_netdev_to_port(struct net_device *dev);107 108#endif109