3202 lines · c
1/* bnx2x_sriov.c: QLogic Everest network driver.2 *3 * Copyright 2009-2013 Broadcom Corporation4 * Copyright 2014 QLogic Corporation5 * All rights reserved6 *7 * Unless you and QLogic execute a separate written software license8 * agreement governing use of this software, this software is licensed to you9 * under the terms of the GNU General Public License version 2, available10 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").11 *12 * Notwithstanding the above, under no circumstances may you combine this13 * software in any way with any other QLogic software provided under a14 * license other than the GPL, without QLogic's express prior written15 * consent.16 *17 * Maintained by: Ariel Elior <ariel.elior@qlogic.com>18 * Written by: Shmulik Ravid19 * Ariel Elior <ariel.elior@qlogic.com>20 *21 */22#include "bnx2x.h"23#include "bnx2x_init.h"24#include "bnx2x_cmn.h"25#include "bnx2x_sp.h"26#include <linux/crc32.h>27#include <linux/if_vlan.h>28 29static int bnx2x_vf_op_prep(struct bnx2x *bp, int vfidx,30 struct bnx2x_virtf **vf,31 struct pf_vf_bulletin_content **bulletin,32 bool test_queue);33 34/* General service functions */35static void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid,36 u16 pf_id)37{38 REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_VF_TO_PF_OFFSET(abs_fid),39 pf_id);40 REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_VF_TO_PF_OFFSET(abs_fid),41 pf_id);42 REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_VF_TO_PF_OFFSET(abs_fid),43 pf_id);44 REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_VF_TO_PF_OFFSET(abs_fid),45 pf_id);46}47 48static void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid,49 u8 enable)50{51 REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNC_EN_OFFSET(abs_fid),52 enable);53 REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_FUNC_EN_OFFSET(abs_fid),54 enable);55 REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_FUNC_EN_OFFSET(abs_fid),56 enable);57 REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_FUNC_EN_OFFSET(abs_fid),58 enable);59}60 61int bnx2x_vf_idx_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)62{63 int idx;64 65 for_each_vf(bp, idx)66 if (bnx2x_vf(bp, idx, abs_vfid) == abs_vfid)67 break;68 return idx;69}70 71static72struct bnx2x_virtf *bnx2x_vf_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)73{74 u16 idx = (u16)bnx2x_vf_idx_by_abs_fid(bp, abs_vfid);75 return (idx < BNX2X_NR_VIRTFN(bp)) ? BP_VF(bp, idx) : NULL;76}77 78static void bnx2x_vf_igu_ack_sb(struct bnx2x *bp, struct bnx2x_virtf *vf,79 u8 igu_sb_id, u8 segment, u16 index, u8 op,80 u8 update)81{82 /* acking a VF sb through the PF - use the GRC */83 u32 ctl;84 u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA;85 u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL;86 u32 func_encode = vf->abs_vfid;87 u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + igu_sb_id;88 struct igu_regular cmd_data = {0};89 90 cmd_data.sb_id_and_flags =91 ((index << IGU_REGULAR_SB_INDEX_SHIFT) |92 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |93 (update << IGU_REGULAR_BUPDATE_SHIFT) |94 (op << IGU_REGULAR_ENABLE_INT_SHIFT));95 96 ctl = addr_encode << IGU_CTRL_REG_ADDRESS_SHIFT |97 func_encode << IGU_CTRL_REG_FID_SHIFT |98 IGU_CTRL_CMD_TYPE_WR << IGU_CTRL_REG_TYPE_SHIFT;99 100 DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",101 cmd_data.sb_id_and_flags, igu_addr_data);102 REG_WR(bp, igu_addr_data, cmd_data.sb_id_and_flags);103 barrier();104 105 DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",106 ctl, igu_addr_ctl);107 REG_WR(bp, igu_addr_ctl, ctl);108 barrier();109}110 111static bool bnx2x_validate_vf_sp_objs(struct bnx2x *bp,112 struct bnx2x_virtf *vf,113 bool print_err)114{115 if (!bnx2x_leading_vfq(vf, sp_initialized)) {116 if (print_err)117 BNX2X_ERR("Slowpath objects not yet initialized!\n");118 else119 DP(BNX2X_MSG_IOV, "Slowpath objects not yet initialized!\n");120 return false;121 }122 return true;123}124 125/* VFOP operations states */126void bnx2x_vfop_qctor_dump_tx(struct bnx2x *bp, struct bnx2x_virtf *vf,127 struct bnx2x_queue_init_params *init_params,128 struct bnx2x_queue_setup_params *setup_params,129 u16 q_idx, u16 sb_idx)130{131 DP(BNX2X_MSG_IOV,132 "VF[%d] Q_SETUP: txq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, flags=0x%lx, traffic-type=%d",133 vf->abs_vfid,134 q_idx,135 sb_idx,136 init_params->tx.sb_cq_index,137 init_params->tx.hc_rate,138 setup_params->flags,139 setup_params->txq_params.traffic_type);140}141 142void bnx2x_vfop_qctor_dump_rx(struct bnx2x *bp, struct bnx2x_virtf *vf,143 struct bnx2x_queue_init_params *init_params,144 struct bnx2x_queue_setup_params *setup_params,145 u16 q_idx, u16 sb_idx)146{147 struct bnx2x_rxq_setup_params *rxq_params = &setup_params->rxq_params;148 149 DP(BNX2X_MSG_IOV, "VF[%d] Q_SETUP: rxq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, mtu=%d, buf-size=%d\n"150 "sge-size=%d, max_sge_pkt=%d, tpa-agg-size=%d, flags=0x%lx, drop-flags=0x%x, cache-log=%d\n",151 vf->abs_vfid,152 q_idx,153 sb_idx,154 init_params->rx.sb_cq_index,155 init_params->rx.hc_rate,156 setup_params->gen_params.mtu,157 rxq_params->buf_sz,158 rxq_params->sge_buf_sz,159 rxq_params->max_sges_pkt,160 rxq_params->tpa_agg_sz,161 setup_params->flags,162 rxq_params->drop_flags,163 rxq_params->cache_line_log);164}165 166void bnx2x_vfop_qctor_prep(struct bnx2x *bp,167 struct bnx2x_virtf *vf,168 struct bnx2x_vf_queue *q,169 struct bnx2x_vf_queue_construct_params *p,170 unsigned long q_type)171{172 struct bnx2x_queue_init_params *init_p = &p->qstate.params.init;173 struct bnx2x_queue_setup_params *setup_p = &p->prep_qsetup;174 175 /* INIT */176 177 /* Enable host coalescing in the transition to INIT state */178 if (test_bit(BNX2X_Q_FLG_HC, &init_p->rx.flags))179 __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->rx.flags);180 181 if (test_bit(BNX2X_Q_FLG_HC, &init_p->tx.flags))182 __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->tx.flags);183 184 /* FW SB ID */185 init_p->rx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);186 init_p->tx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);187 188 /* context */189 init_p->cxts[0] = q->cxt;190 191 /* SETUP */192 193 /* Setup-op general parameters */194 setup_p->gen_params.spcl_id = vf->sp_cl_id;195 setup_p->gen_params.stat_id = vfq_stat_id(vf, q);196 setup_p->gen_params.fp_hsi = vf->fp_hsi;197 198 /* Setup-op flags:199 * collect statistics, zero statistics, local-switching, security,200 * OV for Flex10, RSS and MCAST for leading201 */202 if (test_bit(BNX2X_Q_FLG_STATS, &setup_p->flags))203 __set_bit(BNX2X_Q_FLG_ZERO_STATS, &setup_p->flags);204 205 /* for VFs, enable tx switching, bd coherency, and mac address206 * anti-spoofing207 */208 __set_bit(BNX2X_Q_FLG_TX_SWITCH, &setup_p->flags);209 __set_bit(BNX2X_Q_FLG_TX_SEC, &setup_p->flags);210 if (vf->spoofchk)211 __set_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags);212 else213 __clear_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags);214 215 /* Setup-op rx parameters */216 if (test_bit(BNX2X_Q_TYPE_HAS_RX, &q_type)) {217 struct bnx2x_rxq_setup_params *rxq_p = &setup_p->rxq_params;218 219 rxq_p->cl_qzone_id = vfq_qzone_id(vf, q);220 rxq_p->fw_sb_id = vf_igu_sb(vf, q->sb_idx);221 rxq_p->rss_engine_id = FW_VF_HANDLE(vf->abs_vfid);222 223 if (test_bit(BNX2X_Q_FLG_TPA, &setup_p->flags))224 rxq_p->max_tpa_queues = BNX2X_VF_MAX_TPA_AGG_QUEUES;225 }226 227 /* Setup-op tx parameters */228 if (test_bit(BNX2X_Q_TYPE_HAS_TX, &q_type)) {229 setup_p->txq_params.tss_leading_cl_id = vf->leading_rss;230 setup_p->txq_params.fw_sb_id = vf_igu_sb(vf, q->sb_idx);231 }232}233 234static int bnx2x_vf_queue_create(struct bnx2x *bp,235 struct bnx2x_virtf *vf, int qid,236 struct bnx2x_vf_queue_construct_params *qctor)237{238 struct bnx2x_queue_state_params *q_params;239 int rc = 0;240 241 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);242 243 /* Prepare ramrod information */244 q_params = &qctor->qstate;245 q_params->q_obj = &bnx2x_vfq(vf, qid, sp_obj);246 set_bit(RAMROD_COMP_WAIT, &q_params->ramrod_flags);247 248 if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==249 BNX2X_Q_LOGICAL_STATE_ACTIVE) {250 DP(BNX2X_MSG_IOV, "queue was already up. Aborting gracefully\n");251 goto out;252 }253 254 /* Run Queue 'construction' ramrods */255 q_params->cmd = BNX2X_Q_CMD_INIT;256 rc = bnx2x_queue_state_change(bp, q_params);257 if (rc)258 goto out;259 260 memcpy(&q_params->params.setup, &qctor->prep_qsetup,261 sizeof(struct bnx2x_queue_setup_params));262 q_params->cmd = BNX2X_Q_CMD_SETUP;263 rc = bnx2x_queue_state_change(bp, q_params);264 if (rc)265 goto out;266 267 /* enable interrupts */268 bnx2x_vf_igu_ack_sb(bp, vf, vf_igu_sb(vf, bnx2x_vfq(vf, qid, sb_idx)),269 USTORM_ID, 0, IGU_INT_ENABLE, 0);270out:271 return rc;272}273 274static int bnx2x_vf_queue_destroy(struct bnx2x *bp, struct bnx2x_virtf *vf,275 int qid)276{277 enum bnx2x_queue_cmd cmds[] = {BNX2X_Q_CMD_HALT,278 BNX2X_Q_CMD_TERMINATE,279 BNX2X_Q_CMD_CFC_DEL};280 struct bnx2x_queue_state_params q_params;281 int rc, i;282 283 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);284 285 /* Prepare ramrod information */286 memset(&q_params, 0, sizeof(struct bnx2x_queue_state_params));287 q_params.q_obj = &bnx2x_vfq(vf, qid, sp_obj);288 set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);289 290 if (bnx2x_get_q_logical_state(bp, q_params.q_obj) ==291 BNX2X_Q_LOGICAL_STATE_STOPPED) {292 DP(BNX2X_MSG_IOV, "queue was already stopped. Aborting gracefully\n");293 goto out;294 }295 296 /* Run Queue 'destruction' ramrods */297 for (i = 0; i < ARRAY_SIZE(cmds); i++) {298 q_params.cmd = cmds[i];299 rc = bnx2x_queue_state_change(bp, &q_params);300 if (rc) {301 BNX2X_ERR("Failed to run Queue command %d\n", cmds[i]);302 return rc;303 }304 }305out:306 /* Clean Context */307 if (bnx2x_vfq(vf, qid, cxt)) {308 bnx2x_vfq(vf, qid, cxt)->ustorm_ag_context.cdu_usage = 0;309 bnx2x_vfq(vf, qid, cxt)->xstorm_ag_context.cdu_reserved = 0;310 }311 312 return 0;313}314 315static void316bnx2x_vf_set_igu_info(struct bnx2x *bp, u8 igu_sb_id, u8 abs_vfid)317{318 struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);319 if (vf) {320 /* the first igu entry belonging to VFs of this PF */321 if (!BP_VFDB(bp)->first_vf_igu_entry)322 BP_VFDB(bp)->first_vf_igu_entry = igu_sb_id;323 324 /* the first igu entry belonging to this VF */325 if (!vf_sb_count(vf))326 vf->igu_base_id = igu_sb_id;327 328 ++vf_sb_count(vf);329 ++vf->sb_count;330 }331 BP_VFDB(bp)->vf_sbs_pool++;332}333 334static int bnx2x_vf_vlan_mac_clear(struct bnx2x *bp, struct bnx2x_virtf *vf,335 int qid, bool drv_only, int type)336{337 struct bnx2x_vlan_mac_ramrod_params ramrod;338 int rc;339 340 DP(BNX2X_MSG_IOV, "vf[%d] - deleting all %s\n", vf->abs_vfid,341 (type == BNX2X_VF_FILTER_VLAN_MAC) ? "VLAN-MACs" :342 (type == BNX2X_VF_FILTER_MAC) ? "MACs" : "VLANs");343 344 /* Prepare ramrod params */345 memset(&ramrod, 0, sizeof(struct bnx2x_vlan_mac_ramrod_params));346 if (type == BNX2X_VF_FILTER_VLAN_MAC) {347 set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);348 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_mac_obj);349 } else if (type == BNX2X_VF_FILTER_MAC) {350 set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);351 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);352 } else {353 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);354 }355 ramrod.user_req.cmd = BNX2X_VLAN_MAC_DEL;356 357 set_bit(RAMROD_EXEC, &ramrod.ramrod_flags);358 if (drv_only)359 set_bit(RAMROD_DRV_CLR_ONLY, &ramrod.ramrod_flags);360 else361 set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);362 363 /* Start deleting */364 rc = ramrod.vlan_mac_obj->delete_all(bp,365 ramrod.vlan_mac_obj,366 &ramrod.user_req.vlan_mac_flags,367 &ramrod.ramrod_flags);368 if (rc) {369 BNX2X_ERR("Failed to delete all %s\n",370 (type == BNX2X_VF_FILTER_VLAN_MAC) ? "VLAN-MACs" :371 (type == BNX2X_VF_FILTER_MAC) ? "MACs" : "VLANs");372 return rc;373 }374 375 return 0;376}377 378static int bnx2x_vf_mac_vlan_config(struct bnx2x *bp,379 struct bnx2x_virtf *vf, int qid,380 struct bnx2x_vf_mac_vlan_filter *filter,381 bool drv_only)382{383 struct bnx2x_vlan_mac_ramrod_params ramrod;384 int rc;385 386 DP(BNX2X_MSG_IOV, "vf[%d] - %s a %s filter\n",387 vf->abs_vfid, filter->add ? "Adding" : "Deleting",388 (filter->type == BNX2X_VF_FILTER_VLAN_MAC) ? "VLAN-MAC" :389 (filter->type == BNX2X_VF_FILTER_MAC) ? "MAC" : "VLAN");390 391 /* Prepare ramrod params */392 memset(&ramrod, 0, sizeof(struct bnx2x_vlan_mac_ramrod_params));393 if (filter->type == BNX2X_VF_FILTER_VLAN_MAC) {394 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_mac_obj);395 ramrod.user_req.u.vlan.vlan = filter->vid;396 memcpy(&ramrod.user_req.u.mac.mac, filter->mac, ETH_ALEN);397 set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);398 } else if (filter->type == BNX2X_VF_FILTER_VLAN) {399 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);400 ramrod.user_req.u.vlan.vlan = filter->vid;401 } else {402 set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);403 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);404 memcpy(&ramrod.user_req.u.mac.mac, filter->mac, ETH_ALEN);405 }406 ramrod.user_req.cmd = filter->add ? BNX2X_VLAN_MAC_ADD :407 BNX2X_VLAN_MAC_DEL;408 409 set_bit(RAMROD_EXEC, &ramrod.ramrod_flags);410 if (drv_only)411 set_bit(RAMROD_DRV_CLR_ONLY, &ramrod.ramrod_flags);412 else413 set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);414 415 /* Add/Remove the filter */416 rc = bnx2x_config_vlan_mac(bp, &ramrod);417 if (rc == -EEXIST)418 return 0;419 if (rc) {420 BNX2X_ERR("Failed to %s %s\n",421 filter->add ? "add" : "delete",422 (filter->type == BNX2X_VF_FILTER_VLAN_MAC) ?423 "VLAN-MAC" :424 (filter->type == BNX2X_VF_FILTER_MAC) ?425 "MAC" : "VLAN");426 return rc;427 }428 429 filter->applied = true;430 431 return 0;432}433 434int bnx2x_vf_mac_vlan_config_list(struct bnx2x *bp, struct bnx2x_virtf *vf,435 struct bnx2x_vf_mac_vlan_filters *filters,436 int qid, bool drv_only)437{438 int rc = 0, i;439 440 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);441 442 if (!bnx2x_validate_vf_sp_objs(bp, vf, true))443 return -EINVAL;444 445 /* Prepare ramrod params */446 for (i = 0; i < filters->count; i++) {447 rc = bnx2x_vf_mac_vlan_config(bp, vf, qid,448 &filters->filters[i], drv_only);449 if (rc)450 break;451 }452 453 /* Rollback if needed */454 if (i != filters->count) {455 BNX2X_ERR("Managed only %d/%d filters - rolling back\n",456 i, filters->count);457 while (--i >= 0) {458 if (!filters->filters[i].applied)459 continue;460 filters->filters[i].add = !filters->filters[i].add;461 bnx2x_vf_mac_vlan_config(bp, vf, qid,462 &filters->filters[i],463 drv_only);464 }465 }466 467 /* It's our responsibility to free the filters */468 kfree(filters);469 470 return rc;471}472 473int bnx2x_vf_queue_setup(struct bnx2x *bp, struct bnx2x_virtf *vf, int qid,474 struct bnx2x_vf_queue_construct_params *qctor)475{476 int rc;477 478 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);479 480 rc = bnx2x_vf_queue_create(bp, vf, qid, qctor);481 if (rc)482 goto op_err;483 484 /* Schedule the configuration of any pending vlan filters */485 bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_HYPERVISOR_VLAN,486 BNX2X_MSG_IOV);487 return 0;488op_err:489 BNX2X_ERR("QSETUP[%d:%d] error: rc %d\n", vf->abs_vfid, qid, rc);490 return rc;491}492 493static int bnx2x_vf_queue_flr(struct bnx2x *bp, struct bnx2x_virtf *vf,494 int qid)495{496 int rc;497 498 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);499 500 /* If needed, clean the filtering data base */501 if ((qid == LEADING_IDX) &&502 bnx2x_validate_vf_sp_objs(bp, vf, false)) {503 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true,504 BNX2X_VF_FILTER_VLAN_MAC);505 if (rc)506 goto op_err;507 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true,508 BNX2X_VF_FILTER_VLAN);509 if (rc)510 goto op_err;511 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true,512 BNX2X_VF_FILTER_MAC);513 if (rc)514 goto op_err;515 }516 517 /* Terminate queue */518 if (bnx2x_vfq(vf, qid, sp_obj).state != BNX2X_Q_STATE_RESET) {519 struct bnx2x_queue_state_params qstate;520 521 memset(&qstate, 0, sizeof(struct bnx2x_queue_state_params));522 qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);523 qstate.q_obj->state = BNX2X_Q_STATE_STOPPED;524 qstate.cmd = BNX2X_Q_CMD_TERMINATE;525 set_bit(RAMROD_COMP_WAIT, &qstate.ramrod_flags);526 rc = bnx2x_queue_state_change(bp, &qstate);527 if (rc)528 goto op_err;529 }530 531 return 0;532op_err:533 BNX2X_ERR("vf[%d:%d] error: rc %d\n", vf->abs_vfid, qid, rc);534 return rc;535}536 537int bnx2x_vf_mcast(struct bnx2x *bp, struct bnx2x_virtf *vf,538 bnx2x_mac_addr_t *mcasts, int mc_num, bool drv_only)539{540 struct bnx2x_mcast_list_elem *mc = NULL;541 struct bnx2x_mcast_ramrod_params mcast;542 int rc, i;543 544 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);545 546 /* Prepare Multicast command */547 memset(&mcast, 0, sizeof(struct bnx2x_mcast_ramrod_params));548 mcast.mcast_obj = &vf->mcast_obj;549 if (drv_only)550 set_bit(RAMROD_DRV_CLR_ONLY, &mcast.ramrod_flags);551 else552 set_bit(RAMROD_COMP_WAIT, &mcast.ramrod_flags);553 if (mc_num) {554 mc = kcalloc(mc_num, sizeof(struct bnx2x_mcast_list_elem),555 GFP_KERNEL);556 if (!mc) {557 BNX2X_ERR("Cannot Configure multicasts due to lack of memory\n");558 return -ENOMEM;559 }560 }561 562 if (mc_num) {563 INIT_LIST_HEAD(&mcast.mcast_list);564 for (i = 0; i < mc_num; i++) {565 mc[i].mac = mcasts[i];566 list_add_tail(&mc[i].link,567 &mcast.mcast_list);568 }569 570 /* add new mcasts */571 mcast.mcast_list_len = mc_num;572 rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_SET);573 if (rc)574 BNX2X_ERR("Failed to set multicasts\n");575 } else {576 /* clear existing mcasts */577 rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_DEL);578 if (rc)579 BNX2X_ERR("Failed to remove multicasts\n");580 }581 582 kfree(mc);583 584 return rc;585}586 587static void bnx2x_vf_prep_rx_mode(struct bnx2x *bp, u8 qid,588 struct bnx2x_rx_mode_ramrod_params *ramrod,589 struct bnx2x_virtf *vf,590 unsigned long accept_flags)591{592 struct bnx2x_vf_queue *vfq = vfq_get(vf, qid);593 594 memset(ramrod, 0, sizeof(*ramrod));595 ramrod->cid = vfq->cid;596 ramrod->cl_id = vfq_cl_id(vf, vfq);597 ramrod->rx_mode_obj = &bp->rx_mode_obj;598 ramrod->func_id = FW_VF_HANDLE(vf->abs_vfid);599 ramrod->rx_accept_flags = accept_flags;600 ramrod->tx_accept_flags = accept_flags;601 ramrod->pstate = &vf->filter_state;602 ramrod->state = BNX2X_FILTER_RX_MODE_PENDING;603 604 set_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);605 set_bit(RAMROD_RX, &ramrod->ramrod_flags);606 set_bit(RAMROD_TX, &ramrod->ramrod_flags);607 608 ramrod->rdata = bnx2x_vf_sp(bp, vf, rx_mode_rdata.e2);609 ramrod->rdata_mapping = bnx2x_vf_sp_map(bp, vf, rx_mode_rdata.e2);610}611 612int bnx2x_vf_rxmode(struct bnx2x *bp, struct bnx2x_virtf *vf,613 int qid, unsigned long accept_flags)614{615 struct bnx2x_rx_mode_ramrod_params ramrod;616 617 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);618 619 bnx2x_vf_prep_rx_mode(bp, qid, &ramrod, vf, accept_flags);620 set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);621 vfq_get(vf, qid)->accept_flags = ramrod.rx_accept_flags;622 return bnx2x_config_rx_mode(bp, &ramrod);623}624 625int bnx2x_vf_queue_teardown(struct bnx2x *bp, struct bnx2x_virtf *vf, int qid)626{627 int rc;628 629 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);630 631 /* Remove all classification configuration for leading queue */632 if (qid == LEADING_IDX) {633 rc = bnx2x_vf_rxmode(bp, vf, qid, 0);634 if (rc)635 goto op_err;636 637 /* Remove filtering if feasible */638 if (bnx2x_validate_vf_sp_objs(bp, vf, true)) {639 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,640 false,641 BNX2X_VF_FILTER_VLAN_MAC);642 if (rc)643 goto op_err;644 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,645 false,646 BNX2X_VF_FILTER_VLAN);647 if (rc)648 goto op_err;649 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,650 false,651 BNX2X_VF_FILTER_MAC);652 if (rc)653 goto op_err;654 rc = bnx2x_vf_mcast(bp, vf, NULL, 0, false);655 if (rc)656 goto op_err;657 }658 }659 660 /* Destroy queue */661 rc = bnx2x_vf_queue_destroy(bp, vf, qid);662 if (rc)663 goto op_err;664 return rc;665op_err:666 BNX2X_ERR("vf[%d:%d] error: rc %d\n",667 vf->abs_vfid, qid, rc);668 return rc;669}670 671/* VF enable primitives672 * when pretend is required the caller is responsible673 * for calling pretend prior to calling these routines674 */675 676/* internal vf enable - until vf is enabled internally all transactions677 * are blocked. This routine should always be called last with pretend.678 */679static void bnx2x_vf_enable_internal(struct bnx2x *bp, u8 enable)680{681 REG_WR(bp, PGLUE_B_REG_INTERNAL_VFID_ENABLE, enable ? 1 : 0);682}683 684/* clears vf error in all semi blocks */685static void bnx2x_vf_semi_clear_err(struct bnx2x *bp, u8 abs_vfid)686{687 REG_WR(bp, TSEM_REG_VFPF_ERR_NUM, abs_vfid);688 REG_WR(bp, USEM_REG_VFPF_ERR_NUM, abs_vfid);689 REG_WR(bp, CSEM_REG_VFPF_ERR_NUM, abs_vfid);690 REG_WR(bp, XSEM_REG_VFPF_ERR_NUM, abs_vfid);691}692 693static void bnx2x_vf_pglue_clear_err(struct bnx2x *bp, u8 abs_vfid)694{695 u32 was_err_group = (2 * BP_PATH(bp) + abs_vfid) >> 5;696 u32 was_err_reg = 0;697 698 switch (was_err_group) {699 case 0:700 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR;701 break;702 case 1:703 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_63_32_CLR;704 break;705 case 2:706 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_95_64_CLR;707 break;708 case 3:709 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR;710 break;711 }712 REG_WR(bp, was_err_reg, 1 << (abs_vfid & 0x1f));713}714 715static void bnx2x_vf_igu_reset(struct bnx2x *bp, struct bnx2x_virtf *vf)716{717 int i;718 u32 val;719 720 /* Set VF masks and configuration - pretend */721 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));722 723 REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_LSB, 0);724 REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_MSB, 0);725 REG_WR(bp, IGU_REG_SB_MASK_LSB, 0);726 REG_WR(bp, IGU_REG_SB_MASK_MSB, 0);727 REG_WR(bp, IGU_REG_PBA_STATUS_LSB, 0);728 REG_WR(bp, IGU_REG_PBA_STATUS_MSB, 0);729 730 val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);731 val |= (IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_MSI_MSIX_EN);732 val &= ~IGU_VF_CONF_PARENT_MASK;733 val |= (BP_ABS_FUNC(bp) >> 1) << IGU_VF_CONF_PARENT_SHIFT;734 REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);735 736 DP(BNX2X_MSG_IOV,737 "value in IGU_REG_VF_CONFIGURATION of vf %d after write is 0x%08x\n",738 vf->abs_vfid, val);739 740 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));741 742 /* iterate over all queues, clear sb consumer */743 for (i = 0; i < vf_sb_count(vf); i++) {744 u8 igu_sb_id = vf_igu_sb(vf, i);745 746 /* zero prod memory */747 REG_WR(bp, IGU_REG_PROD_CONS_MEMORY + igu_sb_id * 4, 0);748 749 /* clear sb state machine */750 bnx2x_igu_clear_sb_gen(bp, vf->abs_vfid, igu_sb_id,751 false /* VF */);752 753 /* disable + update */754 bnx2x_vf_igu_ack_sb(bp, vf, igu_sb_id, USTORM_ID, 0,755 IGU_INT_DISABLE, 1);756 }757}758 759void bnx2x_vf_enable_access(struct bnx2x *bp, u8 abs_vfid)760{761 u16 abs_fid;762 763 abs_fid = FW_VF_HANDLE(abs_vfid);764 765 /* set the VF-PF association in the FW */766 storm_memset_vf_to_pf(bp, abs_fid, BP_FUNC(bp));767 storm_memset_func_en(bp, abs_fid, 1);768 769 /* Invalidate fp_hsi version for vfs */770 if (bp->fw_cap & FW_CAP_INVALIDATE_VF_FP_HSI)771 REG_WR8(bp, BAR_XSTRORM_INTMEM +772 XSTORM_ETH_FUNCTION_INFO_FP_HSI_VALID_E2_OFFSET(abs_fid), 0);773 774 /* clear vf errors*/775 bnx2x_vf_semi_clear_err(bp, abs_vfid);776 bnx2x_vf_pglue_clear_err(bp, abs_vfid);777 778 /* internal vf-enable - pretend */779 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, abs_vfid));780 DP(BNX2X_MSG_IOV, "enabling internal access for vf %x\n", abs_vfid);781 bnx2x_vf_enable_internal(bp, true);782 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));783}784 785static void bnx2x_vf_enable_traffic(struct bnx2x *bp, struct bnx2x_virtf *vf)786{787 /* Reset vf in IGU interrupts are still disabled */788 bnx2x_vf_igu_reset(bp, vf);789 790 /* pretend to enable the vf with the PBF */791 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));792 REG_WR(bp, PBF_REG_DISABLE_VF, 0);793 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));794}795 796static u8 bnx2x_vf_is_pcie_pending(struct bnx2x *bp, u8 abs_vfid)797{798 struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);799 struct pci_dev *dev;800 bool pending;801 802 if (!vf)803 return false;804 805 dev = pci_get_domain_bus_and_slot(vf->domain, vf->bus, vf->devfn);806 if (!dev)807 return false;808 pending = bnx2x_is_pcie_pending(dev);809 pci_dev_put(dev);810 811 return pending;812}813 814int bnx2x_vf_flr_clnup_epilog(struct bnx2x *bp, u8 abs_vfid)815{816 /* Verify no pending pci transactions */817 if (bnx2x_vf_is_pcie_pending(bp, abs_vfid))818 BNX2X_ERR("PCIE Transactions still pending\n");819 820 return 0;821}822 823/* must be called after the number of PF queues and the number of VFs are824 * both known825 */826static void827bnx2x_iov_static_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)828{829 struct vf_pf_resc_request *resc = &vf->alloc_resc;830 831 /* will be set only during VF-ACQUIRE */832 resc->num_rxqs = 0;833 resc->num_txqs = 0;834 835 resc->num_mac_filters = VF_MAC_CREDIT_CNT;836 resc->num_vlan_filters = VF_VLAN_CREDIT_CNT;837 838 /* no real limitation */839 resc->num_mc_filters = 0;840 841 /* num_sbs already set */842 resc->num_sbs = vf->sb_count;843}844 845/* FLR routines: */846static void bnx2x_vf_free_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)847{848 /* reset the state variables */849 bnx2x_iov_static_resc(bp, vf);850 vf->state = VF_FREE;851}852 853static void bnx2x_vf_flr_clnup_hw(struct bnx2x *bp, struct bnx2x_virtf *vf)854{855 u32 poll_cnt = bnx2x_flr_clnup_poll_count(bp);856 857 /* DQ usage counter */858 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));859 bnx2x_flr_clnup_poll_hw_counter(bp, DORQ_REG_VF_USAGE_CNT,860 "DQ VF usage counter timed out",861 poll_cnt);862 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));863 864 /* FW cleanup command - poll for the results */865 if (bnx2x_send_final_clnup(bp, (u8)FW_VF_HANDLE(vf->abs_vfid),866 poll_cnt))867 BNX2X_ERR("VF[%d] Final cleanup timed-out\n", vf->abs_vfid);868 869 /* verify TX hw is flushed */870 bnx2x_tx_hw_flushed(bp, poll_cnt);871}872 873static void bnx2x_vf_flr(struct bnx2x *bp, struct bnx2x_virtf *vf)874{875 int rc, i;876 877 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);878 879 /* the cleanup operations are valid if and only if the VF880 * was first acquired.881 */882 for (i = 0; i < vf_rxq_count(vf); i++) {883 rc = bnx2x_vf_queue_flr(bp, vf, i);884 if (rc)885 goto out;886 }887 888 /* remove multicasts */889 bnx2x_vf_mcast(bp, vf, NULL, 0, true);890 891 /* dispatch final cleanup and wait for HW queues to flush */892 bnx2x_vf_flr_clnup_hw(bp, vf);893 894 /* release VF resources */895 bnx2x_vf_free_resc(bp, vf);896 897 vf->malicious = false;898 899 /* re-open the mailbox */900 bnx2x_vf_enable_mbx(bp, vf->abs_vfid);901 return;902out:903 BNX2X_ERR("vf[%d:%d] failed flr: rc %d\n",904 vf->abs_vfid, i, rc);905}906 907static void bnx2x_vf_flr_clnup(struct bnx2x *bp)908{909 struct bnx2x_virtf *vf;910 int i;911 912 for (i = 0; i < BNX2X_NR_VIRTFN(bp); i++) {913 /* VF should be RESET & in FLR cleanup states */914 if (bnx2x_vf(bp, i, state) != VF_RESET ||915 !bnx2x_vf(bp, i, flr_clnup_stage))916 continue;917 918 DP(BNX2X_MSG_IOV, "next vf to cleanup: %d. Num of vfs: %d\n",919 i, BNX2X_NR_VIRTFN(bp));920 921 vf = BP_VF(bp, i);922 923 /* lock the vf pf channel */924 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);925 926 /* invoke the VF FLR SM */927 bnx2x_vf_flr(bp, vf);928 929 /* mark the VF to be ACKED and continue */930 vf->flr_clnup_stage = false;931 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);932 }933 934 /* Acknowledge the handled VFs.935 * we are acknowledge all the vfs which an flr was requested for, even936 * if amongst them there are such that we never opened, since the mcp937 * will interrupt us immediately again if we only ack some of the bits,938 * resulting in an endless loop. This can happen for example in KVM939 * where an 'all ones' flr request is sometimes given by hyper visor940 */941 DP(BNX2X_MSG_MCP, "DRV_STATUS_VF_DISABLED ACK for vfs 0x%x 0x%x\n",942 bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);943 for (i = 0; i < FLRD_VFS_DWORDS; i++)944 SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i],945 bp->vfdb->flrd_vfs[i]);946 947 bnx2x_fw_command(bp, DRV_MSG_CODE_VF_DISABLED_DONE, 0);948 949 /* clear the acked bits - better yet if the MCP implemented950 * write to clear semantics951 */952 for (i = 0; i < FLRD_VFS_DWORDS; i++)953 SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i], 0);954}955 956void bnx2x_vf_handle_flr_event(struct bnx2x *bp)957{958 int i;959 960 /* Read FLR'd VFs */961 for (i = 0; i < FLRD_VFS_DWORDS; i++)962 bp->vfdb->flrd_vfs[i] = SHMEM2_RD(bp, mcp_vf_disabled[i]);963 964 DP(BNX2X_MSG_MCP,965 "DRV_STATUS_VF_DISABLED received for vfs 0x%x 0x%x\n",966 bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);967 968 for_each_vf(bp, i) {969 struct bnx2x_virtf *vf = BP_VF(bp, i);970 u32 reset = 0;971 972 if (vf->abs_vfid < 32)973 reset = bp->vfdb->flrd_vfs[0] & (1 << vf->abs_vfid);974 else975 reset = bp->vfdb->flrd_vfs[1] &976 (1 << (vf->abs_vfid - 32));977 978 if (reset) {979 /* set as reset and ready for cleanup */980 vf->state = VF_RESET;981 vf->flr_clnup_stage = true;982 983 DP(BNX2X_MSG_IOV,984 "Initiating Final cleanup for VF %d\n",985 vf->abs_vfid);986 }987 }988 989 /* do the FLR cleanup for all marked VFs*/990 bnx2x_vf_flr_clnup(bp);991}992 993/* IOV global initialization routines */994void bnx2x_iov_init_dq(struct bnx2x *bp)995{996 if (!IS_SRIOV(bp))997 return;998 999 /* Set the DQ such that the CID reflect the abs_vfid */1000 REG_WR(bp, DORQ_REG_VF_NORM_VF_BASE, 0);1001 REG_WR(bp, DORQ_REG_MAX_RVFID_SIZE, ilog2(BNX2X_MAX_NUM_OF_VFS));1002 1003 /* Set VFs starting CID. If its > 0 the preceding CIDs are belong to1004 * the PF L2 queues1005 */1006 REG_WR(bp, DORQ_REG_VF_NORM_CID_BASE, BNX2X_FIRST_VF_CID);1007 1008 /* The VF window size is the log2 of the max number of CIDs per VF */1009 REG_WR(bp, DORQ_REG_VF_NORM_CID_WND_SIZE, BNX2X_VF_CID_WND);1010 1011 /* The VF doorbell size 0 - *B, 4 - 128B. We set it here to match1012 * the Pf doorbell size although the 2 are independent.1013 */1014 REG_WR(bp, DORQ_REG_VF_NORM_CID_OFST, 3);1015 1016 /* No security checks for now -1017 * configure single rule (out of 16) mask = 0x1, value = 0x0,1018 * CID range 0 - 0x1ffff1019 */1020 REG_WR(bp, DORQ_REG_VF_TYPE_MASK_0, 1);1021 REG_WR(bp, DORQ_REG_VF_TYPE_VALUE_0, 0);1022 REG_WR(bp, DORQ_REG_VF_TYPE_MIN_MCID_0, 0);1023 REG_WR(bp, DORQ_REG_VF_TYPE_MAX_MCID_0, 0x1ffff);1024 1025 /* set the VF doorbell threshold. This threshold represents the amount1026 * of doorbells allowed in the main DORQ fifo for a specific VF.1027 */1028 REG_WR(bp, DORQ_REG_VF_USAGE_CT_LIMIT, 64);1029}1030 1031void bnx2x_iov_init_dmae(struct bnx2x *bp)1032{1033 if (pci_find_ext_capability(bp->pdev, PCI_EXT_CAP_ID_SRIOV))1034 REG_WR(bp, DMAE_REG_BACKWARD_COMP_EN, 0);1035}1036 1037static int bnx2x_vf_domain(struct bnx2x *bp, int vfid)1038{1039 struct pci_dev *dev = bp->pdev;1040 1041 return pci_domain_nr(dev->bus);1042}1043 1044static int bnx2x_vf_bus(struct bnx2x *bp, int vfid)1045{1046 struct pci_dev *dev = bp->pdev;1047 struct bnx2x_sriov *iov = &bp->vfdb->sriov;1048 1049 return dev->bus->number + ((dev->devfn + iov->offset +1050 iov->stride * vfid) >> 8);1051}1052 1053static int bnx2x_vf_devfn(struct bnx2x *bp, int vfid)1054{1055 struct pci_dev *dev = bp->pdev;1056 struct bnx2x_sriov *iov = &bp->vfdb->sriov;1057 1058 return (dev->devfn + iov->offset + iov->stride * vfid) & 0xff;1059}1060 1061static void bnx2x_vf_set_bars(struct bnx2x *bp, struct bnx2x_virtf *vf)1062{1063 int i, n;1064 struct pci_dev *dev = bp->pdev;1065 struct bnx2x_sriov *iov = &bp->vfdb->sriov;1066 1067 for (i = 0, n = 0; i < PCI_SRIOV_NUM_BARS; i += 2, n++) {1068 u64 start = pci_resource_start(dev, PCI_IOV_RESOURCES + i);1069 u32 size = pci_resource_len(dev, PCI_IOV_RESOURCES + i);1070 1071 size /= iov->total;1072 vf->bars[n].bar = start + size * vf->abs_vfid;1073 vf->bars[n].size = size;1074 }1075}1076 1077static int1078bnx2x_get_vf_igu_cam_info(struct bnx2x *bp)1079{1080 int sb_id;1081 u32 val;1082 u8 fid, current_pf = 0;1083 1084 /* IGU in normal mode - read CAM */1085 for (sb_id = 0; sb_id < IGU_REG_MAPPING_MEMORY_SIZE; sb_id++) {1086 val = REG_RD(bp, IGU_REG_MAPPING_MEMORY + sb_id * 4);1087 if (!(val & IGU_REG_MAPPING_MEMORY_VALID))1088 continue;1089 fid = GET_FIELD((val), IGU_REG_MAPPING_MEMORY_FID);1090 if (fid & IGU_FID_ENCODE_IS_PF)1091 current_pf = fid & IGU_FID_PF_NUM_MASK;1092 else if (current_pf == BP_FUNC(bp))1093 bnx2x_vf_set_igu_info(bp, sb_id,1094 (fid & IGU_FID_VF_NUM_MASK));1095 DP(BNX2X_MSG_IOV, "%s[%d], igu_sb_id=%d, msix=%d\n",1096 ((fid & IGU_FID_ENCODE_IS_PF) ? "PF" : "VF"),1097 ((fid & IGU_FID_ENCODE_IS_PF) ? (fid & IGU_FID_PF_NUM_MASK) :1098 (fid & IGU_FID_VF_NUM_MASK)), sb_id,1099 GET_FIELD((val), IGU_REG_MAPPING_MEMORY_VECTOR));1100 }1101 DP(BNX2X_MSG_IOV, "vf_sbs_pool is %d\n", BP_VFDB(bp)->vf_sbs_pool);1102 return BP_VFDB(bp)->vf_sbs_pool;1103}1104 1105static void __bnx2x_iov_free_vfdb(struct bnx2x *bp)1106{1107 if (bp->vfdb) {1108 kfree(bp->vfdb->vfqs);1109 kfree(bp->vfdb->vfs);1110 kfree(bp->vfdb);1111 }1112 bp->vfdb = NULL;1113}1114 1115static int bnx2x_sriov_pci_cfg_info(struct bnx2x *bp, struct bnx2x_sriov *iov)1116{1117 int pos;1118 struct pci_dev *dev = bp->pdev;1119 1120 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);1121 if (!pos) {1122 BNX2X_ERR("failed to find SRIOV capability in device\n");1123 return -ENODEV;1124 }1125 1126 iov->pos = pos;1127 DP(BNX2X_MSG_IOV, "sriov ext pos %d\n", pos);1128 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &iov->ctrl);1129 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &iov->total);1130 pci_read_config_word(dev, pos + PCI_SRIOV_INITIAL_VF, &iov->initial);1131 pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &iov->offset);1132 pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &iov->stride);1133 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);1134 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);1135 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);1136 1137 return 0;1138}1139 1140static int bnx2x_sriov_info(struct bnx2x *bp, struct bnx2x_sriov *iov)1141{1142 u32 val;1143 1144 /* read the SRIOV capability structure1145 * The fields can be read via configuration read or1146 * directly from the device (starting at offset PCICFG_OFFSET)1147 */1148 if (bnx2x_sriov_pci_cfg_info(bp, iov))1149 return -ENODEV;1150 1151 /* get the number of SRIOV bars */1152 iov->nres = 0;1153 1154 /* read the first_vfid */1155 val = REG_RD(bp, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF);1156 iov->first_vf_in_pf = ((val & GRC_CR_PF_INIT_VF_PF_FIRST_VF_NUM_MASK)1157 * 8) - (BNX2X_MAX_NUM_OF_VFS * BP_PATH(bp));1158 1159 DP(BNX2X_MSG_IOV,1160 "IOV info[%d]: first vf %d, nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",1161 BP_FUNC(bp),1162 iov->first_vf_in_pf, iov->nres, iov->cap, iov->ctrl, iov->total,1163 iov->initial, iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);1164 1165 return 0;1166}1167 1168/* must be called after PF bars are mapped */1169int bnx2x_iov_init_one(struct bnx2x *bp, int int_mode_param,1170 int num_vfs_param)1171{1172 int err, i;1173 struct bnx2x_sriov *iov;1174 struct pci_dev *dev = bp->pdev;1175 1176 bp->vfdb = NULL;1177 1178 /* verify is pf */1179 if (IS_VF(bp))1180 return 0;1181 1182 /* verify sriov capability is present in configuration space */1183 if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV))1184 return 0;1185 1186 /* verify chip revision */1187 if (CHIP_IS_E1x(bp))1188 return 0;1189 1190 /* check if SRIOV support is turned off */1191 if (!num_vfs_param)1192 return 0;1193 1194 /* SRIOV assumes that num of PF CIDs < BNX2X_FIRST_VF_CID */1195 if (BNX2X_L2_MAX_CID(bp) >= BNX2X_FIRST_VF_CID) {1196 BNX2X_ERR("PF cids %d are overspilling into vf space (starts at %d). Abort SRIOV\n",1197 BNX2X_L2_MAX_CID(bp), BNX2X_FIRST_VF_CID);1198 return 0;1199 }1200 1201 /* SRIOV can be enabled only with MSIX */1202 if (int_mode_param == BNX2X_INT_MODE_MSI ||1203 int_mode_param == BNX2X_INT_MODE_INTX) {1204 BNX2X_ERR("Forced MSI/INTx mode is incompatible with SRIOV\n");1205 return 0;1206 }1207 1208 /* verify ari is enabled */1209 if (!pci_ari_enabled(bp->pdev->bus)) {1210 BNX2X_ERR("ARI not supported (check pci bridge ARI forwarding), SRIOV can not be enabled\n");1211 return 0;1212 }1213 1214 /* verify igu is in normal mode */1215 if (CHIP_INT_MODE_IS_BC(bp)) {1216 BNX2X_ERR("IGU not normal mode, SRIOV can not be enabled\n");1217 return 0;1218 }1219 1220 /* allocate the vfs database */1221 bp->vfdb = kzalloc(sizeof(*(bp->vfdb)), GFP_KERNEL);1222 if (!bp->vfdb) {1223 BNX2X_ERR("failed to allocate vf database\n");1224 err = -ENOMEM;1225 goto failed;1226 }1227 1228 /* get the sriov info - Linux already collected all the pertinent1229 * information, however the sriov structure is for the private use1230 * of the pci module. Also we want this information regardless1231 * of the hyper-visor.1232 */1233 iov = &(bp->vfdb->sriov);1234 err = bnx2x_sriov_info(bp, iov);1235 if (err)1236 goto failed;1237 1238 /* SR-IOV capability was enabled but there are no VFs*/1239 if (iov->total == 0) {1240 err = 0;1241 goto failed;1242 }1243 1244 iov->nr_virtfn = min_t(u16, iov->total, num_vfs_param);1245 1246 DP(BNX2X_MSG_IOV, "num_vfs_param was %d, nr_virtfn was %d\n",1247 num_vfs_param, iov->nr_virtfn);1248 1249 /* allocate the vf array */1250 bp->vfdb->vfs = kcalloc(BNX2X_NR_VIRTFN(bp),1251 sizeof(struct bnx2x_virtf),1252 GFP_KERNEL);1253 if (!bp->vfdb->vfs) {1254 BNX2X_ERR("failed to allocate vf array\n");1255 err = -ENOMEM;1256 goto failed;1257 }1258 1259 /* Initial VF init - index and abs_vfid - nr_virtfn must be set */1260 for_each_vf(bp, i) {1261 bnx2x_vf(bp, i, index) = i;1262 bnx2x_vf(bp, i, abs_vfid) = iov->first_vf_in_pf + i;1263 bnx2x_vf(bp, i, state) = VF_FREE;1264 mutex_init(&bnx2x_vf(bp, i, op_mutex));1265 bnx2x_vf(bp, i, op_current) = CHANNEL_TLV_NONE;1266 /* enable spoofchk by default */1267 bnx2x_vf(bp, i, spoofchk) = 1;1268 }1269 1270 /* re-read the IGU CAM for VFs - index and abs_vfid must be set */1271 if (!bnx2x_get_vf_igu_cam_info(bp)) {1272 BNX2X_ERR("No entries in IGU CAM for vfs\n");1273 err = -EINVAL;1274 goto failed;1275 }1276 1277 /* allocate the queue arrays for all VFs */1278 bp->vfdb->vfqs = kcalloc(BNX2X_MAX_NUM_VF_QUEUES,1279 sizeof(struct bnx2x_vf_queue),1280 GFP_KERNEL);1281 1282 if (!bp->vfdb->vfqs) {1283 BNX2X_ERR("failed to allocate vf queue array\n");1284 err = -ENOMEM;1285 goto failed;1286 }1287 1288 /* Prepare the VFs event synchronization mechanism */1289 mutex_init(&bp->vfdb->event_mutex);1290 1291 mutex_init(&bp->vfdb->bulletin_mutex);1292 1293 if (SHMEM2_HAS(bp, sriov_switch_mode))1294 SHMEM2_WR(bp, sriov_switch_mode, SRIOV_SWITCH_MODE_VEB);1295 1296 return 0;1297failed:1298 DP(BNX2X_MSG_IOV, "Failed err=%d\n", err);1299 __bnx2x_iov_free_vfdb(bp);1300 return err;1301}1302 1303void bnx2x_iov_remove_one(struct bnx2x *bp)1304{1305 int vf_idx;1306 1307 /* if SRIOV is not enabled there's nothing to do */1308 if (!IS_SRIOV(bp))1309 return;1310 1311 bnx2x_disable_sriov(bp);1312 1313 /* disable access to all VFs */1314 for (vf_idx = 0; vf_idx < bp->vfdb->sriov.total; vf_idx++) {1315 bnx2x_pretend_func(bp,1316 HW_VF_HANDLE(bp,1317 bp->vfdb->sriov.first_vf_in_pf +1318 vf_idx));1319 DP(BNX2X_MSG_IOV, "disabling internal access for vf %d\n",1320 bp->vfdb->sriov.first_vf_in_pf + vf_idx);1321 bnx2x_vf_enable_internal(bp, 0);1322 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));1323 }1324 1325 /* free vf database */1326 __bnx2x_iov_free_vfdb(bp);1327}1328 1329void bnx2x_iov_free_mem(struct bnx2x *bp)1330{1331 int i;1332 1333 if (!IS_SRIOV(bp))1334 return;1335 1336 /* free vfs hw contexts */1337 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {1338 struct hw_dma *cxt = &bp->vfdb->context[i];1339 BNX2X_PCI_FREE(cxt->addr, cxt->mapping, cxt->size);1340 }1341 1342 BNX2X_PCI_FREE(BP_VFDB(bp)->sp_dma.addr,1343 BP_VFDB(bp)->sp_dma.mapping,1344 BP_VFDB(bp)->sp_dma.size);1345 1346 BNX2X_PCI_FREE(BP_VF_MBX_DMA(bp)->addr,1347 BP_VF_MBX_DMA(bp)->mapping,1348 BP_VF_MBX_DMA(bp)->size);1349 1350 BNX2X_PCI_FREE(BP_VF_BULLETIN_DMA(bp)->addr,1351 BP_VF_BULLETIN_DMA(bp)->mapping,1352 BP_VF_BULLETIN_DMA(bp)->size);1353}1354 1355int bnx2x_iov_alloc_mem(struct bnx2x *bp)1356{1357 size_t tot_size;1358 int i, rc = 0;1359 1360 if (!IS_SRIOV(bp))1361 return rc;1362 1363 /* allocate vfs hw contexts */1364 tot_size = (BP_VFDB(bp)->sriov.first_vf_in_pf + BNX2X_NR_VIRTFN(bp)) *1365 BNX2X_CIDS_PER_VF * sizeof(union cdu_context);1366 1367 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {1368 struct hw_dma *cxt = BP_VF_CXT_PAGE(bp, i);1369 cxt->size = min_t(size_t, tot_size, CDU_ILT_PAGE_SZ);1370 1371 if (cxt->size) {1372 cxt->addr = BNX2X_PCI_ALLOC(&cxt->mapping, cxt->size);1373 if (!cxt->addr)1374 goto alloc_mem_err;1375 } else {1376 cxt->addr = NULL;1377 cxt->mapping = 0;1378 }1379 tot_size -= cxt->size;1380 }1381 1382 /* allocate vfs ramrods dma memory - client_init and set_mac */1383 tot_size = BNX2X_NR_VIRTFN(bp) * sizeof(struct bnx2x_vf_sp);1384 BP_VFDB(bp)->sp_dma.addr = BNX2X_PCI_ALLOC(&BP_VFDB(bp)->sp_dma.mapping,1385 tot_size);1386 if (!BP_VFDB(bp)->sp_dma.addr)1387 goto alloc_mem_err;1388 BP_VFDB(bp)->sp_dma.size = tot_size;1389 1390 /* allocate mailboxes */1391 tot_size = BNX2X_NR_VIRTFN(bp) * MBX_MSG_ALIGNED_SIZE;1392 BP_VF_MBX_DMA(bp)->addr = BNX2X_PCI_ALLOC(&BP_VF_MBX_DMA(bp)->mapping,1393 tot_size);1394 if (!BP_VF_MBX_DMA(bp)->addr)1395 goto alloc_mem_err;1396 1397 BP_VF_MBX_DMA(bp)->size = tot_size;1398 1399 /* allocate local bulletin boards */1400 tot_size = BNX2X_NR_VIRTFN(bp) * BULLETIN_CONTENT_SIZE;1401 BP_VF_BULLETIN_DMA(bp)->addr = BNX2X_PCI_ALLOC(&BP_VF_BULLETIN_DMA(bp)->mapping,1402 tot_size);1403 if (!BP_VF_BULLETIN_DMA(bp)->addr)1404 goto alloc_mem_err;1405 1406 BP_VF_BULLETIN_DMA(bp)->size = tot_size;1407 1408 return 0;1409 1410alloc_mem_err:1411 return -ENOMEM;1412}1413 1414static void bnx2x_vfq_init(struct bnx2x *bp, struct bnx2x_virtf *vf,1415 struct bnx2x_vf_queue *q)1416{1417 u8 cl_id = vfq_cl_id(vf, q);1418 u8 func_id = FW_VF_HANDLE(vf->abs_vfid);1419 unsigned long q_type = 0;1420 1421 set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type);1422 set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type);1423 1424 /* Queue State object */1425 bnx2x_init_queue_obj(bp, &q->sp_obj,1426 cl_id, &q->cid, 1, func_id,1427 bnx2x_vf_sp(bp, vf, q_data),1428 bnx2x_vf_sp_map(bp, vf, q_data),1429 q_type);1430 1431 /* sp indication is set only when vlan/mac/etc. are initialized */1432 q->sp_initialized = false;1433 1434 DP(BNX2X_MSG_IOV,1435 "initialized vf %d's queue object. func id set to %d. cid set to 0x%x\n",1436 vf->abs_vfid, q->sp_obj.func_id, q->cid);1437}1438 1439static int bnx2x_max_speed_cap(struct bnx2x *bp)1440{1441 u32 supported = bp->port.supported[bnx2x_get_link_cfg_idx(bp)];1442 1443 if (supported &1444 (SUPPORTED_20000baseMLD2_Full | SUPPORTED_20000baseKR2_Full))1445 return 20000;1446 1447 return 10000; /* assume lowest supported speed is 10G */1448}1449 1450int bnx2x_iov_link_update_vf(struct bnx2x *bp, int idx)1451{1452 struct bnx2x_link_report_data *state = &bp->last_reported_link;1453 struct pf_vf_bulletin_content *bulletin;1454 struct bnx2x_virtf *vf;1455 bool update = true;1456 int rc = 0;1457 1458 /* sanity and init */1459 rc = bnx2x_vf_op_prep(bp, idx, &vf, &bulletin, false);1460 if (rc)1461 return rc;1462 1463 mutex_lock(&bp->vfdb->bulletin_mutex);1464 1465 if (vf->link_cfg == IFLA_VF_LINK_STATE_AUTO) {1466 bulletin->valid_bitmap |= 1 << LINK_VALID;1467 1468 bulletin->link_speed = state->line_speed;1469 bulletin->link_flags = 0;1470 if (test_bit(BNX2X_LINK_REPORT_LINK_DOWN,1471 &state->link_report_flags))1472 bulletin->link_flags |= VFPF_LINK_REPORT_LINK_DOWN;1473 if (test_bit(BNX2X_LINK_REPORT_FD,1474 &state->link_report_flags))1475 bulletin->link_flags |= VFPF_LINK_REPORT_FULL_DUPLEX;1476 if (test_bit(BNX2X_LINK_REPORT_RX_FC_ON,1477 &state->link_report_flags))1478 bulletin->link_flags |= VFPF_LINK_REPORT_RX_FC_ON;1479 if (test_bit(BNX2X_LINK_REPORT_TX_FC_ON,1480 &state->link_report_flags))1481 bulletin->link_flags |= VFPF_LINK_REPORT_TX_FC_ON;1482 } else if (vf->link_cfg == IFLA_VF_LINK_STATE_DISABLE &&1483 !(bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)) {1484 bulletin->valid_bitmap |= 1 << LINK_VALID;1485 bulletin->link_flags |= VFPF_LINK_REPORT_LINK_DOWN;1486 } else if (vf->link_cfg == IFLA_VF_LINK_STATE_ENABLE &&1487 (bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)) {1488 bulletin->valid_bitmap |= 1 << LINK_VALID;1489 bulletin->link_speed = bnx2x_max_speed_cap(bp);1490 bulletin->link_flags &= ~VFPF_LINK_REPORT_LINK_DOWN;1491 } else {1492 update = false;1493 }1494 1495 if (update) {1496 DP(NETIF_MSG_LINK | BNX2X_MSG_IOV,1497 "vf %d mode %u speed %d flags %x\n", idx,1498 vf->link_cfg, bulletin->link_speed, bulletin->link_flags);1499 1500 /* Post update on VF's bulletin board */1501 rc = bnx2x_post_vf_bulletin(bp, idx);1502 if (rc) {1503 BNX2X_ERR("failed to update VF[%d] bulletin\n", idx);1504 goto out;1505 }1506 }1507 1508out:1509 mutex_unlock(&bp->vfdb->bulletin_mutex);1510 return rc;1511}1512 1513int bnx2x_set_vf_link_state(struct net_device *dev, int idx, int link_state)1514{1515 struct bnx2x *bp = netdev_priv(dev);1516 struct bnx2x_virtf *vf = BP_VF(bp, idx);1517 1518 if (!vf)1519 return -EINVAL;1520 1521 if (vf->link_cfg == link_state)1522 return 0; /* nothing todo */1523 1524 vf->link_cfg = link_state;1525 1526 return bnx2x_iov_link_update_vf(bp, idx);1527}1528 1529void bnx2x_iov_link_update(struct bnx2x *bp)1530{1531 int vfid;1532 1533 if (!IS_SRIOV(bp))1534 return;1535 1536 for_each_vf(bp, vfid)1537 bnx2x_iov_link_update_vf(bp, vfid);1538}1539 1540/* called by bnx2x_nic_load */1541int bnx2x_iov_nic_init(struct bnx2x *bp)1542{1543 int vfid;1544 1545 if (!IS_SRIOV(bp)) {1546 DP(BNX2X_MSG_IOV, "vfdb was not allocated\n");1547 return 0;1548 }1549 1550 DP(BNX2X_MSG_IOV, "num of vfs: %d\n", (bp)->vfdb->sriov.nr_virtfn);1551 1552 /* let FLR complete ... */1553 msleep(100);1554 1555 /* initialize vf database */1556 for_each_vf(bp, vfid) {1557 struct bnx2x_virtf *vf = BP_VF(bp, vfid);1558 1559 int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vfid) *1560 BNX2X_CIDS_PER_VF;1561 1562 union cdu_context *base_cxt = (union cdu_context *)1563 BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +1564 (base_vf_cid & (ILT_PAGE_CIDS-1));1565 1566 DP(BNX2X_MSG_IOV,1567 "VF[%d] Max IGU SBs: %d, base vf cid 0x%x, base cid 0x%x, base cxt %p\n",1568 vf->abs_vfid, vf_sb_count(vf), base_vf_cid,1569 BNX2X_FIRST_VF_CID + base_vf_cid, base_cxt);1570 1571 /* init statically provisioned resources */1572 bnx2x_iov_static_resc(bp, vf);1573 1574 /* queues are initialized during VF-ACQUIRE */1575 vf->filter_state = 0;1576 vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id);1577 1578 bnx2x_init_credit_pool(&vf->vf_vlans_pool, 0,1579 vf_vlan_rules_cnt(vf));1580 bnx2x_init_credit_pool(&vf->vf_macs_pool, 0,1581 vf_mac_rules_cnt(vf));1582 1583 /* init mcast object - This object will be re-initialized1584 * during VF-ACQUIRE with the proper cl_id and cid.1585 * It needs to be initialized here so that it can be safely1586 * handled by a subsequent FLR flow.1587 */1588 bnx2x_init_mcast_obj(bp, &vf->mcast_obj, 0xFF,1589 0xFF, 0xFF, 0xFF,1590 bnx2x_vf_sp(bp, vf, mcast_rdata),1591 bnx2x_vf_sp_map(bp, vf, mcast_rdata),1592 BNX2X_FILTER_MCAST_PENDING,1593 &vf->filter_state,1594 BNX2X_OBJ_TYPE_RX_TX);1595 1596 /* set the mailbox message addresses */1597 BP_VF_MBX(bp, vfid)->msg = (struct bnx2x_vf_mbx_msg *)1598 (((u8 *)BP_VF_MBX_DMA(bp)->addr) + vfid *1599 MBX_MSG_ALIGNED_SIZE);1600 1601 BP_VF_MBX(bp, vfid)->msg_mapping = BP_VF_MBX_DMA(bp)->mapping +1602 vfid * MBX_MSG_ALIGNED_SIZE;1603 1604 /* Enable vf mailbox */1605 bnx2x_vf_enable_mbx(bp, vf->abs_vfid);1606 }1607 1608 /* Final VF init */1609 for_each_vf(bp, vfid) {1610 struct bnx2x_virtf *vf = BP_VF(bp, vfid);1611 1612 /* fill in the BDF and bars */1613 vf->domain = bnx2x_vf_domain(bp, vfid);1614 vf->bus = bnx2x_vf_bus(bp, vfid);1615 vf->devfn = bnx2x_vf_devfn(bp, vfid);1616 bnx2x_vf_set_bars(bp, vf);1617 1618 DP(BNX2X_MSG_IOV,1619 "VF info[%d]: bus 0x%x, devfn 0x%x, bar0 [0x%x, %d], bar1 [0x%x, %d], bar2 [0x%x, %d]\n",1620 vf->abs_vfid, vf->bus, vf->devfn,1621 (unsigned)vf->bars[0].bar, vf->bars[0].size,1622 (unsigned)vf->bars[1].bar, vf->bars[1].size,1623 (unsigned)vf->bars[2].bar, vf->bars[2].size);1624 }1625 1626 return 0;1627}1628 1629/* called by bnx2x_chip_cleanup */1630int bnx2x_iov_chip_cleanup(struct bnx2x *bp)1631{1632 int i;1633 1634 if (!IS_SRIOV(bp))1635 return 0;1636 1637 /* release all the VFs */1638 for_each_vf(bp, i)1639 bnx2x_vf_release(bp, BP_VF(bp, i));1640 1641 return 0;1642}1643 1644/* called by bnx2x_init_hw_func, returns the next ilt line */1645int bnx2x_iov_init_ilt(struct bnx2x *bp, u16 line)1646{1647 int i;1648 struct bnx2x_ilt *ilt = BP_ILT(bp);1649 1650 if (!IS_SRIOV(bp))1651 return line;1652 1653 /* set vfs ilt lines */1654 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {1655 struct hw_dma *hw_cxt = BP_VF_CXT_PAGE(bp, i);1656 1657 ilt->lines[line+i].page = hw_cxt->addr;1658 ilt->lines[line+i].page_mapping = hw_cxt->mapping;1659 ilt->lines[line+i].size = hw_cxt->size; /* doesn't matter */1660 }1661 return line + i;1662}1663 1664static u8 bnx2x_iov_is_vf_cid(struct bnx2x *bp, u16 cid)1665{1666 return ((cid >= BNX2X_FIRST_VF_CID) &&1667 ((cid - BNX2X_FIRST_VF_CID) < BNX2X_VF_CIDS));1668}1669 1670static1671void bnx2x_vf_handle_classification_eqe(struct bnx2x *bp,1672 struct bnx2x_vf_queue *vfq,1673 union event_ring_elem *elem)1674{1675 unsigned long ramrod_flags = 0;1676 int rc = 0;1677 u32 echo = le32_to_cpu(elem->message.data.eth_event.echo);1678 1679 /* Always push next commands out, don't wait here */1680 set_bit(RAMROD_CONT, &ramrod_flags);1681 1682 switch (echo >> BNX2X_SWCID_SHIFT) {1683 case BNX2X_FILTER_MAC_PENDING:1684 rc = vfq->mac_obj.complete(bp, &vfq->mac_obj, elem,1685 &ramrod_flags);1686 break;1687 case BNX2X_FILTER_VLAN_PENDING:1688 rc = vfq->vlan_obj.complete(bp, &vfq->vlan_obj, elem,1689 &ramrod_flags);1690 break;1691 default:1692 BNX2X_ERR("Unsupported classification command: 0x%x\n", echo);1693 return;1694 }1695 if (rc < 0)1696 BNX2X_ERR("Failed to schedule new commands: %d\n", rc);1697 else if (rc > 0)1698 DP(BNX2X_MSG_IOV, "Scheduled next pending commands...\n");1699}1700 1701static1702void bnx2x_vf_handle_mcast_eqe(struct bnx2x *bp,1703 struct bnx2x_virtf *vf)1704{1705 struct bnx2x_mcast_ramrod_params rparam = {NULL};1706 int rc;1707 1708 rparam.mcast_obj = &vf->mcast_obj;1709 vf->mcast_obj.raw.clear_pending(&vf->mcast_obj.raw);1710 1711 /* If there are pending mcast commands - send them */1712 if (vf->mcast_obj.check_pending(&vf->mcast_obj)) {1713 rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);1714 if (rc < 0)1715 BNX2X_ERR("Failed to send pending mcast commands: %d\n",1716 rc);1717 }1718}1719 1720static1721void bnx2x_vf_handle_filters_eqe(struct bnx2x *bp,1722 struct bnx2x_virtf *vf)1723{1724 smp_mb__before_atomic();1725 clear_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);1726 smp_mb__after_atomic();1727}1728 1729static void bnx2x_vf_handle_rss_update_eqe(struct bnx2x *bp,1730 struct bnx2x_virtf *vf)1731{1732 vf->rss_conf_obj.raw.clear_pending(&vf->rss_conf_obj.raw);1733}1734 1735int bnx2x_iov_eq_sp_event(struct bnx2x *bp, union event_ring_elem *elem)1736{1737 struct bnx2x_virtf *vf;1738 int qidx = 0, abs_vfid;1739 u8 opcode;1740 u16 cid = 0xffff;1741 1742 if (!IS_SRIOV(bp))1743 return 1;1744 1745 /* first get the cid - the only events we handle here are cfc-delete1746 * and set-mac completion1747 */1748 opcode = elem->message.opcode;1749 1750 switch (opcode) {1751 case EVENT_RING_OPCODE_CFC_DEL:1752 cid = SW_CID(elem->message.data.cfc_del_event.cid);1753 DP(BNX2X_MSG_IOV, "checking cfc-del comp cid=%d\n", cid);1754 break;1755 case EVENT_RING_OPCODE_CLASSIFICATION_RULES:1756 case EVENT_RING_OPCODE_MULTICAST_RULES:1757 case EVENT_RING_OPCODE_FILTERS_RULES:1758 case EVENT_RING_OPCODE_RSS_UPDATE_RULES:1759 cid = SW_CID(elem->message.data.eth_event.echo);1760 DP(BNX2X_MSG_IOV, "checking filtering comp cid=%d\n", cid);1761 break;1762 case EVENT_RING_OPCODE_VF_FLR:1763 abs_vfid = elem->message.data.vf_flr_event.vf_id;1764 DP(BNX2X_MSG_IOV, "Got VF FLR notification abs_vfid=%d\n",1765 abs_vfid);1766 goto get_vf;1767 case EVENT_RING_OPCODE_MALICIOUS_VF:1768 abs_vfid = elem->message.data.malicious_vf_event.vf_id;1769 BNX2X_ERR("Got VF MALICIOUS notification abs_vfid=%d err_id=0x%x\n",1770 abs_vfid,1771 elem->message.data.malicious_vf_event.err_id);1772 goto get_vf;1773 default:1774 return 1;1775 }1776 1777 /* check if the cid is the VF range */1778 if (!bnx2x_iov_is_vf_cid(bp, cid)) {1779 DP(BNX2X_MSG_IOV, "cid is outside vf range: %d\n", cid);1780 return 1;1781 }1782 1783 /* extract vf and rxq index from vf_cid - relies on the following:1784 * 1. vfid on cid reflects the true abs_vfid1785 * 2. The max number of VFs (per path) is 641786 */1787 qidx = cid & ((1 << BNX2X_VF_CID_WND)-1);1788 abs_vfid = (cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);1789get_vf:1790 vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);1791 1792 if (!vf) {1793 BNX2X_ERR("EQ completion for unknown VF, cid %d, abs_vfid %d\n",1794 cid, abs_vfid);1795 return 0;1796 }1797 1798 switch (opcode) {1799 case EVENT_RING_OPCODE_CFC_DEL:1800 DP(BNX2X_MSG_IOV, "got VF [%d:%d] cfc delete ramrod\n",1801 vf->abs_vfid, qidx);1802 vfq_get(vf, qidx)->sp_obj.complete_cmd(bp,1803 &vfq_get(vf,1804 qidx)->sp_obj,1805 BNX2X_Q_CMD_CFC_DEL);1806 break;1807 case EVENT_RING_OPCODE_CLASSIFICATION_RULES:1808 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mac/vlan ramrod\n",1809 vf->abs_vfid, qidx);1810 bnx2x_vf_handle_classification_eqe(bp, vfq_get(vf, qidx), elem);1811 break;1812 case EVENT_RING_OPCODE_MULTICAST_RULES:1813 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mcast ramrod\n",1814 vf->abs_vfid, qidx);1815 bnx2x_vf_handle_mcast_eqe(bp, vf);1816 break;1817 case EVENT_RING_OPCODE_FILTERS_RULES:1818 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set rx-mode ramrod\n",1819 vf->abs_vfid, qidx);1820 bnx2x_vf_handle_filters_eqe(bp, vf);1821 break;1822 case EVENT_RING_OPCODE_RSS_UPDATE_RULES:1823 DP(BNX2X_MSG_IOV, "got VF [%d:%d] RSS update ramrod\n",1824 vf->abs_vfid, qidx);1825 bnx2x_vf_handle_rss_update_eqe(bp, vf);1826 fallthrough;1827 case EVENT_RING_OPCODE_VF_FLR:1828 /* Do nothing for now */1829 return 0;1830 case EVENT_RING_OPCODE_MALICIOUS_VF:1831 vf->malicious = true;1832 return 0;1833 }1834 1835 return 0;1836}1837 1838static struct bnx2x_virtf *bnx2x_vf_by_cid(struct bnx2x *bp, int vf_cid)1839{1840 /* extract the vf from vf_cid - relies on the following:1841 * 1. vfid on cid reflects the true abs_vfid1842 * 2. The max number of VFs (per path) is 641843 */1844 int abs_vfid = (vf_cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);1845 return bnx2x_vf_by_abs_fid(bp, abs_vfid);1846}1847 1848void bnx2x_iov_set_queue_sp_obj(struct bnx2x *bp, int vf_cid,1849 struct bnx2x_queue_sp_obj **q_obj)1850{1851 struct bnx2x_virtf *vf;1852 1853 if (!IS_SRIOV(bp))1854 return;1855 1856 vf = bnx2x_vf_by_cid(bp, vf_cid);1857 1858 if (vf) {1859 /* extract queue index from vf_cid - relies on the following:1860 * 1. vfid on cid reflects the true abs_vfid1861 * 2. The max number of VFs (per path) is 641862 */1863 int q_index = vf_cid & ((1 << BNX2X_VF_CID_WND)-1);1864 *q_obj = &bnx2x_vfq(vf, q_index, sp_obj);1865 } else {1866 BNX2X_ERR("No vf matching cid %d\n", vf_cid);1867 }1868}1869 1870void bnx2x_iov_adjust_stats_req(struct bnx2x *bp)1871{1872 int i;1873 int first_queue_query_index, num_queues_req;1874 struct stats_query_entry *cur_query_entry;1875 u8 stats_count = 0;1876 bool is_fcoe = false;1877 1878 if (!IS_SRIOV(bp))1879 return;1880 1881 if (!NO_FCOE(bp))1882 is_fcoe = true;1883 1884 /* fcoe adds one global request and one queue request */1885 num_queues_req = BNX2X_NUM_ETH_QUEUES(bp) + is_fcoe;1886 first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX -1887 (is_fcoe ? 0 : 1);1888 1889 DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),1890 "BNX2X_NUM_ETH_QUEUES %d, is_fcoe %d, first_queue_query_index %d => determined the last non virtual statistics query index is %d. Will add queries on top of that\n",1891 BNX2X_NUM_ETH_QUEUES(bp), is_fcoe, first_queue_query_index,1892 first_queue_query_index + num_queues_req);1893 1894 cur_query_entry = &bp->fw_stats_req->1895 query[first_queue_query_index + num_queues_req];1896 1897 for_each_vf(bp, i) {1898 int j;1899 struct bnx2x_virtf *vf = BP_VF(bp, i);1900 1901 if (vf->state != VF_ENABLED) {1902 DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),1903 "vf %d not enabled so no stats for it\n",1904 vf->abs_vfid);1905 continue;1906 }1907 1908 if (vf->malicious) {1909 DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),1910 "vf %d malicious so no stats for it\n",1911 vf->abs_vfid);1912 continue;1913 }1914 1915 DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),1916 "add addresses for vf %d\n", vf->abs_vfid);1917 for_each_vfq(vf, j) {1918 struct bnx2x_vf_queue *rxq = vfq_get(vf, j);1919 1920 dma_addr_t q_stats_addr =1921 vf->fw_stat_map + j * vf->stats_stride;1922 1923 /* collect stats fro active queues only */1924 if (bnx2x_get_q_logical_state(bp, &rxq->sp_obj) ==1925 BNX2X_Q_LOGICAL_STATE_STOPPED)1926 continue;1927 1928 /* create stats query entry for this queue */1929 cur_query_entry->kind = STATS_TYPE_QUEUE;1930 cur_query_entry->index = vfq_stat_id(vf, rxq);1931 cur_query_entry->funcID =1932 cpu_to_le16(FW_VF_HANDLE(vf->abs_vfid));1933 cur_query_entry->address.hi =1934 cpu_to_le32(U64_HI(q_stats_addr));1935 cur_query_entry->address.lo =1936 cpu_to_le32(U64_LO(q_stats_addr));1937 DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),1938 "added address %x %x for vf %d queue %d client %d\n",1939 cur_query_entry->address.hi,1940 cur_query_entry->address.lo,1941 cur_query_entry->funcID,1942 j, cur_query_entry->index);1943 cur_query_entry++;1944 stats_count++;1945 1946 /* all stats are coalesced to the leading queue */1947 if (vf->cfg_flags & VF_CFG_STATS_COALESCE)1948 break;1949 }1950 }1951 bp->fw_stats_req->hdr.cmd_num = bp->fw_stats_num + stats_count;1952}1953 1954/* VF API helpers */1955static void bnx2x_vf_qtbl_set_q(struct bnx2x *bp, u8 abs_vfid, u8 qid,1956 u8 enable)1957{1958 u32 reg = PXP_REG_HST_ZONE_PERMISSION_TABLE + qid * 4;1959 u32 val = enable ? (abs_vfid | (1 << 6)) : 0;1960 1961 REG_WR(bp, reg, val);1962}1963 1964static void bnx2x_vf_clr_qtbl(struct bnx2x *bp, struct bnx2x_virtf *vf)1965{1966 int i;1967 1968 for_each_vfq(vf, i)1969 bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,1970 vfq_qzone_id(vf, vfq_get(vf, i)), false);1971}1972 1973static void bnx2x_vf_igu_disable(struct bnx2x *bp, struct bnx2x_virtf *vf)1974{1975 u32 val;1976 1977 /* clear the VF configuration - pretend */1978 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));1979 val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);1980 val &= ~(IGU_VF_CONF_MSI_MSIX_EN | IGU_VF_CONF_SINGLE_ISR_EN |1981 IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_PARENT_MASK);1982 REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);1983 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));1984}1985 1986u8 bnx2x_vf_max_queue_cnt(struct bnx2x *bp, struct bnx2x_virtf *vf)1987{1988 return min_t(u8, min_t(u8, vf_sb_count(vf), BNX2X_CIDS_PER_VF),1989 BNX2X_VF_MAX_QUEUES);1990}1991 1992static1993int bnx2x_vf_chk_avail_resc(struct bnx2x *bp, struct bnx2x_virtf *vf,1994 struct vf_pf_resc_request *req_resc)1995{1996 u8 rxq_cnt = vf_rxq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);1997 u8 txq_cnt = vf_txq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);1998 1999 return ((req_resc->num_rxqs <= rxq_cnt) &&2000 (req_resc->num_txqs <= txq_cnt) &&2001 (req_resc->num_sbs <= vf_sb_count(vf)) &&2002 (req_resc->num_mac_filters <= vf_mac_rules_cnt(vf)) &&2003 (req_resc->num_vlan_filters <= vf_vlan_rules_cnt(vf)));2004}2005 2006/* CORE VF API */2007int bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf,2008 struct vf_pf_resc_request *resc)2009{2010 int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vf->index) *2011 BNX2X_CIDS_PER_VF;2012 2013 union cdu_context *base_cxt = (union cdu_context *)2014 BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +2015 (base_vf_cid & (ILT_PAGE_CIDS-1));2016 int i;2017 2018 /* if state is 'acquired' the VF was not released or FLR'd, in2019 * this case the returned resources match the acquired already2020 * acquired resources. Verify that the requested numbers do2021 * not exceed the already acquired numbers.2022 */2023 if (vf->state == VF_ACQUIRED) {2024 DP(BNX2X_MSG_IOV, "VF[%d] Trying to re-acquire resources (VF was not released or FLR'd)\n",2025 vf->abs_vfid);2026 2027 if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {2028 BNX2X_ERR("VF[%d] When re-acquiring resources, requested numbers must be <= then previously acquired numbers\n",2029 vf->abs_vfid);2030 return -EINVAL;2031 }2032 return 0;2033 }2034 2035 /* Otherwise vf state must be 'free' or 'reset' */2036 if (vf->state != VF_FREE && vf->state != VF_RESET) {2037 BNX2X_ERR("VF[%d] Can not acquire a VF with state %d\n",2038 vf->abs_vfid, vf->state);2039 return -EINVAL;2040 }2041 2042 /* static allocation:2043 * the global maximum number are fixed per VF. Fail the request if2044 * requested number exceed these globals2045 */2046 if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {2047 DP(BNX2X_MSG_IOV,2048 "cannot fulfill vf resource request. Placing maximal available values in response\n");2049 /* set the max resource in the vf */2050 return -ENOMEM;2051 }2052 2053 /* Set resources counters - 0 request means max available */2054 vf_sb_count(vf) = resc->num_sbs;2055 vf_rxq_count(vf) = resc->num_rxqs ? : bnx2x_vf_max_queue_cnt(bp, vf);2056 vf_txq_count(vf) = resc->num_txqs ? : bnx2x_vf_max_queue_cnt(bp, vf);2057 2058 DP(BNX2X_MSG_IOV,2059 "Fulfilling vf request: sb count %d, tx_count %d, rx_count %d, mac_rules_count %d, vlan_rules_count %d\n",2060 vf_sb_count(vf), vf_rxq_count(vf),2061 vf_txq_count(vf), vf_mac_rules_cnt(vf),2062 vf_vlan_rules_cnt(vf));2063 2064 /* Initialize the queues */2065 if (!vf->vfqs) {2066 DP(BNX2X_MSG_IOV, "vf->vfqs was not allocated\n");2067 return -EINVAL;2068 }2069 2070 for_each_vfq(vf, i) {2071 struct bnx2x_vf_queue *q = vfq_get(vf, i);2072 2073 if (!q) {2074 BNX2X_ERR("q number %d was not allocated\n", i);2075 return -EINVAL;2076 }2077 2078 q->index = i;2079 q->cxt = &((base_cxt + i)->eth);2080 q->cid = BNX2X_FIRST_VF_CID + base_vf_cid + i;2081 2082 DP(BNX2X_MSG_IOV, "VFQ[%d:%d]: index %d, cid 0x%x, cxt %p\n",2083 vf->abs_vfid, i, q->index, q->cid, q->cxt);2084 2085 /* init SP objects */2086 bnx2x_vfq_init(bp, vf, q);2087 }2088 vf->state = VF_ACQUIRED;2089 return 0;2090}2091 2092int bnx2x_vf_init(struct bnx2x *bp, struct bnx2x_virtf *vf, dma_addr_t *sb_map)2093{2094 struct bnx2x_func_init_params func_init = {0};2095 int i;2096 2097 /* the sb resources are initialized at this point, do the2098 * FW/HW initializations2099 */2100 for_each_vf_sb(vf, i)2101 bnx2x_init_sb(bp, (dma_addr_t)sb_map[i], vf->abs_vfid, true,2102 vf_igu_sb(vf, i), vf_igu_sb(vf, i));2103 2104 /* Sanity checks */2105 if (vf->state != VF_ACQUIRED) {2106 DP(BNX2X_MSG_IOV, "VF[%d] is not in VF_ACQUIRED, but %d\n",2107 vf->abs_vfid, vf->state);2108 return -EINVAL;2109 }2110 2111 /* let FLR complete ... */2112 msleep(100);2113 2114 /* FLR cleanup epilogue */2115 if (bnx2x_vf_flr_clnup_epilog(bp, vf->abs_vfid))2116 return -EBUSY;2117 2118 /* reset IGU VF statistics: MSIX */2119 REG_WR(bp, IGU_REG_STATISTIC_NUM_MESSAGE_SENT + vf->abs_vfid * 4 , 0);2120 2121 /* function setup */2122 func_init.pf_id = BP_FUNC(bp);2123 func_init.func_id = FW_VF_HANDLE(vf->abs_vfid);2124 bnx2x_func_init(bp, &func_init);2125 2126 /* Enable the vf */2127 bnx2x_vf_enable_access(bp, vf->abs_vfid);2128 bnx2x_vf_enable_traffic(bp, vf);2129 2130 /* queue protection table */2131 for_each_vfq(vf, i)2132 bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,2133 vfq_qzone_id(vf, vfq_get(vf, i)), true);2134 2135 vf->state = VF_ENABLED;2136 2137 /* update vf bulletin board */2138 bnx2x_post_vf_bulletin(bp, vf->index);2139 2140 return 0;2141}2142 2143struct set_vf_state_cookie {2144 struct bnx2x_virtf *vf;2145 u8 state;2146};2147 2148static void bnx2x_set_vf_state(void *cookie)2149{2150 struct set_vf_state_cookie *p = (struct set_vf_state_cookie *)cookie;2151 2152 p->vf->state = p->state;2153}2154 2155int bnx2x_vf_close(struct bnx2x *bp, struct bnx2x_virtf *vf)2156{2157 int rc = 0, i;2158 2159 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);2160 2161 /* Close all queues */2162 for (i = 0; i < vf_rxq_count(vf); i++) {2163 rc = bnx2x_vf_queue_teardown(bp, vf, i);2164 if (rc)2165 goto op_err;2166 }2167 2168 /* disable the interrupts */2169 DP(BNX2X_MSG_IOV, "disabling igu\n");2170 bnx2x_vf_igu_disable(bp, vf);2171 2172 /* disable the VF */2173 DP(BNX2X_MSG_IOV, "clearing qtbl\n");2174 bnx2x_vf_clr_qtbl(bp, vf);2175 2176 /* need to make sure there are no outstanding stats ramrods which may2177 * cause the device to access the VF's stats buffer which it will free2178 * as soon as we return from the close flow.2179 */2180 {2181 struct set_vf_state_cookie cookie;2182 2183 cookie.vf = vf;2184 cookie.state = VF_ACQUIRED;2185 rc = bnx2x_stats_safe_exec(bp, bnx2x_set_vf_state, &cookie);2186 if (rc)2187 goto op_err;2188 }2189 2190 DP(BNX2X_MSG_IOV, "set state to acquired\n");2191 2192 return 0;2193op_err:2194 BNX2X_ERR("vf[%d] CLOSE error: rc %d\n", vf->abs_vfid, rc);2195 return rc;2196}2197 2198/* VF release can be called either: 1. The VF was acquired but2199 * not enabled 2. the vf was enabled or in the process of being2200 * enabled2201 */2202int bnx2x_vf_free(struct bnx2x *bp, struct bnx2x_virtf *vf)2203{2204 int rc;2205 2206 DP(BNX2X_MSG_IOV, "VF[%d] STATE: %s\n", vf->abs_vfid,2207 vf->state == VF_FREE ? "Free" :2208 vf->state == VF_ACQUIRED ? "Acquired" :2209 vf->state == VF_ENABLED ? "Enabled" :2210 vf->state == VF_RESET ? "Reset" :2211 "Unknown");2212 2213 switch (vf->state) {2214 case VF_ENABLED:2215 rc = bnx2x_vf_close(bp, vf);2216 if (rc)2217 goto op_err;2218 fallthrough; /* to release resources */2219 case VF_ACQUIRED:2220 DP(BNX2X_MSG_IOV, "about to free resources\n");2221 bnx2x_vf_free_resc(bp, vf);2222 break;2223 2224 case VF_FREE:2225 case VF_RESET:2226 default:2227 break;2228 }2229 return 0;2230op_err:2231 BNX2X_ERR("VF[%d] RELEASE error: rc %d\n", vf->abs_vfid, rc);2232 return rc;2233}2234 2235int bnx2x_vf_rss_update(struct bnx2x *bp, struct bnx2x_virtf *vf,2236 struct bnx2x_config_rss_params *rss)2237{2238 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);2239 set_bit(RAMROD_COMP_WAIT, &rss->ramrod_flags);2240 return bnx2x_config_rss(bp, rss);2241}2242 2243int bnx2x_vf_tpa_update(struct bnx2x *bp, struct bnx2x_virtf *vf,2244 struct vfpf_tpa_tlv *tlv,2245 struct bnx2x_queue_update_tpa_params *params)2246{2247 aligned_u64 *sge_addr = tlv->tpa_client_info.sge_addr;2248 struct bnx2x_queue_state_params qstate;2249 int qid, rc = 0;2250 2251 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);2252 2253 /* Set ramrod params */2254 memset(&qstate, 0, sizeof(struct bnx2x_queue_state_params));2255 memcpy(&qstate.params.update_tpa, params,2256 sizeof(struct bnx2x_queue_update_tpa_params));2257 qstate.cmd = BNX2X_Q_CMD_UPDATE_TPA;2258 set_bit(RAMROD_COMP_WAIT, &qstate.ramrod_flags);2259 2260 for (qid = 0; qid < vf_rxq_count(vf); qid++) {2261 qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);2262 qstate.params.update_tpa.sge_map = sge_addr[qid];2263 DP(BNX2X_MSG_IOV, "sge_addr[%d:%d] %08x:%08x\n",2264 vf->abs_vfid, qid, U64_HI(sge_addr[qid]),2265 U64_LO(sge_addr[qid]));2266 rc = bnx2x_queue_state_change(bp, &qstate);2267 if (rc) {2268 BNX2X_ERR("Failed to configure sge_addr %08x:%08x for [%d:%d]\n",2269 U64_HI(sge_addr[qid]), U64_LO(sge_addr[qid]),2270 vf->abs_vfid, qid);2271 return rc;2272 }2273 }2274 2275 return rc;2276}2277 2278/* VF release ~ VF close + VF release-resources2279 * Release is the ultimate SW shutdown and is called whenever an2280 * irrecoverable error is encountered.2281 */2282int bnx2x_vf_release(struct bnx2x *bp, struct bnx2x_virtf *vf)2283{2284 int rc;2285 2286 DP(BNX2X_MSG_IOV, "PF releasing vf %d\n", vf->abs_vfid);2287 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);2288 2289 rc = bnx2x_vf_free(bp, vf);2290 if (rc)2291 WARN(rc,2292 "VF[%d] Failed to allocate resources for release op- rc=%d\n",2293 vf->abs_vfid, rc);2294 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);2295 return rc;2296}2297 2298void bnx2x_lock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,2299 enum channel_tlvs tlv)2300{2301 /* we don't lock the channel for unsupported tlvs */2302 if (!bnx2x_tlv_supported(tlv)) {2303 BNX2X_ERR("attempting to lock with unsupported tlv. Aborting\n");2304 return;2305 }2306 2307 /* lock the channel */2308 mutex_lock(&vf->op_mutex);2309 2310 /* record the locking op */2311 vf->op_current = tlv;2312 2313 /* log the lock */2314 DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel locked by %d\n",2315 vf->abs_vfid, tlv);2316}2317 2318void bnx2x_unlock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,2319 enum channel_tlvs expected_tlv)2320{2321 enum channel_tlvs current_tlv;2322 2323 if (!vf) {2324 BNX2X_ERR("VF was %p\n", vf);2325 return;2326 }2327 2328 current_tlv = vf->op_current;2329 2330 /* we don't unlock the channel for unsupported tlvs */2331 if (!bnx2x_tlv_supported(expected_tlv))2332 return;2333 2334 WARN(expected_tlv != vf->op_current,2335 "lock mismatch: expected %d found %d", expected_tlv,2336 vf->op_current);2337 2338 /* record the locking op */2339 vf->op_current = CHANNEL_TLV_NONE;2340 2341 /* lock the channel */2342 mutex_unlock(&vf->op_mutex);2343 2344 /* log the unlock */2345 DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel unlocked by %d\n",2346 vf->abs_vfid, current_tlv);2347}2348 2349static int bnx2x_set_pf_tx_switching(struct bnx2x *bp, bool enable)2350{2351 struct bnx2x_queue_state_params q_params;2352 u32 prev_flags;2353 int i, rc;2354 2355 /* Verify changes are needed and record current Tx switching state */2356 prev_flags = bp->flags;2357 if (enable)2358 bp->flags |= TX_SWITCHING;2359 else2360 bp->flags &= ~TX_SWITCHING;2361 if (prev_flags == bp->flags)2362 return 0;2363 2364 /* Verify state enables the sending of queue ramrods */2365 if ((bp->state != BNX2X_STATE_OPEN) ||2366 (bnx2x_get_q_logical_state(bp,2367 &bnx2x_sp_obj(bp, &bp->fp[0]).q_obj) !=2368 BNX2X_Q_LOGICAL_STATE_ACTIVE))2369 return 0;2370 2371 /* send q. update ramrod to configure Tx switching */2372 memset(&q_params, 0, sizeof(q_params));2373 __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);2374 q_params.cmd = BNX2X_Q_CMD_UPDATE;2375 __set_bit(BNX2X_Q_UPDATE_TX_SWITCHING_CHNG,2376 &q_params.params.update.update_flags);2377 if (enable)2378 __set_bit(BNX2X_Q_UPDATE_TX_SWITCHING,2379 &q_params.params.update.update_flags);2380 else2381 __clear_bit(BNX2X_Q_UPDATE_TX_SWITCHING,2382 &q_params.params.update.update_flags);2383 2384 /* send the ramrod on all the queues of the PF */2385 for_each_eth_queue(bp, i) {2386 struct bnx2x_fastpath *fp = &bp->fp[i];2387 int tx_idx;2388 2389 /* Set the appropriate Queue object */2390 q_params.q_obj = &bnx2x_sp_obj(bp, fp).q_obj;2391 2392 for (tx_idx = FIRST_TX_COS_INDEX;2393 tx_idx < fp->max_cos; tx_idx++) {2394 q_params.params.update.cid_index = tx_idx;2395 2396 /* Update the Queue state */2397 rc = bnx2x_queue_state_change(bp, &q_params);2398 if (rc) {2399 BNX2X_ERR("Failed to configure Tx switching\n");2400 return rc;2401 }2402 }2403 }2404 2405 DP(BNX2X_MSG_IOV, "%s Tx Switching\n", enable ? "Enabled" : "Disabled");2406 return 0;2407}2408 2409int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs_param)2410{2411 struct bnx2x *bp = netdev_priv(pci_get_drvdata(dev));2412 2413 if (!IS_SRIOV(bp)) {2414 BNX2X_ERR("failed to configure SR-IOV since vfdb was not allocated. Check dmesg for errors in probe stage\n");2415 return -EINVAL;2416 }2417 2418 DP(BNX2X_MSG_IOV, "bnx2x_sriov_configure called with %d, BNX2X_NR_VIRTFN(bp) was %d\n",2419 num_vfs_param, BNX2X_NR_VIRTFN(bp));2420 2421 /* HW channel is only operational when PF is up */2422 if (bp->state != BNX2X_STATE_OPEN) {2423 BNX2X_ERR("VF num configuration via sysfs not supported while PF is down\n");2424 return -EINVAL;2425 }2426 2427 /* we are always bound by the total_vfs in the configuration space */2428 if (num_vfs_param > BNX2X_NR_VIRTFN(bp)) {2429 BNX2X_ERR("truncating requested number of VFs (%d) down to maximum allowed (%d)\n",2430 num_vfs_param, BNX2X_NR_VIRTFN(bp));2431 num_vfs_param = BNX2X_NR_VIRTFN(bp);2432 }2433 2434 bp->requested_nr_virtfn = num_vfs_param;2435 if (num_vfs_param == 0) {2436 bnx2x_set_pf_tx_switching(bp, false);2437 bnx2x_disable_sriov(bp);2438 return 0;2439 } else {2440 return bnx2x_enable_sriov(bp);2441 }2442}2443 2444#define IGU_ENTRY_SIZE 42445 2446int bnx2x_enable_sriov(struct bnx2x *bp)2447{2448 int rc = 0, req_vfs = bp->requested_nr_virtfn;2449 int vf_idx, sb_idx, vfq_idx, qcount, first_vf;2450 u32 igu_entry, address;2451 u16 num_vf_queues;2452 2453 if (req_vfs == 0)2454 return 0;2455 2456 first_vf = bp->vfdb->sriov.first_vf_in_pf;2457 2458 /* statically distribute vf sb pool between VFs */2459 num_vf_queues = min_t(u16, BNX2X_VF_MAX_QUEUES,2460 BP_VFDB(bp)->vf_sbs_pool / req_vfs);2461 2462 /* zero previous values learned from igu cam */2463 for (vf_idx = 0; vf_idx < req_vfs; vf_idx++) {2464 struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);2465 2466 vf->sb_count = 0;2467 vf_sb_count(BP_VF(bp, vf_idx)) = 0;2468 }2469 bp->vfdb->vf_sbs_pool = 0;2470 2471 /* prepare IGU cam */2472 sb_idx = BP_VFDB(bp)->first_vf_igu_entry;2473 address = IGU_REG_MAPPING_MEMORY + sb_idx * IGU_ENTRY_SIZE;2474 for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {2475 for (vfq_idx = 0; vfq_idx < num_vf_queues; vfq_idx++) {2476 igu_entry = vf_idx << IGU_REG_MAPPING_MEMORY_FID_SHIFT |2477 vfq_idx << IGU_REG_MAPPING_MEMORY_VECTOR_SHIFT |2478 IGU_REG_MAPPING_MEMORY_VALID;2479 DP(BNX2X_MSG_IOV, "assigning sb %d to vf %d\n",2480 sb_idx, vf_idx);2481 REG_WR(bp, address, igu_entry);2482 sb_idx++;2483 address += IGU_ENTRY_SIZE;2484 }2485 }2486 2487 /* Reinitialize vf database according to igu cam */2488 bnx2x_get_vf_igu_cam_info(bp);2489 2490 DP(BNX2X_MSG_IOV, "vf_sbs_pool %d, num_vf_queues %d\n",2491 BP_VFDB(bp)->vf_sbs_pool, num_vf_queues);2492 2493 qcount = 0;2494 for_each_vf(bp, vf_idx) {2495 struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);2496 2497 /* set local queue arrays */2498 vf->vfqs = &bp->vfdb->vfqs[qcount];2499 qcount += vf_sb_count(vf);2500 bnx2x_iov_static_resc(bp, vf);2501 }2502 2503 /* prepare msix vectors in VF configuration space - the value in the2504 * PCI configuration space should be the index of the last entry,2505 * namely one less than the actual size of the table2506 */2507 for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {2508 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf_idx));2509 REG_WR(bp, PCICFG_OFFSET + GRC_CONFIG_REG_VF_MSIX_CONTROL,2510 num_vf_queues - 1);2511 DP(BNX2X_MSG_IOV, "set msix vec num in VF %d cfg space to %d\n",2512 vf_idx, num_vf_queues - 1);2513 }2514 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));2515 2516 /* enable sriov. This will probe all the VFs, and consequentially cause2517 * the "acquire" messages to appear on the VF PF channel.2518 */2519 DP(BNX2X_MSG_IOV, "about to call enable sriov\n");2520 bnx2x_disable_sriov(bp);2521 2522 rc = bnx2x_set_pf_tx_switching(bp, true);2523 if (rc)2524 return rc;2525 2526 rc = pci_enable_sriov(bp->pdev, req_vfs);2527 if (rc) {2528 BNX2X_ERR("pci_enable_sriov failed with %d\n", rc);2529 return rc;2530 }2531 DP(BNX2X_MSG_IOV, "sriov enabled (%d vfs)\n", req_vfs);2532 return req_vfs;2533}2534 2535void bnx2x_pf_set_vfs_vlan(struct bnx2x *bp)2536{2537 int vfidx;2538 struct pf_vf_bulletin_content *bulletin;2539 2540 DP(BNX2X_MSG_IOV, "configuring vlan for VFs from sp-task\n");2541 for_each_vf(bp, vfidx) {2542 bulletin = BP_VF_BULLETIN(bp, vfidx);2543 if (bulletin->valid_bitmap & (1 << VLAN_VALID))2544 bnx2x_set_vf_vlan(bp->dev, vfidx, bulletin->vlan, 0,2545 htons(ETH_P_8021Q));2546 }2547}2548 2549void bnx2x_disable_sriov(struct bnx2x *bp)2550{2551 if (pci_vfs_assigned(bp->pdev)) {2552 DP(BNX2X_MSG_IOV,2553 "Unloading driver while VFs are assigned - VFs will not be deallocated\n");2554 return;2555 }2556 2557 pci_disable_sriov(bp->pdev);2558}2559 2560static int bnx2x_vf_op_prep(struct bnx2x *bp, int vfidx,2561 struct bnx2x_virtf **vf,2562 struct pf_vf_bulletin_content **bulletin,2563 bool test_queue)2564{2565 if (bp->state != BNX2X_STATE_OPEN) {2566 BNX2X_ERR("PF is down - can't utilize iov-related functionality\n");2567 return -EINVAL;2568 }2569 2570 if (!IS_SRIOV(bp)) {2571 BNX2X_ERR("sriov is disabled - can't utilize iov-related functionality\n");2572 return -EINVAL;2573 }2574 2575 if (vfidx >= BNX2X_NR_VIRTFN(bp)) {2576 BNX2X_ERR("VF is uninitialized - can't utilize iov-related functionality. vfidx was %d BNX2X_NR_VIRTFN was %d\n",2577 vfidx, BNX2X_NR_VIRTFN(bp));2578 return -EINVAL;2579 }2580 2581 /* init members */2582 *vf = BP_VF(bp, vfidx);2583 *bulletin = BP_VF_BULLETIN(bp, vfidx);2584 2585 if (!*vf) {2586 BNX2X_ERR("Unable to get VF structure for vfidx %d\n", vfidx);2587 return -EINVAL;2588 }2589 2590 if (test_queue && !(*vf)->vfqs) {2591 BNX2X_ERR("vfqs struct is null. Was this invoked before dynamically enabling SR-IOV? vfidx was %d\n",2592 vfidx);2593 return -EINVAL;2594 }2595 2596 if (!*bulletin) {2597 BNX2X_ERR("Bulletin Board struct is null for vfidx %d\n",2598 vfidx);2599 return -EINVAL;2600 }2601 2602 return 0;2603}2604 2605int bnx2x_get_vf_config(struct net_device *dev, int vfidx,2606 struct ifla_vf_info *ivi)2607{2608 struct bnx2x *bp = netdev_priv(dev);2609 struct bnx2x_virtf *vf = NULL;2610 struct pf_vf_bulletin_content *bulletin = NULL;2611 struct bnx2x_vlan_mac_obj *mac_obj;2612 struct bnx2x_vlan_mac_obj *vlan_obj;2613 int rc;2614 2615 /* sanity and init */2616 rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);2617 if (rc)2618 return rc;2619 2620 mac_obj = &bnx2x_leading_vfq(vf, mac_obj);2621 vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);2622 if (!mac_obj || !vlan_obj) {2623 BNX2X_ERR("VF partially initialized\n");2624 return -EINVAL;2625 }2626 2627 ivi->vf = vfidx;2628 ivi->qos = 0;2629 ivi->max_tx_rate = 10000; /* always 10G. TBA take from link struct */2630 ivi->min_tx_rate = 0;2631 ivi->spoofchk = vf->spoofchk ? 1 : 0;2632 ivi->linkstate = vf->link_cfg;2633 if (vf->state == VF_ENABLED) {2634 /* mac and vlan are in vlan_mac objects */2635 if (bnx2x_validate_vf_sp_objs(bp, vf, false)) {2636 mac_obj->get_n_elements(bp, mac_obj, 1, (u8 *)&ivi->mac,2637 0, ETH_ALEN);2638 vlan_obj->get_n_elements(bp, vlan_obj, 1,2639 (u8 *)&ivi->vlan, 0,2640 VLAN_HLEN);2641 }2642 } else {2643 mutex_lock(&bp->vfdb->bulletin_mutex);2644 /* mac */2645 if (bulletin->valid_bitmap & (1 << MAC_ADDR_VALID))2646 /* mac configured by ndo so its in bulletin board */2647 memcpy(&ivi->mac, bulletin->mac, ETH_ALEN);2648 else2649 /* function has not been loaded yet. Show mac as 0s */2650 eth_zero_addr(ivi->mac);2651 2652 /* vlan */2653 if (bulletin->valid_bitmap & (1 << VLAN_VALID))2654 /* vlan configured by ndo so its in bulletin board */2655 ivi->vlan = bulletin->vlan;2656 else2657 /* function has not been loaded yet. Show vlans as 0s */2658 ivi->vlan = 0;2659 2660 mutex_unlock(&bp->vfdb->bulletin_mutex);2661 }2662 2663 return 0;2664}2665 2666/* New mac for VF. Consider these cases:2667 * 1. VF hasn't been acquired yet - save the mac in local bulletin board and2668 * supply at acquire.2669 * 2. VF has already been acquired but has not yet initialized - store in local2670 * bulletin board. mac will be posted on VF bulletin board after VF init. VF2671 * will configure this mac when it is ready.2672 * 3. VF has already initialized but has not yet setup a queue - post the new2673 * mac on VF's bulletin board right now. VF will configure this mac when it2674 * is ready.2675 * 4. VF has already set a queue - delete any macs already configured for this2676 * queue and manually config the new mac.2677 * In any event, once this function has been called refuse any attempts by the2678 * VF to configure any mac for itself except for this mac. In case of a race2679 * where the VF fails to see the new post on its bulletin board before sending a2680 * mac configuration request, the PF will simply fail the request and VF can try2681 * again after consulting its bulletin board.2682 */2683int bnx2x_set_vf_mac(struct net_device *dev, int vfidx, u8 *mac)2684{2685 struct bnx2x *bp = netdev_priv(dev);2686 int rc, q_logical_state;2687 struct bnx2x_virtf *vf = NULL;2688 struct pf_vf_bulletin_content *bulletin = NULL;2689 2690 if (!is_valid_ether_addr(mac)) {2691 BNX2X_ERR("mac address invalid\n");2692 return -EINVAL;2693 }2694 2695 /* sanity and init */2696 rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);2697 if (rc)2698 return rc;2699 2700 mutex_lock(&bp->vfdb->bulletin_mutex);2701 2702 /* update PF's copy of the VF's bulletin. Will no longer accept mac2703 * configuration requests from vf unless match this mac2704 */2705 bulletin->valid_bitmap |= 1 << MAC_ADDR_VALID;2706 memcpy(bulletin->mac, mac, ETH_ALEN);2707 2708 /* Post update on VF's bulletin board */2709 rc = bnx2x_post_vf_bulletin(bp, vfidx);2710 2711 /* release lock before checking return code */2712 mutex_unlock(&bp->vfdb->bulletin_mutex);2713 2714 if (rc) {2715 BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);2716 return rc;2717 }2718 2719 q_logical_state =2720 bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj));2721 if (vf->state == VF_ENABLED &&2722 q_logical_state == BNX2X_Q_LOGICAL_STATE_ACTIVE) {2723 /* configure the mac in device on this vf's queue */2724 unsigned long ramrod_flags = 0;2725 struct bnx2x_vlan_mac_obj *mac_obj;2726 2727 /* User should be able to see failure reason in system logs */2728 if (!bnx2x_validate_vf_sp_objs(bp, vf, true))2729 return -EINVAL;2730 2731 /* must lock vfpf channel to protect against vf flows */2732 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);2733 2734 /* remove existing eth macs */2735 mac_obj = &bnx2x_leading_vfq(vf, mac_obj);2736 rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_ETH_MAC, true);2737 if (rc) {2738 BNX2X_ERR("failed to delete eth macs\n");2739 rc = -EINVAL;2740 goto out;2741 }2742 2743 /* remove existing uc list macs */2744 rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_UC_LIST_MAC, true);2745 if (rc) {2746 BNX2X_ERR("failed to delete uc_list macs\n");2747 rc = -EINVAL;2748 goto out;2749 }2750 2751 /* configure the new mac to device */2752 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);2753 bnx2x_set_mac_one(bp, (u8 *)&bulletin->mac, mac_obj, true,2754 BNX2X_ETH_MAC, &ramrod_flags);2755 2756out:2757 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);2758 }2759 2760 return rc;2761}2762 2763static void bnx2x_set_vf_vlan_acceptance(struct bnx2x *bp,2764 struct bnx2x_virtf *vf, bool accept)2765{2766 struct bnx2x_rx_mode_ramrod_params rx_ramrod;2767 unsigned long accept_flags;2768 2769 /* need to remove/add the VF's accept_any_vlan bit */2770 accept_flags = bnx2x_leading_vfq(vf, accept_flags);2771 if (accept)2772 set_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);2773 else2774 clear_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);2775 2776 bnx2x_vf_prep_rx_mode(bp, LEADING_IDX, &rx_ramrod, vf,2777 accept_flags);2778 bnx2x_leading_vfq(vf, accept_flags) = accept_flags;2779 bnx2x_config_rx_mode(bp, &rx_ramrod);2780}2781 2782static int bnx2x_set_vf_vlan_filter(struct bnx2x *bp, struct bnx2x_virtf *vf,2783 u16 vlan, bool add)2784{2785 struct bnx2x_vlan_mac_ramrod_params ramrod_param;2786 unsigned long ramrod_flags = 0;2787 int rc = 0;2788 2789 /* configure the new vlan to device */2790 memset(&ramrod_param, 0, sizeof(ramrod_param));2791 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);2792 ramrod_param.vlan_mac_obj = &bnx2x_leading_vfq(vf, vlan_obj);2793 ramrod_param.ramrod_flags = ramrod_flags;2794 ramrod_param.user_req.u.vlan.vlan = vlan;2795 ramrod_param.user_req.cmd = add ? BNX2X_VLAN_MAC_ADD2796 : BNX2X_VLAN_MAC_DEL;2797 rc = bnx2x_config_vlan_mac(bp, &ramrod_param);2798 if (rc) {2799 BNX2X_ERR("failed to configure vlan\n");2800 return -EINVAL;2801 }2802 2803 return 0;2804}2805 2806int bnx2x_set_vf_vlan(struct net_device *dev, int vfidx, u16 vlan, u8 qos,2807 __be16 vlan_proto)2808{2809 struct pf_vf_bulletin_content *bulletin = NULL;2810 struct bnx2x *bp = netdev_priv(dev);2811 struct bnx2x_vlan_mac_obj *vlan_obj;2812 unsigned long vlan_mac_flags = 0;2813 unsigned long ramrod_flags = 0;2814 struct bnx2x_virtf *vf = NULL;2815 int i, rc;2816 2817 if (vlan > 4095) {2818 BNX2X_ERR("illegal vlan value %d\n", vlan);2819 return -EINVAL;2820 }2821 2822 if (vlan_proto != htons(ETH_P_8021Q))2823 return -EPROTONOSUPPORT;2824 2825 DP(BNX2X_MSG_IOV, "configuring VF %d with VLAN %d qos %d\n",2826 vfidx, vlan, 0);2827 2828 /* sanity and init */2829 rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);2830 if (rc)2831 return rc;2832 2833 /* update PF's copy of the VF's bulletin. No point in posting the vlan2834 * to the VF since it doesn't have anything to do with it. But it useful2835 * to store it here in case the VF is not up yet and we can only2836 * configure the vlan later when it does. Treat vlan id 0 as remove the2837 * Host tag.2838 */2839 mutex_lock(&bp->vfdb->bulletin_mutex);2840 2841 if (vlan > 0)2842 bulletin->valid_bitmap |= 1 << VLAN_VALID;2843 else2844 bulletin->valid_bitmap &= ~(1 << VLAN_VALID);2845 bulletin->vlan = vlan;2846 2847 /* Post update on VF's bulletin board */2848 rc = bnx2x_post_vf_bulletin(bp, vfidx);2849 if (rc)2850 BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);2851 mutex_unlock(&bp->vfdb->bulletin_mutex);2852 2853 /* is vf initialized and queue set up? */2854 if (vf->state != VF_ENABLED ||2855 bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj)) !=2856 BNX2X_Q_LOGICAL_STATE_ACTIVE)2857 return rc;2858 2859 /* User should be able to see error in system logs */2860 if (!bnx2x_validate_vf_sp_objs(bp, vf, true))2861 return -EINVAL;2862 2863 /* must lock vfpf channel to protect against vf flows */2864 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);2865 2866 /* remove existing vlans */2867 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);2868 vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);2869 rc = vlan_obj->delete_all(bp, vlan_obj, &vlan_mac_flags,2870 &ramrod_flags);2871 if (rc) {2872 BNX2X_ERR("failed to delete vlans\n");2873 rc = -EINVAL;2874 goto out;2875 }2876 2877 /* clear accept_any_vlan when HV forces vlan, otherwise2878 * according to VF capabilities2879 */2880 if (vlan || !(vf->cfg_flags & VF_CFG_VLAN_FILTER))2881 bnx2x_set_vf_vlan_acceptance(bp, vf, !vlan);2882 2883 rc = bnx2x_set_vf_vlan_filter(bp, vf, vlan, true);2884 if (rc)2885 goto out;2886 2887 /* send queue update ramrods to configure default vlan and2888 * silent vlan removal2889 */2890 for_each_vfq(vf, i) {2891 struct bnx2x_queue_state_params q_params = {NULL};2892 struct bnx2x_queue_update_params *update_params;2893 2894 q_params.q_obj = &bnx2x_vfq(vf, i, sp_obj);2895 2896 /* validate the Q is UP */2897 if (bnx2x_get_q_logical_state(bp, q_params.q_obj) !=2898 BNX2X_Q_LOGICAL_STATE_ACTIVE)2899 continue;2900 2901 __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);2902 q_params.cmd = BNX2X_Q_CMD_UPDATE;2903 update_params = &q_params.params.update;2904 __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,2905 &update_params->update_flags);2906 __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,2907 &update_params->update_flags);2908 if (vlan == 0) {2909 /* if vlan is 0 then we want to leave the VF traffic2910 * untagged, and leave the incoming traffic untouched2911 * (i.e. do not remove any vlan tags).2912 */2913 __clear_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,2914 &update_params->update_flags);2915 __clear_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,2916 &update_params->update_flags);2917 } else {2918 /* configure default vlan to vf queue and set silent2919 * vlan removal (the vf remains unaware of this vlan).2920 */2921 __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,2922 &update_params->update_flags);2923 __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,2924 &update_params->update_flags);2925 update_params->def_vlan = vlan;2926 update_params->silent_removal_value =2927 vlan & VLAN_VID_MASK;2928 update_params->silent_removal_mask = VLAN_VID_MASK;2929 }2930 2931 /* Update the Queue state */2932 rc = bnx2x_queue_state_change(bp, &q_params);2933 if (rc) {2934 BNX2X_ERR("Failed to configure default VLAN queue %d\n",2935 i);2936 goto out;2937 }2938 }2939out:2940 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);2941 2942 if (rc)2943 DP(BNX2X_MSG_IOV,2944 "updated VF[%d] vlan configuration (vlan = %d)\n",2945 vfidx, vlan);2946 2947 return rc;2948}2949 2950int bnx2x_set_vf_spoofchk(struct net_device *dev, int idx, bool val)2951{2952 struct bnx2x *bp = netdev_priv(dev);2953 struct bnx2x_virtf *vf;2954 int i, rc = 0;2955 2956 vf = BP_VF(bp, idx);2957 if (!vf)2958 return -EINVAL;2959 2960 /* nothing to do */2961 if (vf->spoofchk == val)2962 return 0;2963 2964 vf->spoofchk = val ? 1 : 0;2965 2966 DP(BNX2X_MSG_IOV, "%s spoofchk for VF %d\n",2967 val ? "enabling" : "disabling", idx);2968 2969 /* is vf initialized and queue set up? */2970 if (vf->state != VF_ENABLED ||2971 bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj)) !=2972 BNX2X_Q_LOGICAL_STATE_ACTIVE)2973 return rc;2974 2975 /* User should be able to see error in system logs */2976 if (!bnx2x_validate_vf_sp_objs(bp, vf, true))2977 return -EINVAL;2978 2979 /* send queue update ramrods to configure spoofchk */2980 for_each_vfq(vf, i) {2981 struct bnx2x_queue_state_params q_params = {NULL};2982 struct bnx2x_queue_update_params *update_params;2983 2984 q_params.q_obj = &bnx2x_vfq(vf, i, sp_obj);2985 2986 /* validate the Q is UP */2987 if (bnx2x_get_q_logical_state(bp, q_params.q_obj) !=2988 BNX2X_Q_LOGICAL_STATE_ACTIVE)2989 continue;2990 2991 __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);2992 q_params.cmd = BNX2X_Q_CMD_UPDATE;2993 update_params = &q_params.params.update;2994 __set_bit(BNX2X_Q_UPDATE_ANTI_SPOOF_CHNG,2995 &update_params->update_flags);2996 if (val) {2997 __set_bit(BNX2X_Q_UPDATE_ANTI_SPOOF,2998 &update_params->update_flags);2999 } else {3000 __clear_bit(BNX2X_Q_UPDATE_ANTI_SPOOF,3001 &update_params->update_flags);3002 }3003 3004 /* Update the Queue state */3005 rc = bnx2x_queue_state_change(bp, &q_params);3006 if (rc) {3007 BNX2X_ERR("Failed to %s spoofchk on VF %d - vfq %d\n",3008 val ? "enable" : "disable", idx, i);3009 goto out;3010 }3011 }3012out:3013 if (!rc)3014 DP(BNX2X_MSG_IOV,3015 "%s spoofchk for VF[%d]\n", val ? "Enabled" : "Disabled",3016 idx);3017 3018 return rc;3019}3020 3021/* crc is the first field in the bulletin board. Compute the crc over the3022 * entire bulletin board excluding the crc field itself. Use the length field3023 * as the Bulletin Board was posted by a PF with possibly a different version3024 * from the vf which will sample it. Therefore, the length is computed by the3025 * PF and then used blindly by the VF.3026 */3027u32 bnx2x_crc_vf_bulletin(struct pf_vf_bulletin_content *bulletin)3028{3029 return crc32(BULLETIN_CRC_SEED,3030 ((u8 *)bulletin) + sizeof(bulletin->crc),3031 bulletin->length - sizeof(bulletin->crc));3032}3033 3034/* Check for new posts on the bulletin board */3035enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp)3036{3037 struct pf_vf_bulletin_content *bulletin;3038 int attempts;3039 3040 /* sampling structure in mid post may result with corrupted data3041 * validate crc to ensure coherency.3042 */3043 for (attempts = 0; attempts < BULLETIN_ATTEMPTS; attempts++) {3044 u32 crc;3045 3046 /* sample the bulletin board */3047 memcpy(&bp->shadow_bulletin, bp->pf2vf_bulletin,3048 sizeof(union pf_vf_bulletin));3049 3050 crc = bnx2x_crc_vf_bulletin(&bp->shadow_bulletin.content);3051 3052 if (bp->shadow_bulletin.content.crc == crc)3053 break;3054 3055 BNX2X_ERR("bad crc on bulletin board. Contained %x computed %x\n",3056 bp->shadow_bulletin.content.crc, crc);3057 }3058 3059 if (attempts >= BULLETIN_ATTEMPTS) {3060 BNX2X_ERR("pf to vf bulletin board crc was wrong %d consecutive times. Aborting\n",3061 attempts);3062 return PFVF_BULLETIN_CRC_ERR;3063 }3064 bulletin = &bp->shadow_bulletin.content;3065 3066 /* bulletin board hasn't changed since last sample */3067 if (bp->old_bulletin.version == bulletin->version)3068 return PFVF_BULLETIN_UNCHANGED;3069 3070 /* the mac address in bulletin board is valid and is new */3071 if (bulletin->valid_bitmap & 1 << MAC_ADDR_VALID &&3072 !ether_addr_equal(bulletin->mac, bp->old_bulletin.mac)) {3073 /* update new mac to net device */3074 eth_hw_addr_set(bp->dev, bulletin->mac);3075 }3076 3077 if (bulletin->valid_bitmap & (1 << LINK_VALID)) {3078 DP(BNX2X_MSG_IOV, "link update speed %d flags %x\n",3079 bulletin->link_speed, bulletin->link_flags);3080 3081 bp->vf_link_vars.line_speed = bulletin->link_speed;3082 bp->vf_link_vars.link_report_flags = 0;3083 /* Link is down */3084 if (bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)3085 __set_bit(BNX2X_LINK_REPORT_LINK_DOWN,3086 &bp->vf_link_vars.link_report_flags);3087 /* Full DUPLEX */3088 if (bulletin->link_flags & VFPF_LINK_REPORT_FULL_DUPLEX)3089 __set_bit(BNX2X_LINK_REPORT_FD,3090 &bp->vf_link_vars.link_report_flags);3091 /* Rx Flow Control is ON */3092 if (bulletin->link_flags & VFPF_LINK_REPORT_RX_FC_ON)3093 __set_bit(BNX2X_LINK_REPORT_RX_FC_ON,3094 &bp->vf_link_vars.link_report_flags);3095 /* Tx Flow Control is ON */3096 if (bulletin->link_flags & VFPF_LINK_REPORT_TX_FC_ON)3097 __set_bit(BNX2X_LINK_REPORT_TX_FC_ON,3098 &bp->vf_link_vars.link_report_flags);3099 __bnx2x_link_report(bp);3100 }3101 3102 /* copy new bulletin board to bp */3103 memcpy(&bp->old_bulletin, bulletin,3104 sizeof(struct pf_vf_bulletin_content));3105 3106 return PFVF_BULLETIN_UPDATED;3107}3108 3109void bnx2x_timer_sriov(struct bnx2x *bp)3110{3111 bnx2x_sample_bulletin(bp);3112 3113 /* if channel is down we need to self destruct */3114 if (bp->old_bulletin.valid_bitmap & 1 << CHANNEL_DOWN)3115 bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_VFPF_CHANNEL_DOWN,3116 BNX2X_MSG_IOV);3117}3118 3119void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp)3120{3121 /* vf doorbells are embedded within the regview */3122 return bp->regview + PXP_VF_ADDR_DB_START;3123}3124 3125void bnx2x_vf_pci_dealloc(struct bnx2x *bp)3126{3127 BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->vf2pf_mbox_mapping,3128 sizeof(struct bnx2x_vf_mbx_msg));3129 BNX2X_PCI_FREE(bp->pf2vf_bulletin, bp->pf2vf_bulletin_mapping,3130 sizeof(union pf_vf_bulletin));3131}3132 3133int bnx2x_vf_pci_alloc(struct bnx2x *bp)3134{3135 mutex_init(&bp->vf2pf_mutex);3136 3137 /* allocate vf2pf mailbox for vf to pf channel */3138 bp->vf2pf_mbox = BNX2X_PCI_ALLOC(&bp->vf2pf_mbox_mapping,3139 sizeof(struct bnx2x_vf_mbx_msg));3140 if (!bp->vf2pf_mbox)3141 goto alloc_mem_err;3142 3143 /* allocate pf 2 vf bulletin board */3144 bp->pf2vf_bulletin = BNX2X_PCI_ALLOC(&bp->pf2vf_bulletin_mapping,3145 sizeof(union pf_vf_bulletin));3146 if (!bp->pf2vf_bulletin)3147 goto alloc_mem_err;3148 3149 bnx2x_vf_bulletin_finalize(&bp->pf2vf_bulletin->content, true);3150 3151 return 0;3152 3153alloc_mem_err:3154 bnx2x_vf_pci_dealloc(bp);3155 return -ENOMEM;3156}3157 3158void bnx2x_iov_channel_down(struct bnx2x *bp)3159{3160 int vf_idx;3161 struct pf_vf_bulletin_content *bulletin;3162 3163 if (!IS_SRIOV(bp))3164 return;3165 3166 for_each_vf(bp, vf_idx) {3167 /* locate this VFs bulletin board and update the channel down3168 * bit3169 */3170 bulletin = BP_VF_BULLETIN(bp, vf_idx);3171 bulletin->valid_bitmap |= 1 << CHANNEL_DOWN;3172 3173 /* update vf bulletin board */3174 bnx2x_post_vf_bulletin(bp, vf_idx);3175 }3176}3177 3178void bnx2x_iov_task(struct work_struct *work)3179{3180 struct bnx2x *bp = container_of(work, struct bnx2x, iov_task.work);3181 3182 if (!netif_running(bp->dev))3183 return;3184 3185 if (test_and_clear_bit(BNX2X_IOV_HANDLE_FLR,3186 &bp->iov_task_state))3187 bnx2x_vf_handle_flr_event(bp);3188 3189 if (test_and_clear_bit(BNX2X_IOV_HANDLE_VF_MSG,3190 &bp->iov_task_state))3191 bnx2x_vf_mbx(bp);3192}3193 3194void bnx2x_schedule_iov_task(struct bnx2x *bp, enum bnx2x_iov_flag flag)3195{3196 smp_mb__before_atomic();3197 set_bit(flag, &bp->iov_task_state);3198 smp_mb__after_atomic();3199 DP(BNX2X_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);3200 queue_delayed_work(bnx2x_iov_wq, &bp->iov_task, 0);3201}3202