5463 lines · c
1 2/* cnic.c: QLogic CNIC core network driver.3 *4 * Copyright (c) 2006-2014 Broadcom Corporation5 * Copyright (c) 2014 QLogic Corporation6 *7 * This program is free software; you can redistribute it and/or modify8 * it under the terms of the GNU General Public License as published by9 * the Free Software Foundation.10 *11 */12 13#ifndef CNIC_DEFS_H14#define CNIC_DEFS_H15 16/* KWQ (kernel work queue) request op codes */17#define L2_KWQE_OPCODE_VALUE_FLUSH (4)18#define L2_KWQE_OPCODE_VALUE_VM_FREE_RX_QUEUE (8)19 20#define L4_KWQE_OPCODE_VALUE_CONNECT1 (50)21#define L4_KWQE_OPCODE_VALUE_CONNECT2 (51)22#define L4_KWQE_OPCODE_VALUE_CONNECT3 (52)23#define L4_KWQE_OPCODE_VALUE_RESET (53)24#define L4_KWQE_OPCODE_VALUE_CLOSE (54)25#define L4_KWQE_OPCODE_VALUE_UPDATE_SECRET (60)26#define L4_KWQE_OPCODE_VALUE_INIT_ULP (61)27 28#define L4_KWQE_OPCODE_VALUE_OFFLOAD_PG (1)29#define L4_KWQE_OPCODE_VALUE_UPDATE_PG (9)30#define L4_KWQE_OPCODE_VALUE_UPLOAD_PG (14)31 32#define L5CM_RAMROD_CMD_ID_BASE (0x80)33#define L5CM_RAMROD_CMD_ID_TCP_CONNECT (L5CM_RAMROD_CMD_ID_BASE + 3)34#define L5CM_RAMROD_CMD_ID_CLOSE (L5CM_RAMROD_CMD_ID_BASE + 12)35#define L5CM_RAMROD_CMD_ID_ABORT (L5CM_RAMROD_CMD_ID_BASE + 13)36#define L5CM_RAMROD_CMD_ID_SEARCHER_DELETE (L5CM_RAMROD_CMD_ID_BASE + 14)37#define L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD (L5CM_RAMROD_CMD_ID_BASE + 15)38 39#define FCOE_RAMROD_CMD_ID_INIT_FUNC (FCOE_KCQE_OPCODE_INIT_FUNC)40#define FCOE_RAMROD_CMD_ID_DESTROY_FUNC (FCOE_KCQE_OPCODE_DESTROY_FUNC)41#define FCOE_RAMROD_CMD_ID_STAT_FUNC (FCOE_KCQE_OPCODE_STAT_FUNC)42#define FCOE_RAMROD_CMD_ID_OFFLOAD_CONN (FCOE_KCQE_OPCODE_OFFLOAD_CONN)43#define FCOE_RAMROD_CMD_ID_ENABLE_CONN (FCOE_KCQE_OPCODE_ENABLE_CONN)44#define FCOE_RAMROD_CMD_ID_DISABLE_CONN (FCOE_KCQE_OPCODE_DISABLE_CONN)45#define FCOE_RAMROD_CMD_ID_DESTROY_CONN (FCOE_KCQE_OPCODE_DESTROY_CONN)46#define FCOE_RAMROD_CMD_ID_TERMINATE_CONN (0x81)47 48/* KCQ (kernel completion queue) response op codes */49#define L4_KCQE_OPCODE_VALUE_CLOSE_COMP (53)50#define L4_KCQE_OPCODE_VALUE_RESET_COMP (54)51#define L4_KCQE_OPCODE_VALUE_FW_TCP_UPDATE (55)52#define L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE (56)53#define L4_KCQE_OPCODE_VALUE_RESET_RECEIVED (57)54#define L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED (58)55#define L4_KCQE_OPCODE_VALUE_INIT_ULP (61)56 57#define L4_KCQE_OPCODE_VALUE_OFFLOAD_PG (1)58#define L4_KCQE_OPCODE_VALUE_UPDATE_PG (9)59#define L4_KCQE_OPCODE_VALUE_UPLOAD_PG (14)60 61/* KCQ (kernel completion queue) completion status */62#define L4_KCQE_COMPLETION_STATUS_SUCCESS (0)63#define L4_KCQE_COMPLETION_STATUS_NIC_ERROR (4)64#define L4_KCQE_COMPLETION_STATUS_PARITY_ERROR (0x81)65#define L4_KCQE_COMPLETION_STATUS_TIMEOUT (0x93)66 67#define L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL (0x83)68#define L4_KCQE_COMPLETION_STATUS_OFFLOADED_PG (0x89)69 70#define L4_KCQE_OPCODE_VALUE_OOO_EVENT_NOTIFICATION (0xa0)71#define L4_KCQE_OPCODE_VALUE_OOO_FLUSH (0xa1)72 73#define L4_LAYER_CODE (4)74#define L2_LAYER_CODE (2)75 76/*77 * L4 KCQ CQE78 */79struct l4_kcq {80 u32 cid;81 u32 pg_cid;82 u32 conn_id;83 u32 pg_host_opaque;84#if defined(__BIG_ENDIAN)85 u16 status;86 u16 reserved1;87#elif defined(__LITTLE_ENDIAN)88 u16 reserved1;89 u16 status;90#endif91 u32 reserved2[2];92#if defined(__BIG_ENDIAN)93 u8 flags;94#define L4_KCQ_RESERVED3 (0x7<<0)95#define L4_KCQ_RESERVED3_SHIFT 096#define L4_KCQ_RAMROD_COMPLETION (0x1<<3) /* Everest only */97#define L4_KCQ_RAMROD_COMPLETION_SHIFT 398#define L4_KCQ_LAYER_CODE (0x7<<4)99#define L4_KCQ_LAYER_CODE_SHIFT 4100#define L4_KCQ_RESERVED4 (0x1<<7)101#define L4_KCQ_RESERVED4_SHIFT 7102 u8 op_code;103 u16 qe_self_seq;104#elif defined(__LITTLE_ENDIAN)105 u16 qe_self_seq;106 u8 op_code;107 u8 flags;108#define L4_KCQ_RESERVED3 (0xF<<0)109#define L4_KCQ_RESERVED3_SHIFT 0110#define L4_KCQ_RAMROD_COMPLETION (0x1<<3) /* Everest only */111#define L4_KCQ_RAMROD_COMPLETION_SHIFT 3112#define L4_KCQ_LAYER_CODE (0x7<<4)113#define L4_KCQ_LAYER_CODE_SHIFT 4114#define L4_KCQ_RESERVED4 (0x1<<7)115#define L4_KCQ_RESERVED4_SHIFT 7116#endif117};118 119 120/*121 * L4 KCQ CQE PG upload122 */123struct l4_kcq_upload_pg {124 u32 pg_cid;125#if defined(__BIG_ENDIAN)126 u16 pg_status;127 u16 pg_ipid_count;128#elif defined(__LITTLE_ENDIAN)129 u16 pg_ipid_count;130 u16 pg_status;131#endif132 u32 reserved1[5];133#if defined(__BIG_ENDIAN)134 u8 flags;135#define L4_KCQ_UPLOAD_PG_RESERVED3 (0xF<<0)136#define L4_KCQ_UPLOAD_PG_RESERVED3_SHIFT 0137#define L4_KCQ_UPLOAD_PG_LAYER_CODE (0x7<<4)138#define L4_KCQ_UPLOAD_PG_LAYER_CODE_SHIFT 4139#define L4_KCQ_UPLOAD_PG_RESERVED4 (0x1<<7)140#define L4_KCQ_UPLOAD_PG_RESERVED4_SHIFT 7141 u8 op_code;142 u16 qe_self_seq;143#elif defined(__LITTLE_ENDIAN)144 u16 qe_self_seq;145 u8 op_code;146 u8 flags;147#define L4_KCQ_UPLOAD_PG_RESERVED3 (0xF<<0)148#define L4_KCQ_UPLOAD_PG_RESERVED3_SHIFT 0149#define L4_KCQ_UPLOAD_PG_LAYER_CODE (0x7<<4)150#define L4_KCQ_UPLOAD_PG_LAYER_CODE_SHIFT 4151#define L4_KCQ_UPLOAD_PG_RESERVED4 (0x1<<7)152#define L4_KCQ_UPLOAD_PG_RESERVED4_SHIFT 7153#endif154};155 156 157/*158 * Gracefully close the connection request159 */160struct l4_kwq_close_req {161#if defined(__BIG_ENDIAN)162 u8 flags;163#define L4_KWQ_CLOSE_REQ_RESERVED1 (0xF<<0)164#define L4_KWQ_CLOSE_REQ_RESERVED1_SHIFT 0165#define L4_KWQ_CLOSE_REQ_LAYER_CODE (0x7<<4)166#define L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT 4167#define L4_KWQ_CLOSE_REQ_LINKED_WITH_NEXT (0x1<<7)168#define L4_KWQ_CLOSE_REQ_LINKED_WITH_NEXT_SHIFT 7169 u8 op_code;170 u16 reserved0;171#elif defined(__LITTLE_ENDIAN)172 u16 reserved0;173 u8 op_code;174 u8 flags;175#define L4_KWQ_CLOSE_REQ_RESERVED1 (0xF<<0)176#define L4_KWQ_CLOSE_REQ_RESERVED1_SHIFT 0177#define L4_KWQ_CLOSE_REQ_LAYER_CODE (0x7<<4)178#define L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT 4179#define L4_KWQ_CLOSE_REQ_LINKED_WITH_NEXT (0x1<<7)180#define L4_KWQ_CLOSE_REQ_LINKED_WITH_NEXT_SHIFT 7181#endif182 u32 cid;183 u32 reserved2[6];184};185 186 187/*188 * The first request to be passed in order to establish connection in option2189 */190struct l4_kwq_connect_req1 {191#if defined(__BIG_ENDIAN)192 u8 flags;193#define L4_KWQ_CONNECT_REQ1_RESERVED1 (0xF<<0)194#define L4_KWQ_CONNECT_REQ1_RESERVED1_SHIFT 0195#define L4_KWQ_CONNECT_REQ1_LAYER_CODE (0x7<<4)196#define L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT 4197#define L4_KWQ_CONNECT_REQ1_LINKED_WITH_NEXT (0x1<<7)198#define L4_KWQ_CONNECT_REQ1_LINKED_WITH_NEXT_SHIFT 7199 u8 op_code;200 u8 reserved0;201 u8 conn_flags;202#define L4_KWQ_CONNECT_REQ1_IS_PG_HOST_OPAQUE (0x1<<0)203#define L4_KWQ_CONNECT_REQ1_IS_PG_HOST_OPAQUE_SHIFT 0204#define L4_KWQ_CONNECT_REQ1_IP_V6 (0x1<<1)205#define L4_KWQ_CONNECT_REQ1_IP_V6_SHIFT 1206#define L4_KWQ_CONNECT_REQ1_PASSIVE_FLAG (0x1<<2)207#define L4_KWQ_CONNECT_REQ1_PASSIVE_FLAG_SHIFT 2208#define L4_KWQ_CONNECT_REQ1_RSRV (0x1F<<3)209#define L4_KWQ_CONNECT_REQ1_RSRV_SHIFT 3210#elif defined(__LITTLE_ENDIAN)211 u8 conn_flags;212#define L4_KWQ_CONNECT_REQ1_IS_PG_HOST_OPAQUE (0x1<<0)213#define L4_KWQ_CONNECT_REQ1_IS_PG_HOST_OPAQUE_SHIFT 0214#define L4_KWQ_CONNECT_REQ1_IP_V6 (0x1<<1)215#define L4_KWQ_CONNECT_REQ1_IP_V6_SHIFT 1216#define L4_KWQ_CONNECT_REQ1_PASSIVE_FLAG (0x1<<2)217#define L4_KWQ_CONNECT_REQ1_PASSIVE_FLAG_SHIFT 2218#define L4_KWQ_CONNECT_REQ1_RSRV (0x1F<<3)219#define L4_KWQ_CONNECT_REQ1_RSRV_SHIFT 3220 u8 reserved0;221 u8 op_code;222 u8 flags;223#define L4_KWQ_CONNECT_REQ1_RESERVED1 (0xF<<0)224#define L4_KWQ_CONNECT_REQ1_RESERVED1_SHIFT 0225#define L4_KWQ_CONNECT_REQ1_LAYER_CODE (0x7<<4)226#define L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT 4227#define L4_KWQ_CONNECT_REQ1_LINKED_WITH_NEXT (0x1<<7)228#define L4_KWQ_CONNECT_REQ1_LINKED_WITH_NEXT_SHIFT 7229#endif230 u32 cid;231 u32 pg_cid;232 u32 src_ip;233 u32 dst_ip;234#if defined(__BIG_ENDIAN)235 u16 dst_port;236 u16 src_port;237#elif defined(__LITTLE_ENDIAN)238 u16 src_port;239 u16 dst_port;240#endif241#if defined(__BIG_ENDIAN)242 u8 rsrv1[3];243 u8 tcp_flags;244#define L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK (0x1<<0)245#define L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK_SHIFT 0246#define L4_KWQ_CONNECT_REQ1_KEEP_ALIVE (0x1<<1)247#define L4_KWQ_CONNECT_REQ1_KEEP_ALIVE_SHIFT 1248#define L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE (0x1<<2)249#define L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE_SHIFT 2250#define L4_KWQ_CONNECT_REQ1_TIME_STAMP (0x1<<3)251#define L4_KWQ_CONNECT_REQ1_TIME_STAMP_SHIFT 3252#define L4_KWQ_CONNECT_REQ1_SACK (0x1<<4)253#define L4_KWQ_CONNECT_REQ1_SACK_SHIFT 4254#define L4_KWQ_CONNECT_REQ1_SEG_SCALING (0x1<<5)255#define L4_KWQ_CONNECT_REQ1_SEG_SCALING_SHIFT 5256#define L4_KWQ_CONNECT_REQ1_RESERVED2 (0x3<<6)257#define L4_KWQ_CONNECT_REQ1_RESERVED2_SHIFT 6258#elif defined(__LITTLE_ENDIAN)259 u8 tcp_flags;260#define L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK (0x1<<0)261#define L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK_SHIFT 0262#define L4_KWQ_CONNECT_REQ1_KEEP_ALIVE (0x1<<1)263#define L4_KWQ_CONNECT_REQ1_KEEP_ALIVE_SHIFT 1264#define L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE (0x1<<2)265#define L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE_SHIFT 2266#define L4_KWQ_CONNECT_REQ1_TIME_STAMP (0x1<<3)267#define L4_KWQ_CONNECT_REQ1_TIME_STAMP_SHIFT 3268#define L4_KWQ_CONNECT_REQ1_SACK (0x1<<4)269#define L4_KWQ_CONNECT_REQ1_SACK_SHIFT 4270#define L4_KWQ_CONNECT_REQ1_SEG_SCALING (0x1<<5)271#define L4_KWQ_CONNECT_REQ1_SEG_SCALING_SHIFT 5272#define L4_KWQ_CONNECT_REQ1_RESERVED2 (0x3<<6)273#define L4_KWQ_CONNECT_REQ1_RESERVED2_SHIFT 6274 u8 rsrv1[3];275#endif276 u32 rsrv2;277};278 279 280/*281 * The second ( optional )request to be passed in order to establish282 * connection in option2 - for IPv6 only283 */284struct l4_kwq_connect_req2 {285#if defined(__BIG_ENDIAN)286 u8 flags;287#define L4_KWQ_CONNECT_REQ2_RESERVED1 (0xF<<0)288#define L4_KWQ_CONNECT_REQ2_RESERVED1_SHIFT 0289#define L4_KWQ_CONNECT_REQ2_LAYER_CODE (0x7<<4)290#define L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT 4291#define L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT (0x1<<7)292#define L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT_SHIFT 7293 u8 op_code;294 u8 reserved0;295 u8 rsrv;296#elif defined(__LITTLE_ENDIAN)297 u8 rsrv;298 u8 reserved0;299 u8 op_code;300 u8 flags;301#define L4_KWQ_CONNECT_REQ2_RESERVED1 (0xF<<0)302#define L4_KWQ_CONNECT_REQ2_RESERVED1_SHIFT 0303#define L4_KWQ_CONNECT_REQ2_LAYER_CODE (0x7<<4)304#define L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT 4305#define L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT (0x1<<7)306#define L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT_SHIFT 7307#endif308 u32 reserved2;309 u32 src_ip_v6_2;310 u32 src_ip_v6_3;311 u32 src_ip_v6_4;312 u32 dst_ip_v6_2;313 u32 dst_ip_v6_3;314 u32 dst_ip_v6_4;315};316 317 318/*319 * The third ( and last )request to be passed in order to establish320 * connection in option2321 */322struct l4_kwq_connect_req3 {323#if defined(__BIG_ENDIAN)324 u8 flags;325#define L4_KWQ_CONNECT_REQ3_RESERVED1 (0xF<<0)326#define L4_KWQ_CONNECT_REQ3_RESERVED1_SHIFT 0327#define L4_KWQ_CONNECT_REQ3_LAYER_CODE (0x7<<4)328#define L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT 4329#define L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT (0x1<<7)330#define L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT_SHIFT 7331 u8 op_code;332 u16 reserved0;333#elif defined(__LITTLE_ENDIAN)334 u16 reserved0;335 u8 op_code;336 u8 flags;337#define L4_KWQ_CONNECT_REQ3_RESERVED1 (0xF<<0)338#define L4_KWQ_CONNECT_REQ3_RESERVED1_SHIFT 0339#define L4_KWQ_CONNECT_REQ3_LAYER_CODE (0x7<<4)340#define L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT 4341#define L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT (0x1<<7)342#define L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT_SHIFT 7343#endif344 u32 ka_timeout;345 u32 ka_interval ;346#if defined(__BIG_ENDIAN)347 u8 snd_seq_scale;348 u8 ttl;349 u8 tos;350 u8 ka_max_probe_count;351#elif defined(__LITTLE_ENDIAN)352 u8 ka_max_probe_count;353 u8 tos;354 u8 ttl;355 u8 snd_seq_scale;356#endif357#if defined(__BIG_ENDIAN)358 u16 pmtu;359 u16 mss;360#elif defined(__LITTLE_ENDIAN)361 u16 mss;362 u16 pmtu;363#endif364 u32 rcv_buf;365 u32 snd_buf;366 u32 seed;367};368 369 370/*371 * a KWQE request to offload a PG connection372 */373struct l4_kwq_offload_pg {374#if defined(__BIG_ENDIAN)375 u8 flags;376#define L4_KWQ_OFFLOAD_PG_RESERVED1 (0xF<<0)377#define L4_KWQ_OFFLOAD_PG_RESERVED1_SHIFT 0378#define L4_KWQ_OFFLOAD_PG_LAYER_CODE (0x7<<4)379#define L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT 4380#define L4_KWQ_OFFLOAD_PG_LINKED_WITH_NEXT (0x1<<7)381#define L4_KWQ_OFFLOAD_PG_LINKED_WITH_NEXT_SHIFT 7382 u8 op_code;383 u16 reserved0;384#elif defined(__LITTLE_ENDIAN)385 u16 reserved0;386 u8 op_code;387 u8 flags;388#define L4_KWQ_OFFLOAD_PG_RESERVED1 (0xF<<0)389#define L4_KWQ_OFFLOAD_PG_RESERVED1_SHIFT 0390#define L4_KWQ_OFFLOAD_PG_LAYER_CODE (0x7<<4)391#define L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT 4392#define L4_KWQ_OFFLOAD_PG_LINKED_WITH_NEXT (0x1<<7)393#define L4_KWQ_OFFLOAD_PG_LINKED_WITH_NEXT_SHIFT 7394#endif395#if defined(__BIG_ENDIAN)396 u8 l2hdr_nbytes;397 u8 pg_flags;398#define L4_KWQ_OFFLOAD_PG_SNAP_ENCAP (0x1<<0)399#define L4_KWQ_OFFLOAD_PG_SNAP_ENCAP_SHIFT 0400#define L4_KWQ_OFFLOAD_PG_VLAN_TAGGING (0x1<<1)401#define L4_KWQ_OFFLOAD_PG_VLAN_TAGGING_SHIFT 1402#define L4_KWQ_OFFLOAD_PG_RESERVED2 (0x3F<<2)403#define L4_KWQ_OFFLOAD_PG_RESERVED2_SHIFT 2404 u8 da0;405 u8 da1;406#elif defined(__LITTLE_ENDIAN)407 u8 da1;408 u8 da0;409 u8 pg_flags;410#define L4_KWQ_OFFLOAD_PG_SNAP_ENCAP (0x1<<0)411#define L4_KWQ_OFFLOAD_PG_SNAP_ENCAP_SHIFT 0412#define L4_KWQ_OFFLOAD_PG_VLAN_TAGGING (0x1<<1)413#define L4_KWQ_OFFLOAD_PG_VLAN_TAGGING_SHIFT 1414#define L4_KWQ_OFFLOAD_PG_RESERVED2 (0x3F<<2)415#define L4_KWQ_OFFLOAD_PG_RESERVED2_SHIFT 2416 u8 l2hdr_nbytes;417#endif418#if defined(__BIG_ENDIAN)419 u8 da2;420 u8 da3;421 u8 da4;422 u8 da5;423#elif defined(__LITTLE_ENDIAN)424 u8 da5;425 u8 da4;426 u8 da3;427 u8 da2;428#endif429#if defined(__BIG_ENDIAN)430 u8 sa0;431 u8 sa1;432 u8 sa2;433 u8 sa3;434#elif defined(__LITTLE_ENDIAN)435 u8 sa3;436 u8 sa2;437 u8 sa1;438 u8 sa0;439#endif440#if defined(__BIG_ENDIAN)441 u8 sa4;442 u8 sa5;443 u16 etype;444#elif defined(__LITTLE_ENDIAN)445 u16 etype;446 u8 sa5;447 u8 sa4;448#endif449#if defined(__BIG_ENDIAN)450 u16 vlan_tag;451 u16 ipid_start;452#elif defined(__LITTLE_ENDIAN)453 u16 ipid_start;454 u16 vlan_tag;455#endif456#if defined(__BIG_ENDIAN)457 u16 ipid_count;458 u16 reserved3;459#elif defined(__LITTLE_ENDIAN)460 u16 reserved3;461 u16 ipid_count;462#endif463 u32 host_opaque;464};465 466 467/*468 * Abortively close the connection request469 */470struct l4_kwq_reset_req {471#if defined(__BIG_ENDIAN)472 u8 flags;473#define L4_KWQ_RESET_REQ_RESERVED1 (0xF<<0)474#define L4_KWQ_RESET_REQ_RESERVED1_SHIFT 0475#define L4_KWQ_RESET_REQ_LAYER_CODE (0x7<<4)476#define L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT 4477#define L4_KWQ_RESET_REQ_LINKED_WITH_NEXT (0x1<<7)478#define L4_KWQ_RESET_REQ_LINKED_WITH_NEXT_SHIFT 7479 u8 op_code;480 u16 reserved0;481#elif defined(__LITTLE_ENDIAN)482 u16 reserved0;483 u8 op_code;484 u8 flags;485#define L4_KWQ_RESET_REQ_RESERVED1 (0xF<<0)486#define L4_KWQ_RESET_REQ_RESERVED1_SHIFT 0487#define L4_KWQ_RESET_REQ_LAYER_CODE (0x7<<4)488#define L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT 4489#define L4_KWQ_RESET_REQ_LINKED_WITH_NEXT (0x1<<7)490#define L4_KWQ_RESET_REQ_LINKED_WITH_NEXT_SHIFT 7491#endif492 u32 cid;493 u32 reserved2[6];494};495 496 497/*498 * a KWQE request to update a PG connection499 */500struct l4_kwq_update_pg {501#if defined(__BIG_ENDIAN)502 u8 flags;503#define L4_KWQ_UPDATE_PG_RESERVED1 (0xF<<0)504#define L4_KWQ_UPDATE_PG_RESERVED1_SHIFT 0505#define L4_KWQ_UPDATE_PG_LAYER_CODE (0x7<<4)506#define L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT 4507#define L4_KWQ_UPDATE_PG_LINKED_WITH_NEXT (0x1<<7)508#define L4_KWQ_UPDATE_PG_LINKED_WITH_NEXT_SHIFT 7509 u8 opcode;510 u16 oper16;511#elif defined(__LITTLE_ENDIAN)512 u16 oper16;513 u8 opcode;514 u8 flags;515#define L4_KWQ_UPDATE_PG_RESERVED1 (0xF<<0)516#define L4_KWQ_UPDATE_PG_RESERVED1_SHIFT 0517#define L4_KWQ_UPDATE_PG_LAYER_CODE (0x7<<4)518#define L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT 4519#define L4_KWQ_UPDATE_PG_LINKED_WITH_NEXT (0x1<<7)520#define L4_KWQ_UPDATE_PG_LINKED_WITH_NEXT_SHIFT 7521#endif522 u32 pg_cid;523 u32 pg_host_opaque;524#if defined(__BIG_ENDIAN)525 u8 pg_valids;526#define L4_KWQ_UPDATE_PG_VALIDS_IPID_COUNT (0x1<<0)527#define L4_KWQ_UPDATE_PG_VALIDS_IPID_COUNT_SHIFT 0528#define L4_KWQ_UPDATE_PG_VALIDS_DA (0x1<<1)529#define L4_KWQ_UPDATE_PG_VALIDS_DA_SHIFT 1530#define L4_KWQ_UPDATE_PG_RESERVERD2 (0x3F<<2)531#define L4_KWQ_UPDATE_PG_RESERVERD2_SHIFT 2532 u8 pg_unused_a;533 u16 pg_ipid_count;534#elif defined(__LITTLE_ENDIAN)535 u16 pg_ipid_count;536 u8 pg_unused_a;537 u8 pg_valids;538#define L4_KWQ_UPDATE_PG_VALIDS_IPID_COUNT (0x1<<0)539#define L4_KWQ_UPDATE_PG_VALIDS_IPID_COUNT_SHIFT 0540#define L4_KWQ_UPDATE_PG_VALIDS_DA (0x1<<1)541#define L4_KWQ_UPDATE_PG_VALIDS_DA_SHIFT 1542#define L4_KWQ_UPDATE_PG_RESERVERD2 (0x3F<<2)543#define L4_KWQ_UPDATE_PG_RESERVERD2_SHIFT 2544#endif545#if defined(__BIG_ENDIAN)546 u16 reserved3;547 u8 da0;548 u8 da1;549#elif defined(__LITTLE_ENDIAN)550 u8 da1;551 u8 da0;552 u16 reserved3;553#endif554#if defined(__BIG_ENDIAN)555 u8 da2;556 u8 da3;557 u8 da4;558 u8 da5;559#elif defined(__LITTLE_ENDIAN)560 u8 da5;561 u8 da4;562 u8 da3;563 u8 da2;564#endif565 u32 reserved4;566 u32 reserved5;567};568 569 570/*571 * a KWQE request to upload a PG or L4 context572 */573struct l4_kwq_upload {574#if defined(__BIG_ENDIAN)575 u8 flags;576#define L4_KWQ_UPLOAD_RESERVED1 (0xF<<0)577#define L4_KWQ_UPLOAD_RESERVED1_SHIFT 0578#define L4_KWQ_UPLOAD_LAYER_CODE (0x7<<4)579#define L4_KWQ_UPLOAD_LAYER_CODE_SHIFT 4580#define L4_KWQ_UPLOAD_LINKED_WITH_NEXT (0x1<<7)581#define L4_KWQ_UPLOAD_LINKED_WITH_NEXT_SHIFT 7582 u8 opcode;583 u16 oper16;584#elif defined(__LITTLE_ENDIAN)585 u16 oper16;586 u8 opcode;587 u8 flags;588#define L4_KWQ_UPLOAD_RESERVED1 (0xF<<0)589#define L4_KWQ_UPLOAD_RESERVED1_SHIFT 0590#define L4_KWQ_UPLOAD_LAYER_CODE (0x7<<4)591#define L4_KWQ_UPLOAD_LAYER_CODE_SHIFT 4592#define L4_KWQ_UPLOAD_LINKED_WITH_NEXT (0x1<<7)593#define L4_KWQ_UPLOAD_LINKED_WITH_NEXT_SHIFT 7594#endif595 u32 cid;596 u32 reserved2[6];597};598 599/*600 * bnx2x structures601 */602 603/*604 * The iscsi aggregative context of Cstorm605 */606struct cstorm_iscsi_ag_context {607 u32 agg_vars1;608#define CSTORM_ISCSI_AG_CONTEXT_STATE (0xFF<<0)609#define CSTORM_ISCSI_AG_CONTEXT_STATE_SHIFT 0610#define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<8)611#define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 8612#define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<9)613#define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 9614#define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<10)615#define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 10616#define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<11)617#define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 11618#define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_SE_CF_EN (0x1<<12)619#define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_SE_CF_EN_SHIFT 12620#define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_INV_CF_EN (0x1<<13)621#define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_INV_CF_EN_SHIFT 13622#define __CSTORM_ISCSI_AG_CONTEXT_AUX4_CF (0x3<<14)623#define __CSTORM_ISCSI_AG_CONTEXT_AUX4_CF_SHIFT 14624#define __CSTORM_ISCSI_AG_CONTEXT_RESERVED66 (0x3<<16)625#define __CSTORM_ISCSI_AG_CONTEXT_RESERVED66_SHIFT 16626#define __CSTORM_ISCSI_AG_CONTEXT_FIN_RECEIVED_CF_EN (0x1<<18)627#define __CSTORM_ISCSI_AG_CONTEXT_FIN_RECEIVED_CF_EN_SHIFT 18628#define __CSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN (0x1<<19)629#define __CSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN_SHIFT 19630#define __CSTORM_ISCSI_AG_CONTEXT_AUX2_CF_EN (0x1<<20)631#define __CSTORM_ISCSI_AG_CONTEXT_AUX2_CF_EN_SHIFT 20632#define __CSTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN (0x1<<21)633#define __CSTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN_SHIFT 21634#define __CSTORM_ISCSI_AG_CONTEXT_AUX4_CF_EN (0x1<<22)635#define __CSTORM_ISCSI_AG_CONTEXT_AUX4_CF_EN_SHIFT 22636#define __CSTORM_ISCSI_AG_CONTEXT_REL_SEQ_RULE (0x7<<23)637#define __CSTORM_ISCSI_AG_CONTEXT_REL_SEQ_RULE_SHIFT 23638#define CSTORM_ISCSI_AG_CONTEXT_HQ_PROD_RULE (0x3<<26)639#define CSTORM_ISCSI_AG_CONTEXT_HQ_PROD_RULE_SHIFT 26640#define __CSTORM_ISCSI_AG_CONTEXT_RESERVED52 (0x3<<28)641#define __CSTORM_ISCSI_AG_CONTEXT_RESERVED52_SHIFT 28642#define __CSTORM_ISCSI_AG_CONTEXT_RESERVED53 (0x3<<30)643#define __CSTORM_ISCSI_AG_CONTEXT_RESERVED53_SHIFT 30644#if defined(__BIG_ENDIAN)645 u8 __aux1_th;646 u8 __aux1_val;647 u16 __agg_vars2;648#elif defined(__LITTLE_ENDIAN)649 u16 __agg_vars2;650 u8 __aux1_val;651 u8 __aux1_th;652#endif653 u32 rel_seq;654 u32 rel_seq_th;655#if defined(__BIG_ENDIAN)656 u16 hq_cons;657 u16 hq_prod;658#elif defined(__LITTLE_ENDIAN)659 u16 hq_prod;660 u16 hq_cons;661#endif662#if defined(__BIG_ENDIAN)663 u8 __reserved62;664 u8 __reserved61;665 u8 __reserved60;666 u8 __reserved59;667#elif defined(__LITTLE_ENDIAN)668 u8 __reserved59;669 u8 __reserved60;670 u8 __reserved61;671 u8 __reserved62;672#endif673#if defined(__BIG_ENDIAN)674 u16 __reserved64;675 u16 cq_u_prod;676#elif defined(__LITTLE_ENDIAN)677 u16 cq_u_prod;678 u16 __reserved64;679#endif680 u32 __cq_u_prod1;681#if defined(__BIG_ENDIAN)682 u16 __agg_vars3;683 u16 cq_u_pend;684#elif defined(__LITTLE_ENDIAN)685 u16 cq_u_pend;686 u16 __agg_vars3;687#endif688#if defined(__BIG_ENDIAN)689 u16 __aux2_th;690 u16 aux2_val;691#elif defined(__LITTLE_ENDIAN)692 u16 aux2_val;693 u16 __aux2_th;694#endif695};696 697/*698 * The fcoe extra aggregative context section of Tstorm699 */700struct tstorm_fcoe_extra_ag_context_section {701 u32 __agg_val1;702#if defined(__BIG_ENDIAN)703 u8 __tcp_agg_vars2;704 u8 __agg_val3;705 u16 __agg_val2;706#elif defined(__LITTLE_ENDIAN)707 u16 __agg_val2;708 u8 __agg_val3;709 u8 __tcp_agg_vars2;710#endif711#if defined(__BIG_ENDIAN)712 u16 __agg_val5;713 u8 __agg_val6;714 u8 __tcp_agg_vars3;715#elif defined(__LITTLE_ENDIAN)716 u8 __tcp_agg_vars3;717 u8 __agg_val6;718 u16 __agg_val5;719#endif720 u32 __lcq_prod;721 u32 rtt_seq;722 u32 rtt_time;723 u32 __reserved66;724 u32 wnd_right_edge;725 u32 tcp_agg_vars1;726#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<0)727#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 0728#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG (0x1<<1)729#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG_SHIFT 1730#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_WND_UPD_CF (0x3<<2)731#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_WND_UPD_CF_SHIFT 2732#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TIMEOUT_CF (0x3<<4)733#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TIMEOUT_CF_SHIFT 4734#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_WND_UPD_CF_EN (0x1<<6)735#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_WND_UPD_CF_EN_SHIFT 6736#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TIMEOUT_CF_EN (0x1<<7)737#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TIMEOUT_CF_EN_SHIFT 7738#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN (0x1<<8)739#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN_SHIFT 8740#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_LCQ_SND_EN (0x1<<9)741#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_LCQ_SND_EN_SHIFT 9742#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<10)743#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 10744#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_FLAG (0x1<<11)745#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_FLAG_SHIFT 11746#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_CF_EN (0x1<<12)747#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_CF_EN_SHIFT 12748#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_CF_EN (0x1<<13)749#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_CF_EN_SHIFT 13750#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_CF (0x3<<14)751#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_CF_SHIFT 14752#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_CF (0x3<<16)753#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_CF_SHIFT 16754#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_BLOCKED (0x1<<18)755#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_BLOCKED_SHIFT 18756#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX10_CF_EN (0x1<<19)757#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX10_CF_EN_SHIFT 19758#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX11_CF_EN (0x1<<20)759#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX11_CF_EN_SHIFT 20760#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX12_CF_EN (0x1<<21)761#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX12_CF_EN_SHIFT 21762#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED1 (0x3<<22)763#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED1_SHIFT 22764#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ (0xF<<24)765#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ_SHIFT 24766#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ (0xF<<28)767#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ_SHIFT 28768 u32 snd_max;769 u32 __lcq_cons;770 u32 __reserved2;771};772 773/*774 * The fcoe aggregative context of Tstorm775 */776struct tstorm_fcoe_ag_context {777#if defined(__BIG_ENDIAN)778 u16 ulp_credit;779 u8 agg_vars1;780#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)781#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0782#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)783#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1784#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)785#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2786#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)787#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3788#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF (0x3<<4)789#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_SHIFT 4790#define __TSTORM_FCOE_AG_CONTEXT_AUX3_FLAG (0x1<<6)791#define __TSTORM_FCOE_AG_CONTEXT_AUX3_FLAG_SHIFT 6792#define __TSTORM_FCOE_AG_CONTEXT_AUX4_FLAG (0x1<<7)793#define __TSTORM_FCOE_AG_CONTEXT_AUX4_FLAG_SHIFT 7794 u8 state;795#elif defined(__LITTLE_ENDIAN)796 u8 state;797 u8 agg_vars1;798#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)799#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0800#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)801#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1802#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)803#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2804#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)805#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3806#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF (0x3<<4)807#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_SHIFT 4808#define __TSTORM_FCOE_AG_CONTEXT_AUX3_FLAG (0x1<<6)809#define __TSTORM_FCOE_AG_CONTEXT_AUX3_FLAG_SHIFT 6810#define __TSTORM_FCOE_AG_CONTEXT_AUX4_FLAG (0x1<<7)811#define __TSTORM_FCOE_AG_CONTEXT_AUX4_FLAG_SHIFT 7812 u16 ulp_credit;813#endif814#if defined(__BIG_ENDIAN)815 u16 __agg_val4;816 u16 agg_vars2;817#define __TSTORM_FCOE_AG_CONTEXT_AUX5_FLAG (0x1<<0)818#define __TSTORM_FCOE_AG_CONTEXT_AUX5_FLAG_SHIFT 0819#define __TSTORM_FCOE_AG_CONTEXT_AUX6_FLAG (0x1<<1)820#define __TSTORM_FCOE_AG_CONTEXT_AUX6_FLAG_SHIFT 1821#define __TSTORM_FCOE_AG_CONTEXT_AUX4_CF (0x3<<2)822#define __TSTORM_FCOE_AG_CONTEXT_AUX4_CF_SHIFT 2823#define __TSTORM_FCOE_AG_CONTEXT_AUX5_CF (0x3<<4)824#define __TSTORM_FCOE_AG_CONTEXT_AUX5_CF_SHIFT 4825#define __TSTORM_FCOE_AG_CONTEXT_AUX6_CF (0x3<<6)826#define __TSTORM_FCOE_AG_CONTEXT_AUX6_CF_SHIFT 6827#define __TSTORM_FCOE_AG_CONTEXT_AUX7_CF (0x3<<8)828#define __TSTORM_FCOE_AG_CONTEXT_AUX7_CF_SHIFT 8829#define __TSTORM_FCOE_AG_CONTEXT_AUX7_FLAG (0x1<<10)830#define __TSTORM_FCOE_AG_CONTEXT_AUX7_FLAG_SHIFT 10831#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_EN (0x1<<11)832#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_EN_SHIFT 11833#define TSTORM_FCOE_AG_CONTEXT_AUX4_CF_EN (0x1<<12)834#define TSTORM_FCOE_AG_CONTEXT_AUX4_CF_EN_SHIFT 12835#define TSTORM_FCOE_AG_CONTEXT_AUX5_CF_EN (0x1<<13)836#define TSTORM_FCOE_AG_CONTEXT_AUX5_CF_EN_SHIFT 13837#define TSTORM_FCOE_AG_CONTEXT_AUX6_CF_EN (0x1<<14)838#define TSTORM_FCOE_AG_CONTEXT_AUX6_CF_EN_SHIFT 14839#define TSTORM_FCOE_AG_CONTEXT_AUX7_CF_EN (0x1<<15)840#define TSTORM_FCOE_AG_CONTEXT_AUX7_CF_EN_SHIFT 15841#elif defined(__LITTLE_ENDIAN)842 u16 agg_vars2;843#define __TSTORM_FCOE_AG_CONTEXT_AUX5_FLAG (0x1<<0)844#define __TSTORM_FCOE_AG_CONTEXT_AUX5_FLAG_SHIFT 0845#define __TSTORM_FCOE_AG_CONTEXT_AUX6_FLAG (0x1<<1)846#define __TSTORM_FCOE_AG_CONTEXT_AUX6_FLAG_SHIFT 1847#define __TSTORM_FCOE_AG_CONTEXT_AUX4_CF (0x3<<2)848#define __TSTORM_FCOE_AG_CONTEXT_AUX4_CF_SHIFT 2849#define __TSTORM_FCOE_AG_CONTEXT_AUX5_CF (0x3<<4)850#define __TSTORM_FCOE_AG_CONTEXT_AUX5_CF_SHIFT 4851#define __TSTORM_FCOE_AG_CONTEXT_AUX6_CF (0x3<<6)852#define __TSTORM_FCOE_AG_CONTEXT_AUX6_CF_SHIFT 6853#define __TSTORM_FCOE_AG_CONTEXT_AUX7_CF (0x3<<8)854#define __TSTORM_FCOE_AG_CONTEXT_AUX7_CF_SHIFT 8855#define __TSTORM_FCOE_AG_CONTEXT_AUX7_FLAG (0x1<<10)856#define __TSTORM_FCOE_AG_CONTEXT_AUX7_FLAG_SHIFT 10857#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_EN (0x1<<11)858#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_EN_SHIFT 11859#define TSTORM_FCOE_AG_CONTEXT_AUX4_CF_EN (0x1<<12)860#define TSTORM_FCOE_AG_CONTEXT_AUX4_CF_EN_SHIFT 12861#define TSTORM_FCOE_AG_CONTEXT_AUX5_CF_EN (0x1<<13)862#define TSTORM_FCOE_AG_CONTEXT_AUX5_CF_EN_SHIFT 13863#define TSTORM_FCOE_AG_CONTEXT_AUX6_CF_EN (0x1<<14)864#define TSTORM_FCOE_AG_CONTEXT_AUX6_CF_EN_SHIFT 14865#define TSTORM_FCOE_AG_CONTEXT_AUX7_CF_EN (0x1<<15)866#define TSTORM_FCOE_AG_CONTEXT_AUX7_CF_EN_SHIFT 15867 u16 __agg_val4;868#endif869 struct tstorm_fcoe_extra_ag_context_section __extra_section;870};871 872 873 874/*875 * The tcp aggregative context section of Tstorm876 */877struct tstorm_tcp_tcp_ag_context_section {878 u32 __agg_val1;879#if defined(__BIG_ENDIAN)880 u8 __tcp_agg_vars2;881 u8 __agg_val3;882 u16 __agg_val2;883#elif defined(__LITTLE_ENDIAN)884 u16 __agg_val2;885 u8 __agg_val3;886 u8 __tcp_agg_vars2;887#endif888#if defined(__BIG_ENDIAN)889 u16 __agg_val5;890 u8 __agg_val6;891 u8 __tcp_agg_vars3;892#elif defined(__LITTLE_ENDIAN)893 u8 __tcp_agg_vars3;894 u8 __agg_val6;895 u16 __agg_val5;896#endif897 u32 snd_nxt;898 u32 rtt_seq;899 u32 rtt_time;900 u32 wnd_right_edge_local;901 u32 wnd_right_edge;902 u32 tcp_agg_vars1;903#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<0)904#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 0905#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG (0x1<<1)906#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG_SHIFT 1907#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF (0x3<<2)908#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_SHIFT 2909#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF (0x3<<4)910#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_SHIFT 4911#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_EN (0x1<<6)912#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_EN_SHIFT 6913#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_EN (0x1<<7)914#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_EN_SHIFT 7915#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN (0x1<<8)916#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN_SHIFT 8917#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_SND_NXT_EN (0x1<<9)918#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_SND_NXT_EN_SHIFT 9919#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<10)920#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 10921#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_FLAG (0x1<<11)922#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_FLAG_SHIFT 11923#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF_EN (0x1<<12)924#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF_EN_SHIFT 12925#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF_EN (0x1<<13)926#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF_EN_SHIFT 13927#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF (0x3<<14)928#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF_SHIFT 14929#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF (0x3<<16)930#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF_SHIFT 16931#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_BLOCKED (0x1<<18)932#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_BLOCKED_SHIFT 18933#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN (0x1<<19)934#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN_SHIFT 19935#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF_EN (0x1<<20)936#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF_EN_SHIFT 20937#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF_EN (0x1<<21)938#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF_EN_SHIFT 21939#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED1 (0x3<<22)940#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED1_SHIFT 22941#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ (0xF<<24)942#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ_SHIFT 24943#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ (0xF<<28)944#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ_SHIFT 28945 u32 snd_max;946 u32 snd_una;947 u32 __reserved2;948};949 950/*951 * The iscsi aggregative context of Tstorm952 */953struct tstorm_iscsi_ag_context {954#if defined(__BIG_ENDIAN)955 u16 ulp_credit;956 u8 agg_vars1;957#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)958#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0959#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)960#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1961#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)962#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2963#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)964#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3965#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF (0x3<<4)966#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_SHIFT 4967#define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG (0x1<<6)968#define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG_SHIFT 6969#define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG (0x1<<7)970#define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG_SHIFT 7971 u8 state;972#elif defined(__LITTLE_ENDIAN)973 u8 state;974 u8 agg_vars1;975#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)976#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0977#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)978#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1979#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)980#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2981#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)982#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3983#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF (0x3<<4)984#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_SHIFT 4985#define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG (0x1<<6)986#define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG_SHIFT 6987#define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG (0x1<<7)988#define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG_SHIFT 7989 u16 ulp_credit;990#endif991#if defined(__BIG_ENDIAN)992 u16 __agg_val4;993 u16 agg_vars2;994#define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG (0x1<<0)995#define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG_SHIFT 0996#define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG (0x1<<1)997#define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG_SHIFT 1998#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF (0x3<<2)999#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_SHIFT 21000#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF (0x3<<4)1001#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_SHIFT 41002#define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF (0x3<<6)1003#define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_SHIFT 61004#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF (0x3<<8)1005#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_SHIFT 81006#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG (0x1<<10)1007#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG_SHIFT 101008#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<11)1009#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 111010#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN (0x1<<12)1011#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN_SHIFT 121012#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN (0x1<<13)1013#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN_SHIFT 131014#define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN (0x1<<14)1015#define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN_SHIFT 141016#define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN (0x1<<15)1017#define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN_SHIFT 151018#elif defined(__LITTLE_ENDIAN)1019 u16 agg_vars2;1020#define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG (0x1<<0)1021#define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG_SHIFT 01022#define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG (0x1<<1)1023#define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG_SHIFT 11024#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF (0x3<<2)1025#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_SHIFT 21026#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF (0x3<<4)1027#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_SHIFT 41028#define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF (0x3<<6)1029#define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_SHIFT 61030#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF (0x3<<8)1031#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_SHIFT 81032#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG (0x1<<10)1033#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG_SHIFT 101034#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<11)1035#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 111036#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN (0x1<<12)1037#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN_SHIFT 121038#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN (0x1<<13)1039#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN_SHIFT 131040#define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN (0x1<<14)1041#define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN_SHIFT 141042#define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN (0x1<<15)1043#define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN_SHIFT 151044 u16 __agg_val4;1045#endif1046 struct tstorm_tcp_tcp_ag_context_section tcp;1047};1048 1049 1050 1051/*1052 * The fcoe aggregative context of Ustorm1053 */1054struct ustorm_fcoe_ag_context {1055#if defined(__BIG_ENDIAN)1056 u8 __aux_counter_flags;1057 u8 agg_vars2;1058#define USTORM_FCOE_AG_CONTEXT_TX_CF (0x3<<0)1059#define USTORM_FCOE_AG_CONTEXT_TX_CF_SHIFT 01060#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF (0x3<<2)1061#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_SHIFT 21062#define USTORM_FCOE_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4)1063#define USTORM_FCOE_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 41064#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7)1065#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 71066 u8 agg_vars1;1067#define __USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)1068#define __USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 01069#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)1070#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 11071#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)1072#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 21073#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)1074#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 31075#define USTORM_FCOE_AG_CONTEXT_INV_CF (0x3<<4)1076#define USTORM_FCOE_AG_CONTEXT_INV_CF_SHIFT 41077#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF (0x3<<6)1078#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_SHIFT 61079 u8 state;1080#elif defined(__LITTLE_ENDIAN)1081 u8 state;1082 u8 agg_vars1;1083#define __USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)1084#define __USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 01085#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)1086#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 11087#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)1088#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 21089#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)1090#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 31091#define USTORM_FCOE_AG_CONTEXT_INV_CF (0x3<<4)1092#define USTORM_FCOE_AG_CONTEXT_INV_CF_SHIFT 41093#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF (0x3<<6)1094#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_SHIFT 61095 u8 agg_vars2;1096#define USTORM_FCOE_AG_CONTEXT_TX_CF (0x3<<0)1097#define USTORM_FCOE_AG_CONTEXT_TX_CF_SHIFT 01098#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF (0x3<<2)1099#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_SHIFT 21100#define USTORM_FCOE_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4)1101#define USTORM_FCOE_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 41102#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7)1103#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 71104 u8 __aux_counter_flags;1105#endif1106#if defined(__BIG_ENDIAN)1107 u8 cdu_usage;1108 u8 agg_misc2;1109 u16 pbf_tx_seq_ack;1110#elif defined(__LITTLE_ENDIAN)1111 u16 pbf_tx_seq_ack;1112 u8 agg_misc2;1113 u8 cdu_usage;1114#endif1115 u32 agg_misc4;1116#if defined(__BIG_ENDIAN)1117 u8 agg_val3_th;1118 u8 agg_val3;1119 u16 agg_misc3;1120#elif defined(__LITTLE_ENDIAN)1121 u16 agg_misc3;1122 u8 agg_val3;1123 u8 agg_val3_th;1124#endif1125 u32 expired_task_id;1126 u32 agg_misc4_th;1127#if defined(__BIG_ENDIAN)1128 u16 cq_prod;1129 u16 cq_cons;1130#elif defined(__LITTLE_ENDIAN)1131 u16 cq_cons;1132 u16 cq_prod;1133#endif1134#if defined(__BIG_ENDIAN)1135 u16 __reserved2;1136 u8 decision_rules;1137#define USTORM_FCOE_AG_CONTEXT_CQ_DEC_RULE (0x7<<0)1138#define USTORM_FCOE_AG_CONTEXT_CQ_DEC_RULE_SHIFT 01139#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3)1140#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 31141#define USTORM_FCOE_AG_CONTEXT_CQ_ARM_N_FLAG (0x1<<6)1142#define USTORM_FCOE_AG_CONTEXT_CQ_ARM_N_FLAG_SHIFT 61143#define __USTORM_FCOE_AG_CONTEXT_RESERVED1 (0x1<<7)1144#define __USTORM_FCOE_AG_CONTEXT_RESERVED1_SHIFT 71145 u8 decision_rule_enable_bits;1146#define __USTORM_FCOE_AG_CONTEXT_RESERVED_INV_CF_EN (0x1<<0)1147#define __USTORM_FCOE_AG_CONTEXT_RESERVED_INV_CF_EN_SHIFT 01148#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1)1149#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 11150#define USTORM_FCOE_AG_CONTEXT_TX_CF_EN (0x1<<2)1151#define USTORM_FCOE_AG_CONTEXT_TX_CF_EN_SHIFT 21152#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_EN (0x1<<3)1153#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_EN_SHIFT 31154#define __USTORM_FCOE_AG_CONTEXT_AUX1_CF_EN (0x1<<4)1155#define __USTORM_FCOE_AG_CONTEXT_AUX1_CF_EN_SHIFT 41156#define __USTORM_FCOE_AG_CONTEXT_QUEUE0_CF_EN (0x1<<5)1157#define __USTORM_FCOE_AG_CONTEXT_QUEUE0_CF_EN_SHIFT 51158#define __USTORM_FCOE_AG_CONTEXT_AUX3_CF_EN (0x1<<6)1159#define __USTORM_FCOE_AG_CONTEXT_AUX3_CF_EN_SHIFT 61160#define __USTORM_FCOE_AG_CONTEXT_DQ_CF_EN (0x1<<7)1161#define __USTORM_FCOE_AG_CONTEXT_DQ_CF_EN_SHIFT 71162#elif defined(__LITTLE_ENDIAN)1163 u8 decision_rule_enable_bits;1164#define __USTORM_FCOE_AG_CONTEXT_RESERVED_INV_CF_EN (0x1<<0)1165#define __USTORM_FCOE_AG_CONTEXT_RESERVED_INV_CF_EN_SHIFT 01166#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1)1167#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 11168#define USTORM_FCOE_AG_CONTEXT_TX_CF_EN (0x1<<2)1169#define USTORM_FCOE_AG_CONTEXT_TX_CF_EN_SHIFT 21170#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_EN (0x1<<3)1171#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_EN_SHIFT 31172#define __USTORM_FCOE_AG_CONTEXT_AUX1_CF_EN (0x1<<4)1173#define __USTORM_FCOE_AG_CONTEXT_AUX1_CF_EN_SHIFT 41174#define __USTORM_FCOE_AG_CONTEXT_QUEUE0_CF_EN (0x1<<5)1175#define __USTORM_FCOE_AG_CONTEXT_QUEUE0_CF_EN_SHIFT 51176#define __USTORM_FCOE_AG_CONTEXT_AUX3_CF_EN (0x1<<6)1177#define __USTORM_FCOE_AG_CONTEXT_AUX3_CF_EN_SHIFT 61178#define __USTORM_FCOE_AG_CONTEXT_DQ_CF_EN (0x1<<7)1179#define __USTORM_FCOE_AG_CONTEXT_DQ_CF_EN_SHIFT 71180 u8 decision_rules;1181#define USTORM_FCOE_AG_CONTEXT_CQ_DEC_RULE (0x7<<0)1182#define USTORM_FCOE_AG_CONTEXT_CQ_DEC_RULE_SHIFT 01183#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3)1184#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 31185#define USTORM_FCOE_AG_CONTEXT_CQ_ARM_N_FLAG (0x1<<6)1186#define USTORM_FCOE_AG_CONTEXT_CQ_ARM_N_FLAG_SHIFT 61187#define __USTORM_FCOE_AG_CONTEXT_RESERVED1 (0x1<<7)1188#define __USTORM_FCOE_AG_CONTEXT_RESERVED1_SHIFT 71189 u16 __reserved2;1190#endif1191};1192 1193 1194/*1195 * The iscsi aggregative context of Ustorm1196 */1197struct ustorm_iscsi_ag_context {1198#if defined(__BIG_ENDIAN)1199 u8 __aux_counter_flags;1200 u8 agg_vars2;1201#define USTORM_ISCSI_AG_CONTEXT_TX_CF (0x3<<0)1202#define USTORM_ISCSI_AG_CONTEXT_TX_CF_SHIFT 01203#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF (0x3<<2)1204#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_SHIFT 21205#define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4)1206#define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 41207#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7)1208#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 71209 u8 agg_vars1;1210#define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)1211#define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 01212#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)1213#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 11214#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)1215#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 21216#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)1217#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 31218#define USTORM_ISCSI_AG_CONTEXT_INV_CF (0x3<<4)1219#define USTORM_ISCSI_AG_CONTEXT_INV_CF_SHIFT 41220#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF (0x3<<6)1221#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_SHIFT 61222 u8 state;1223#elif defined(__LITTLE_ENDIAN)1224 u8 state;1225 u8 agg_vars1;1226#define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)1227#define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 01228#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)1229#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 11230#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)1231#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 21232#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)1233#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 31234#define USTORM_ISCSI_AG_CONTEXT_INV_CF (0x3<<4)1235#define USTORM_ISCSI_AG_CONTEXT_INV_CF_SHIFT 41236#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF (0x3<<6)1237#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_SHIFT 61238 u8 agg_vars2;1239#define USTORM_ISCSI_AG_CONTEXT_TX_CF (0x3<<0)1240#define USTORM_ISCSI_AG_CONTEXT_TX_CF_SHIFT 01241#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF (0x3<<2)1242#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_SHIFT 21243#define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4)1244#define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 41245#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7)1246#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 71247 u8 __aux_counter_flags;1248#endif1249#if defined(__BIG_ENDIAN)1250 u8 cdu_usage;1251 u8 agg_misc2;1252 u16 __cq_local_comp_itt_val;1253#elif defined(__LITTLE_ENDIAN)1254 u16 __cq_local_comp_itt_val;1255 u8 agg_misc2;1256 u8 cdu_usage;1257#endif1258 u32 agg_misc4;1259#if defined(__BIG_ENDIAN)1260 u8 agg_val3_th;1261 u8 agg_val3;1262 u16 agg_misc3;1263#elif defined(__LITTLE_ENDIAN)1264 u16 agg_misc3;1265 u8 agg_val3;1266 u8 agg_val3_th;1267#endif1268 u32 agg_val1;1269 u32 agg_misc4_th;1270#if defined(__BIG_ENDIAN)1271 u16 agg_val2_th;1272 u16 agg_val2;1273#elif defined(__LITTLE_ENDIAN)1274 u16 agg_val2;1275 u16 agg_val2_th;1276#endif1277#if defined(__BIG_ENDIAN)1278 u16 __reserved2;1279 u8 decision_rules;1280#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE (0x7<<0)1281#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE_SHIFT 01282#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3)1283#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 31284#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG (0x1<<6)1285#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG_SHIFT 61286#define __USTORM_ISCSI_AG_CONTEXT_RESERVED1 (0x1<<7)1287#define __USTORM_ISCSI_AG_CONTEXT_RESERVED1_SHIFT 71288 u8 decision_rule_enable_bits;1289#define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN (0x1<<0)1290#define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN_SHIFT 01291#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1)1292#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 11293#define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN (0x1<<2)1294#define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN_SHIFT 21295#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN (0x1<<3)1296#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN_SHIFT 31297#define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN (0x1<<4)1298#define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN_SHIFT 41299#define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<5)1300#define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 51301#define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN (0x1<<6)1302#define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN_SHIFT 61303#define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7)1304#define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 71305#elif defined(__LITTLE_ENDIAN)1306 u8 decision_rule_enable_bits;1307#define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN (0x1<<0)1308#define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN_SHIFT 01309#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1)1310#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 11311#define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN (0x1<<2)1312#define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN_SHIFT 21313#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN (0x1<<3)1314#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN_SHIFT 31315#define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN (0x1<<4)1316#define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN_SHIFT 41317#define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<5)1318#define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 51319#define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN (0x1<<6)1320#define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN_SHIFT 61321#define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7)1322#define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 71323 u8 decision_rules;1324#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE (0x7<<0)1325#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE_SHIFT 01326#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3)1327#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 31328#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG (0x1<<6)1329#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG_SHIFT 61330#define __USTORM_ISCSI_AG_CONTEXT_RESERVED1 (0x1<<7)1331#define __USTORM_ISCSI_AG_CONTEXT_RESERVED1_SHIFT 71332 u16 __reserved2;1333#endif1334};1335 1336 1337/*1338 * The fcoe aggregative context section of Xstorm1339 */1340struct xstorm_fcoe_extra_ag_context_section {1341#if defined(__BIG_ENDIAN)1342 u8 tcp_agg_vars1;1343#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED51 (0x3<<0)1344#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED51_SHIFT 01345#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED (0x3<<2)1346#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_SHIFT 21347#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF (0x3<<4)1348#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_SHIFT 41349#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_CLEAR_DA_TIMER_EN (0x1<<6)1350#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_CLEAR_DA_TIMER_EN_SHIFT 61351#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_DA_EXPIRATION_FLAG (0x1<<7)1352#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_DA_EXPIRATION_FLAG_SHIFT 71353 u8 __reserved_da_cnt;1354 u16 __mtu;1355#elif defined(__LITTLE_ENDIAN)1356 u16 __mtu;1357 u8 __reserved_da_cnt;1358 u8 tcp_agg_vars1;1359#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED51 (0x3<<0)1360#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED51_SHIFT 01361#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED (0x3<<2)1362#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_SHIFT 21363#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF (0x3<<4)1364#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_SHIFT 41365#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_CLEAR_DA_TIMER_EN (0x1<<6)1366#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_CLEAR_DA_TIMER_EN_SHIFT 61367#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_DA_EXPIRATION_FLAG (0x1<<7)1368#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_DA_EXPIRATION_FLAG_SHIFT 71369#endif1370 u32 snd_nxt;1371 u32 __xfrqe_bd_addr_lo;1372 u32 __xfrqe_bd_addr_hi;1373 u32 __xfrqe_data1;1374#if defined(__BIG_ENDIAN)1375 u8 __agg_val8_th;1376 u8 __tx_dest;1377 u16 tcp_agg_vars2;1378#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED57 (0x1<<0)1379#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED57_SHIFT 01380#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED58 (0x1<<1)1381#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED58_SHIFT 11382#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED59 (0x1<<2)1383#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED59_SHIFT 21384#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX3_FLAG (0x1<<3)1385#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX3_FLAG_SHIFT 31386#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX4_FLAG (0x1<<4)1387#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX4_FLAG_SHIFT 41388#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED60 (0x1<<5)1389#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED60_SHIFT 51390#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_ACK_TO_FE_UPDATED_EN (0x1<<6)1391#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_ACK_TO_FE_UPDATED_EN_SHIFT 61392#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN (0x1<<7)1393#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN_SHIFT 71394#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_TX_FIN_FLAG_EN (0x1<<8)1395#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_TX_FIN_FLAG_EN_SHIFT 81396#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<9)1397#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 91398#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SET_RTO_CF (0x3<<10)1399#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SET_RTO_CF_SHIFT 101400#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF (0x3<<12)1401#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF_SHIFT 121402#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF (0x3<<14)1403#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_SHIFT 141404#elif defined(__LITTLE_ENDIAN)1405 u16 tcp_agg_vars2;1406#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED57 (0x1<<0)1407#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED57_SHIFT 01408#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED58 (0x1<<1)1409#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED58_SHIFT 11410#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED59 (0x1<<2)1411#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED59_SHIFT 21412#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX3_FLAG (0x1<<3)1413#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX3_FLAG_SHIFT 31414#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX4_FLAG (0x1<<4)1415#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX4_FLAG_SHIFT 41416#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED60 (0x1<<5)1417#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED60_SHIFT 51418#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_ACK_TO_FE_UPDATED_EN (0x1<<6)1419#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_ACK_TO_FE_UPDATED_EN_SHIFT 61420#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN (0x1<<7)1421#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN_SHIFT 71422#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_TX_FIN_FLAG_EN (0x1<<8)1423#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_TX_FIN_FLAG_EN_SHIFT 81424#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<9)1425#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 91426#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SET_RTO_CF (0x3<<10)1427#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SET_RTO_CF_SHIFT 101428#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF (0x3<<12)1429#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF_SHIFT 121430#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF (0x3<<14)1431#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_SHIFT 141432 u8 __tx_dest;1433 u8 __agg_val8_th;1434#endif1435 u32 __sq_base_addr_lo;1436 u32 __sq_base_addr_hi;1437 u32 __xfrq_base_addr_lo;1438 u32 __xfrq_base_addr_hi;1439#if defined(__BIG_ENDIAN)1440 u16 __xfrq_cons;1441 u16 __xfrq_prod;1442#elif defined(__LITTLE_ENDIAN)1443 u16 __xfrq_prod;1444 u16 __xfrq_cons;1445#endif1446#if defined(__BIG_ENDIAN)1447 u8 __tcp_agg_vars5;1448 u8 __tcp_agg_vars4;1449 u8 __tcp_agg_vars3;1450 u8 __reserved_force_pure_ack_cnt;1451#elif defined(__LITTLE_ENDIAN)1452 u8 __reserved_force_pure_ack_cnt;1453 u8 __tcp_agg_vars3;1454 u8 __tcp_agg_vars4;1455 u8 __tcp_agg_vars5;1456#endif1457 u32 __tcp_agg_vars6;1458#if defined(__BIG_ENDIAN)1459 u16 __xfrqe_mng;1460 u16 __tcp_agg_vars7;1461#elif defined(__LITTLE_ENDIAN)1462 u16 __tcp_agg_vars7;1463 u16 __xfrqe_mng;1464#endif1465 u32 __xfrqe_data0;1466 u32 __agg_val10_th;1467#if defined(__BIG_ENDIAN)1468 u16 __reserved3;1469 u8 __reserved2;1470 u8 __da_only_cnt;1471#elif defined(__LITTLE_ENDIAN)1472 u8 __da_only_cnt;1473 u8 __reserved2;1474 u16 __reserved3;1475#endif1476};1477 1478/*1479 * The fcoe aggregative context of Xstorm1480 */1481struct xstorm_fcoe_ag_context {1482#if defined(__BIG_ENDIAN)1483 u16 agg_val1;1484 u8 agg_vars1;1485#define __XSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)1486#define __XSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 01487#define __XSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)1488#define __XSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 11489#define __XSTORM_FCOE_AG_CONTEXT_RESERVED51 (0x1<<2)1490#define __XSTORM_FCOE_AG_CONTEXT_RESERVED51_SHIFT 21491#define __XSTORM_FCOE_AG_CONTEXT_RESERVED52 (0x1<<3)1492#define __XSTORM_FCOE_AG_CONTEXT_RESERVED52_SHIFT 31493#define __XSTORM_FCOE_AG_CONTEXT_MORE_TO_SEND_EN (0x1<<4)1494#define __XSTORM_FCOE_AG_CONTEXT_MORE_TO_SEND_EN_SHIFT 41495#define XSTORM_FCOE_AG_CONTEXT_NAGLE_EN (0x1<<5)1496#define XSTORM_FCOE_AG_CONTEXT_NAGLE_EN_SHIFT 51497#define __XSTORM_FCOE_AG_CONTEXT_DQ_SPARE_FLAG (0x1<<6)1498#define __XSTORM_FCOE_AG_CONTEXT_DQ_SPARE_FLAG_SHIFT 61499#define __XSTORM_FCOE_AG_CONTEXT_RESERVED_UNA_GT_NXT_EN (0x1<<7)1500#define __XSTORM_FCOE_AG_CONTEXT_RESERVED_UNA_GT_NXT_EN_SHIFT 71501 u8 __state;1502#elif defined(__LITTLE_ENDIAN)1503 u8 __state;1504 u8 agg_vars1;1505#define __XSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)1506#define __XSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 01507#define __XSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)1508#define __XSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 11509#define __XSTORM_FCOE_AG_CONTEXT_RESERVED51 (0x1<<2)1510#define __XSTORM_FCOE_AG_CONTEXT_RESERVED51_SHIFT 21511#define __XSTORM_FCOE_AG_CONTEXT_RESERVED52 (0x1<<3)1512#define __XSTORM_FCOE_AG_CONTEXT_RESERVED52_SHIFT 31513#define __XSTORM_FCOE_AG_CONTEXT_MORE_TO_SEND_EN (0x1<<4)1514#define __XSTORM_FCOE_AG_CONTEXT_MORE_TO_SEND_EN_SHIFT 41515#define XSTORM_FCOE_AG_CONTEXT_NAGLE_EN (0x1<<5)1516#define XSTORM_FCOE_AG_CONTEXT_NAGLE_EN_SHIFT 51517#define __XSTORM_FCOE_AG_CONTEXT_DQ_SPARE_FLAG (0x1<<6)1518#define __XSTORM_FCOE_AG_CONTEXT_DQ_SPARE_FLAG_SHIFT 61519#define __XSTORM_FCOE_AG_CONTEXT_RESERVED_UNA_GT_NXT_EN (0x1<<7)1520#define __XSTORM_FCOE_AG_CONTEXT_RESERVED_UNA_GT_NXT_EN_SHIFT 71521 u16 agg_val1;1522#endif1523#if defined(__BIG_ENDIAN)1524 u8 cdu_reserved;1525 u8 __agg_vars4;1526 u8 agg_vars3;1527#define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM2 (0x3F<<0)1528#define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM2_SHIFT 01529#define __XSTORM_FCOE_AG_CONTEXT_AUX19_CF (0x3<<6)1530#define __XSTORM_FCOE_AG_CONTEXT_AUX19_CF_SHIFT 61531 u8 agg_vars2;1532#define __XSTORM_FCOE_AG_CONTEXT_DQ_CF (0x3<<0)1533#define __XSTORM_FCOE_AG_CONTEXT_DQ_CF_SHIFT 01534#define __XSTORM_FCOE_AG_CONTEXT_DQ_SPARE_FLAG_EN (0x1<<2)1535#define __XSTORM_FCOE_AG_CONTEXT_DQ_SPARE_FLAG_EN_SHIFT 21536#define __XSTORM_FCOE_AG_CONTEXT_AUX8_FLAG (0x1<<3)1537#define __XSTORM_FCOE_AG_CONTEXT_AUX8_FLAG_SHIFT 31538#define __XSTORM_FCOE_AG_CONTEXT_AUX9_FLAG (0x1<<4)1539#define __XSTORM_FCOE_AG_CONTEXT_AUX9_FLAG_SHIFT 41540#define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE1 (0x3<<5)1541#define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE1_SHIFT 51542#define __XSTORM_FCOE_AG_CONTEXT_DQ_CF_EN (0x1<<7)1543#define __XSTORM_FCOE_AG_CONTEXT_DQ_CF_EN_SHIFT 71544#elif defined(__LITTLE_ENDIAN)1545 u8 agg_vars2;1546#define __XSTORM_FCOE_AG_CONTEXT_DQ_CF (0x3<<0)1547#define __XSTORM_FCOE_AG_CONTEXT_DQ_CF_SHIFT 01548#define __XSTORM_FCOE_AG_CONTEXT_DQ_SPARE_FLAG_EN (0x1<<2)1549#define __XSTORM_FCOE_AG_CONTEXT_DQ_SPARE_FLAG_EN_SHIFT 21550#define __XSTORM_FCOE_AG_CONTEXT_AUX8_FLAG (0x1<<3)1551#define __XSTORM_FCOE_AG_CONTEXT_AUX8_FLAG_SHIFT 31552#define __XSTORM_FCOE_AG_CONTEXT_AUX9_FLAG (0x1<<4)1553#define __XSTORM_FCOE_AG_CONTEXT_AUX9_FLAG_SHIFT 41554#define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE1 (0x3<<5)1555#define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE1_SHIFT 51556#define __XSTORM_FCOE_AG_CONTEXT_DQ_CF_EN (0x1<<7)1557#define __XSTORM_FCOE_AG_CONTEXT_DQ_CF_EN_SHIFT 71558 u8 agg_vars3;1559#define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM2 (0x3F<<0)1560#define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM2_SHIFT 01561#define __XSTORM_FCOE_AG_CONTEXT_AUX19_CF (0x3<<6)1562#define __XSTORM_FCOE_AG_CONTEXT_AUX19_CF_SHIFT 61563 u8 __agg_vars4;1564 u8 cdu_reserved;1565#endif1566 u32 more_to_send;1567#if defined(__BIG_ENDIAN)1568 u16 agg_vars5;1569#define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE5 (0x3<<0)1570#define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE5_SHIFT 01571#define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM0 (0x3F<<2)1572#define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM0_SHIFT 21573#define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM1 (0x3F<<8)1574#define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM1_SHIFT 81575#define __XSTORM_FCOE_AG_CONTEXT_CONFQ_DEC_RULE (0x3<<14)1576#define __XSTORM_FCOE_AG_CONTEXT_CONFQ_DEC_RULE_SHIFT 141577 u16 sq_cons;1578#elif defined(__LITTLE_ENDIAN)1579 u16 sq_cons;1580 u16 agg_vars5;1581#define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE5 (0x3<<0)1582#define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE5_SHIFT 01583#define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM0 (0x3F<<2)1584#define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM0_SHIFT 21585#define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM1 (0x3F<<8)1586#define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM1_SHIFT 81587#define __XSTORM_FCOE_AG_CONTEXT_CONFQ_DEC_RULE (0x3<<14)1588#define __XSTORM_FCOE_AG_CONTEXT_CONFQ_DEC_RULE_SHIFT 141589#endif1590 struct xstorm_fcoe_extra_ag_context_section __extra_section;1591#if defined(__BIG_ENDIAN)1592 u16 agg_vars7;1593#define __XSTORM_FCOE_AG_CONTEXT_AGG_VAL11_DECISION_RULE (0x7<<0)1594#define __XSTORM_FCOE_AG_CONTEXT_AGG_VAL11_DECISION_RULE_SHIFT 01595#define __XSTORM_FCOE_AG_CONTEXT_AUX13_FLAG (0x1<<3)1596#define __XSTORM_FCOE_AG_CONTEXT_AUX13_FLAG_SHIFT 31597#define __XSTORM_FCOE_AG_CONTEXT_QUEUE0_CF (0x3<<4)1598#define __XSTORM_FCOE_AG_CONTEXT_QUEUE0_CF_SHIFT 41599#define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE3 (0x3<<6)1600#define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE3_SHIFT 61601#define XSTORM_FCOE_AG_CONTEXT_AUX1_CF (0x3<<8)1602#define XSTORM_FCOE_AG_CONTEXT_AUX1_CF_SHIFT 81603#define __XSTORM_FCOE_AG_CONTEXT_RESERVED62 (0x1<<10)1604#define __XSTORM_FCOE_AG_CONTEXT_RESERVED62_SHIFT 101605#define __XSTORM_FCOE_AG_CONTEXT_AUX1_CF_EN (0x1<<11)1606#define __XSTORM_FCOE_AG_CONTEXT_AUX1_CF_EN_SHIFT 111607#define __XSTORM_FCOE_AG_CONTEXT_AUX10_FLAG (0x1<<12)1608#define __XSTORM_FCOE_AG_CONTEXT_AUX10_FLAG_SHIFT 121609#define __XSTORM_FCOE_AG_CONTEXT_AUX11_FLAG (0x1<<13)1610#define __XSTORM_FCOE_AG_CONTEXT_AUX11_FLAG_SHIFT 131611#define __XSTORM_FCOE_AG_CONTEXT_AUX12_FLAG (0x1<<14)1612#define __XSTORM_FCOE_AG_CONTEXT_AUX12_FLAG_SHIFT 141613#define __XSTORM_FCOE_AG_CONTEXT_AUX2_FLAG (0x1<<15)1614#define __XSTORM_FCOE_AG_CONTEXT_AUX2_FLAG_SHIFT 151615 u8 agg_val3_th;1616 u8 agg_vars6;1617#define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE6 (0x7<<0)1618#define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE6_SHIFT 01619#define __XSTORM_FCOE_AG_CONTEXT_XFRQ_DEC_RULE (0x7<<3)1620#define __XSTORM_FCOE_AG_CONTEXT_XFRQ_DEC_RULE_SHIFT 31621#define __XSTORM_FCOE_AG_CONTEXT_SQ_DEC_RULE (0x3<<6)1622#define __XSTORM_FCOE_AG_CONTEXT_SQ_DEC_RULE_SHIFT 61623#elif defined(__LITTLE_ENDIAN)1624 u8 agg_vars6;1625#define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE6 (0x7<<0)1626#define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE6_SHIFT 01627#define __XSTORM_FCOE_AG_CONTEXT_XFRQ_DEC_RULE (0x7<<3)1628#define __XSTORM_FCOE_AG_CONTEXT_XFRQ_DEC_RULE_SHIFT 31629#define __XSTORM_FCOE_AG_CONTEXT_SQ_DEC_RULE (0x3<<6)1630#define __XSTORM_FCOE_AG_CONTEXT_SQ_DEC_RULE_SHIFT 61631 u8 agg_val3_th;1632 u16 agg_vars7;1633#define __XSTORM_FCOE_AG_CONTEXT_AGG_VAL11_DECISION_RULE (0x7<<0)1634#define __XSTORM_FCOE_AG_CONTEXT_AGG_VAL11_DECISION_RULE_SHIFT 01635#define __XSTORM_FCOE_AG_CONTEXT_AUX13_FLAG (0x1<<3)1636#define __XSTORM_FCOE_AG_CONTEXT_AUX13_FLAG_SHIFT 31637#define __XSTORM_FCOE_AG_CONTEXT_QUEUE0_CF (0x3<<4)1638#define __XSTORM_FCOE_AG_CONTEXT_QUEUE0_CF_SHIFT 41639#define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE3 (0x3<<6)1640#define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE3_SHIFT 61641#define XSTORM_FCOE_AG_CONTEXT_AUX1_CF (0x3<<8)1642#define XSTORM_FCOE_AG_CONTEXT_AUX1_CF_SHIFT 81643#define __XSTORM_FCOE_AG_CONTEXT_RESERVED62 (0x1<<10)1644#define __XSTORM_FCOE_AG_CONTEXT_RESERVED62_SHIFT 101645#define __XSTORM_FCOE_AG_CONTEXT_AUX1_CF_EN (0x1<<11)1646#define __XSTORM_FCOE_AG_CONTEXT_AUX1_CF_EN_SHIFT 111647#define __XSTORM_FCOE_AG_CONTEXT_AUX10_FLAG (0x1<<12)1648#define __XSTORM_FCOE_AG_CONTEXT_AUX10_FLAG_SHIFT 121649#define __XSTORM_FCOE_AG_CONTEXT_AUX11_FLAG (0x1<<13)1650#define __XSTORM_FCOE_AG_CONTEXT_AUX11_FLAG_SHIFT 131651#define __XSTORM_FCOE_AG_CONTEXT_AUX12_FLAG (0x1<<14)1652#define __XSTORM_FCOE_AG_CONTEXT_AUX12_FLAG_SHIFT 141653#define __XSTORM_FCOE_AG_CONTEXT_AUX2_FLAG (0x1<<15)1654#define __XSTORM_FCOE_AG_CONTEXT_AUX2_FLAG_SHIFT 151655#endif1656#if defined(__BIG_ENDIAN)1657 u16 __agg_val11_th;1658 u16 __agg_val11;1659#elif defined(__LITTLE_ENDIAN)1660 u16 __agg_val11;1661 u16 __agg_val11_th;1662#endif1663#if defined(__BIG_ENDIAN)1664 u8 __reserved1;1665 u8 __agg_val6_th;1666 u16 __agg_val9;1667#elif defined(__LITTLE_ENDIAN)1668 u16 __agg_val9;1669 u8 __agg_val6_th;1670 u8 __reserved1;1671#endif1672#if defined(__BIG_ENDIAN)1673 u16 confq_cons;1674 u16 confq_prod;1675#elif defined(__LITTLE_ENDIAN)1676 u16 confq_prod;1677 u16 confq_cons;1678#endif1679 u32 agg_vars8;1680#define XSTORM_FCOE_AG_CONTEXT_AGG_MISC2 (0xFFFFFF<<0)1681#define XSTORM_FCOE_AG_CONTEXT_AGG_MISC2_SHIFT 01682#define XSTORM_FCOE_AG_CONTEXT_AGG_MISC3 (0xFF<<24)1683#define XSTORM_FCOE_AG_CONTEXT_AGG_MISC3_SHIFT 241684#if defined(__BIG_ENDIAN)1685 u16 __cache_wqe_db;1686 u16 sq_prod;1687#elif defined(__LITTLE_ENDIAN)1688 u16 sq_prod;1689 u16 __cache_wqe_db;1690#endif1691#if defined(__BIG_ENDIAN)1692 u8 agg_val3;1693 u8 agg_val6;1694 u8 agg_val5_th;1695 u8 agg_val5;1696#elif defined(__LITTLE_ENDIAN)1697 u8 agg_val5;1698 u8 agg_val5_th;1699 u8 agg_val6;1700 u8 agg_val3;1701#endif1702#if defined(__BIG_ENDIAN)1703 u16 __agg_misc1;1704 u16 agg_limit1;1705#elif defined(__LITTLE_ENDIAN)1706 u16 agg_limit1;1707 u16 __agg_misc1;1708#endif1709 u32 completion_seq;1710 u32 confq_pbl_base_lo;1711 u32 confq_pbl_base_hi;1712};1713 1714 1715 1716/*1717 * The tcp aggregative context section of Xstorm1718 */1719struct xstorm_tcp_tcp_ag_context_section {1720#if defined(__BIG_ENDIAN)1721 u8 tcp_agg_vars1;1722#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_DA_TIMER_CF (0x3<<0)1723#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_DA_TIMER_CF_SHIFT 01724#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED (0x3<<2)1725#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_SHIFT 21726#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF (0x3<<4)1727#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_SHIFT 41728#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_CLEAR_DA_TIMER_EN (0x1<<6)1729#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_CLEAR_DA_TIMER_EN_SHIFT 61730#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_EXPIRATION_FLAG (0x1<<7)1731#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_EXPIRATION_FLAG_SHIFT 71732 u8 __da_cnt;1733 u16 mss;1734#elif defined(__LITTLE_ENDIAN)1735 u16 mss;1736 u8 __da_cnt;1737 u8 tcp_agg_vars1;1738#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_DA_TIMER_CF (0x3<<0)1739#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_DA_TIMER_CF_SHIFT 01740#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED (0x3<<2)1741#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_SHIFT 21742#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF (0x3<<4)1743#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_SHIFT 41744#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_CLEAR_DA_TIMER_EN (0x1<<6)1745#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_CLEAR_DA_TIMER_EN_SHIFT 61746#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_EXPIRATION_FLAG (0x1<<7)1747#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_EXPIRATION_FLAG_SHIFT 71748#endif1749 u32 snd_nxt;1750 u32 tx_wnd;1751 u32 snd_una;1752 u32 local_adv_wnd;1753#if defined(__BIG_ENDIAN)1754 u8 __agg_val8_th;1755 u8 __tx_dest;1756 u16 tcp_agg_vars2;1757#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG (0x1<<0)1758#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_SHIFT 01759#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_UNBLOCKED (0x1<<1)1760#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_UNBLOCKED_SHIFT 11761#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_TIMER_ACTIVE (0x1<<2)1762#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_TIMER_ACTIVE_SHIFT 21763#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_FLAG (0x1<<3)1764#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_FLAG_SHIFT 31765#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX4_FLAG (0x1<<4)1766#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX4_FLAG_SHIFT 41767#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_ENABLE (0x1<<5)1768#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_ENABLE_SHIFT 51769#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN (0x1<<6)1770#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN_SHIFT 61771#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN (0x1<<7)1772#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN_SHIFT 71773#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN (0x1<<8)1774#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN_SHIFT 81775#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<9)1776#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 91777#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_RTO_CF (0x3<<10)1778#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_RTO_CF_SHIFT 101779#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF (0x3<<12)1780#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF_SHIFT 121781#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF (0x3<<14)1782#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_SHIFT 141783#elif defined(__LITTLE_ENDIAN)1784 u16 tcp_agg_vars2;1785#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG (0x1<<0)1786#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_SHIFT 01787#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_UNBLOCKED (0x1<<1)1788#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_UNBLOCKED_SHIFT 11789#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_TIMER_ACTIVE (0x1<<2)1790#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_TIMER_ACTIVE_SHIFT 21791#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_FLAG (0x1<<3)1792#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_FLAG_SHIFT 31793#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX4_FLAG (0x1<<4)1794#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX4_FLAG_SHIFT 41795#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_ENABLE (0x1<<5)1796#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_ENABLE_SHIFT 51797#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN (0x1<<6)1798#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN_SHIFT 61799#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN (0x1<<7)1800#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN_SHIFT 71801#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN (0x1<<8)1802#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN_SHIFT 81803#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<9)1804#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 91805#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_RTO_CF (0x3<<10)1806#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_RTO_CF_SHIFT 101807#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF (0x3<<12)1808#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF_SHIFT 121809#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF (0x3<<14)1810#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_SHIFT 141811 u8 __tx_dest;1812 u8 __agg_val8_th;1813#endif1814 u32 ack_to_far_end;1815 u32 rto_timer;1816 u32 ka_timer;1817 u32 ts_to_echo;1818#if defined(__BIG_ENDIAN)1819 u16 __agg_val7_th;1820 u16 __agg_val7;1821#elif defined(__LITTLE_ENDIAN)1822 u16 __agg_val7;1823 u16 __agg_val7_th;1824#endif1825#if defined(__BIG_ENDIAN)1826 u8 __tcp_agg_vars5;1827 u8 __tcp_agg_vars4;1828 u8 __tcp_agg_vars3;1829 u8 __force_pure_ack_cnt;1830#elif defined(__LITTLE_ENDIAN)1831 u8 __force_pure_ack_cnt;1832 u8 __tcp_agg_vars3;1833 u8 __tcp_agg_vars4;1834 u8 __tcp_agg_vars5;1835#endif1836 u32 tcp_agg_vars6;1837#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_CF_EN (0x1<<0)1838#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_CF_EN_SHIFT 01839#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_EN (0x1<<1)1840#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_EN_SHIFT 11841#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX9_CF_EN (0x1<<2)1842#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX9_CF_EN_SHIFT 21843#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN (0x1<<3)1844#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN_SHIFT 31845#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX6_FLAG (0x1<<4)1846#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX6_FLAG_SHIFT 41847#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX7_FLAG (0x1<<5)1848#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX7_FLAG_SHIFT 51849#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX5_CF (0x3<<6)1850#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX5_CF_SHIFT 61851#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX9_CF (0x3<<8)1852#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX9_CF_SHIFT 81853#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF (0x3<<10)1854#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_SHIFT 101855#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF (0x3<<12)1856#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF_SHIFT 121857#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF (0x3<<14)1858#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF_SHIFT 141859#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX13_CF (0x3<<16)1860#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX13_CF_SHIFT 161861#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX14_CF (0x3<<18)1862#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX14_CF_SHIFT 181863#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX15_CF (0x3<<20)1864#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX15_CF_SHIFT 201865#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX16_CF (0x3<<22)1866#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX16_CF_SHIFT 221867#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX17_CF (0x3<<24)1868#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX17_CF_SHIFT 241869#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ECE_FLAG (0x1<<26)1870#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ECE_FLAG_SHIFT 261871#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED71 (0x1<<27)1872#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED71_SHIFT 271873#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_FORCE_PURE_ACK_CNT_DIRTY (0x1<<28)1874#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_FORCE_PURE_ACK_CNT_DIRTY_SHIFT 281875#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TCP_AUTO_STOP_FLAG (0x1<<29)1876#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TCP_AUTO_STOP_FLAG_SHIFT 291877#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DO_TS_UPDATE_FLAG (0x1<<30)1878#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DO_TS_UPDATE_FLAG_SHIFT 301879#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_CANCEL_RETRANSMIT_FLAG (0x1<<31)1880#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_CANCEL_RETRANSMIT_FLAG_SHIFT 311881#if defined(__BIG_ENDIAN)1882 u16 __agg_misc6;1883 u16 __tcp_agg_vars7;1884#elif defined(__LITTLE_ENDIAN)1885 u16 __tcp_agg_vars7;1886 u16 __agg_misc6;1887#endif1888 u32 __agg_val10;1889 u32 __agg_val10_th;1890#if defined(__BIG_ENDIAN)1891 u16 __reserved3;1892 u8 __reserved2;1893 u8 __da_only_cnt;1894#elif defined(__LITTLE_ENDIAN)1895 u8 __da_only_cnt;1896 u8 __reserved2;1897 u16 __reserved3;1898#endif1899};1900 1901/*1902 * The iscsi aggregative context of Xstorm1903 */1904struct xstorm_iscsi_ag_context {1905#if defined(__BIG_ENDIAN)1906 u16 agg_val1;1907 u8 agg_vars1;1908#define __XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)1909#define __XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 01910#define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)1911#define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 11912#define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)1913#define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 21914#define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)1915#define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 31916#define __XSTORM_ISCSI_AG_CONTEXT_MORE_TO_SEND_EN (0x1<<4)1917#define __XSTORM_ISCSI_AG_CONTEXT_MORE_TO_SEND_EN_SHIFT 41918#define XSTORM_ISCSI_AG_CONTEXT_NAGLE_EN (0x1<<5)1919#define XSTORM_ISCSI_AG_CONTEXT_NAGLE_EN_SHIFT 51920#define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG (0x1<<6)1921#define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_SHIFT 61922#define __XSTORM_ISCSI_AG_CONTEXT_UNA_GT_NXT_EN (0x1<<7)1923#define __XSTORM_ISCSI_AG_CONTEXT_UNA_GT_NXT_EN_SHIFT 71924 u8 state;1925#elif defined(__LITTLE_ENDIAN)1926 u8 state;1927 u8 agg_vars1;1928#define __XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)1929#define __XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 01930#define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)1931#define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 11932#define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)1933#define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 21934#define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)1935#define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 31936#define __XSTORM_ISCSI_AG_CONTEXT_MORE_TO_SEND_EN (0x1<<4)1937#define __XSTORM_ISCSI_AG_CONTEXT_MORE_TO_SEND_EN_SHIFT 41938#define XSTORM_ISCSI_AG_CONTEXT_NAGLE_EN (0x1<<5)1939#define XSTORM_ISCSI_AG_CONTEXT_NAGLE_EN_SHIFT 51940#define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG (0x1<<6)1941#define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_SHIFT 61942#define __XSTORM_ISCSI_AG_CONTEXT_UNA_GT_NXT_EN (0x1<<7)1943#define __XSTORM_ISCSI_AG_CONTEXT_UNA_GT_NXT_EN_SHIFT 71944 u16 agg_val1;1945#endif1946#if defined(__BIG_ENDIAN)1947 u8 cdu_reserved;1948 u8 __agg_vars4;1949 u8 agg_vars3;1950#define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM2 (0x3F<<0)1951#define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM2_SHIFT 01952#define __XSTORM_ISCSI_AG_CONTEXT_RX_TS_EN_CF (0x3<<6)1953#define __XSTORM_ISCSI_AG_CONTEXT_RX_TS_EN_CF_SHIFT 61954 u8 agg_vars2;1955#define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF (0x3<<0)1956#define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_SHIFT 01957#define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_EN (0x1<<2)1958#define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_EN_SHIFT 21959#define __XSTORM_ISCSI_AG_CONTEXT_AUX8_FLAG (0x1<<3)1960#define __XSTORM_ISCSI_AG_CONTEXT_AUX8_FLAG_SHIFT 31961#define __XSTORM_ISCSI_AG_CONTEXT_AUX9_FLAG (0x1<<4)1962#define __XSTORM_ISCSI_AG_CONTEXT_AUX9_FLAG_SHIFT 41963#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE1 (0x3<<5)1964#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE1_SHIFT 51965#define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7)1966#define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 71967#elif defined(__LITTLE_ENDIAN)1968 u8 agg_vars2;1969#define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF (0x3<<0)1970#define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_SHIFT 01971#define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_EN (0x1<<2)1972#define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_EN_SHIFT 21973#define __XSTORM_ISCSI_AG_CONTEXT_AUX8_FLAG (0x1<<3)1974#define __XSTORM_ISCSI_AG_CONTEXT_AUX8_FLAG_SHIFT 31975#define __XSTORM_ISCSI_AG_CONTEXT_AUX9_FLAG (0x1<<4)1976#define __XSTORM_ISCSI_AG_CONTEXT_AUX9_FLAG_SHIFT 41977#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE1 (0x3<<5)1978#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE1_SHIFT 51979#define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7)1980#define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 71981 u8 agg_vars3;1982#define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM2 (0x3F<<0)1983#define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM2_SHIFT 01984#define __XSTORM_ISCSI_AG_CONTEXT_RX_TS_EN_CF (0x3<<6)1985#define __XSTORM_ISCSI_AG_CONTEXT_RX_TS_EN_CF_SHIFT 61986 u8 __agg_vars4;1987 u8 cdu_reserved;1988#endif1989 u32 more_to_send;1990#if defined(__BIG_ENDIAN)1991 u16 agg_vars5;1992#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE5 (0x3<<0)1993#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE5_SHIFT 01994#define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM0 (0x3F<<2)1995#define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM0_SHIFT 21996#define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM1 (0x3F<<8)1997#define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM1_SHIFT 81998#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE2 (0x3<<14)1999#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE2_SHIFT 142000 u16 sq_cons;2001#elif defined(__LITTLE_ENDIAN)2002 u16 sq_cons;2003 u16 agg_vars5;2004#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE5 (0x3<<0)2005#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE5_SHIFT 02006#define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM0 (0x3F<<2)2007#define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM0_SHIFT 22008#define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM1 (0x3F<<8)2009#define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM1_SHIFT 82010#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE2 (0x3<<14)2011#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE2_SHIFT 142012#endif2013 struct xstorm_tcp_tcp_ag_context_section tcp;2014#if defined(__BIG_ENDIAN)2015 u16 agg_vars7;2016#define __XSTORM_ISCSI_AG_CONTEXT_AGG_VAL11_DECISION_RULE (0x7<<0)2017#define __XSTORM_ISCSI_AG_CONTEXT_AGG_VAL11_DECISION_RULE_SHIFT 02018#define __XSTORM_ISCSI_AG_CONTEXT_AUX13_FLAG (0x1<<3)2019#define __XSTORM_ISCSI_AG_CONTEXT_AUX13_FLAG_SHIFT 32020#define __XSTORM_ISCSI_AG_CONTEXT_STORMS_SYNC_CF (0x3<<4)2021#define __XSTORM_ISCSI_AG_CONTEXT_STORMS_SYNC_CF_SHIFT 42022#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE3 (0x3<<6)2023#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE3_SHIFT 62024#define XSTORM_ISCSI_AG_CONTEXT_AUX1_CF (0x3<<8)2025#define XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_SHIFT 82026#define __XSTORM_ISCSI_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK (0x1<<10)2027#define __XSTORM_ISCSI_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK_SHIFT 102028#define __XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN (0x1<<11)2029#define __XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN_SHIFT 112030#define __XSTORM_ISCSI_AG_CONTEXT_AUX10_FLAG (0x1<<12)2031#define __XSTORM_ISCSI_AG_CONTEXT_AUX10_FLAG_SHIFT 122032#define __XSTORM_ISCSI_AG_CONTEXT_AUX11_FLAG (0x1<<13)2033#define __XSTORM_ISCSI_AG_CONTEXT_AUX11_FLAG_SHIFT 132034#define __XSTORM_ISCSI_AG_CONTEXT_AUX12_FLAG (0x1<<14)2035#define __XSTORM_ISCSI_AG_CONTEXT_AUX12_FLAG_SHIFT 142036#define __XSTORM_ISCSI_AG_CONTEXT_RX_WND_SCL_EN (0x1<<15)2037#define __XSTORM_ISCSI_AG_CONTEXT_RX_WND_SCL_EN_SHIFT 152038 u8 agg_val3_th;2039 u8 agg_vars6;2040#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE6 (0x7<<0)2041#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE6_SHIFT 02042#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE7 (0x7<<3)2043#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE7_SHIFT 32044#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE4 (0x3<<6)2045#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE4_SHIFT 62046#elif defined(__LITTLE_ENDIAN)2047 u8 agg_vars6;2048#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE6 (0x7<<0)2049#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE6_SHIFT 02050#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE7 (0x7<<3)2051#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE7_SHIFT 32052#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE4 (0x3<<6)2053#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE4_SHIFT 62054 u8 agg_val3_th;2055 u16 agg_vars7;2056#define __XSTORM_ISCSI_AG_CONTEXT_AGG_VAL11_DECISION_RULE (0x7<<0)2057#define __XSTORM_ISCSI_AG_CONTEXT_AGG_VAL11_DECISION_RULE_SHIFT 02058#define __XSTORM_ISCSI_AG_CONTEXT_AUX13_FLAG (0x1<<3)2059#define __XSTORM_ISCSI_AG_CONTEXT_AUX13_FLAG_SHIFT 32060#define __XSTORM_ISCSI_AG_CONTEXT_STORMS_SYNC_CF (0x3<<4)2061#define __XSTORM_ISCSI_AG_CONTEXT_STORMS_SYNC_CF_SHIFT 42062#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE3 (0x3<<6)2063#define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE3_SHIFT 62064#define XSTORM_ISCSI_AG_CONTEXT_AUX1_CF (0x3<<8)2065#define XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_SHIFT 82066#define __XSTORM_ISCSI_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK (0x1<<10)2067#define __XSTORM_ISCSI_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK_SHIFT 102068#define __XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN (0x1<<11)2069#define __XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN_SHIFT 112070#define __XSTORM_ISCSI_AG_CONTEXT_AUX10_FLAG (0x1<<12)2071#define __XSTORM_ISCSI_AG_CONTEXT_AUX10_FLAG_SHIFT 122072#define __XSTORM_ISCSI_AG_CONTEXT_AUX11_FLAG (0x1<<13)2073#define __XSTORM_ISCSI_AG_CONTEXT_AUX11_FLAG_SHIFT 132074#define __XSTORM_ISCSI_AG_CONTEXT_AUX12_FLAG (0x1<<14)2075#define __XSTORM_ISCSI_AG_CONTEXT_AUX12_FLAG_SHIFT 142076#define __XSTORM_ISCSI_AG_CONTEXT_RX_WND_SCL_EN (0x1<<15)2077#define __XSTORM_ISCSI_AG_CONTEXT_RX_WND_SCL_EN_SHIFT 152078#endif2079#if defined(__BIG_ENDIAN)2080 u16 __agg_val11_th;2081 u16 __gen_data;2082#elif defined(__LITTLE_ENDIAN)2083 u16 __gen_data;2084 u16 __agg_val11_th;2085#endif2086#if defined(__BIG_ENDIAN)2087 u8 __reserved1;2088 u8 __agg_val6_th;2089 u16 __agg_val9;2090#elif defined(__LITTLE_ENDIAN)2091 u16 __agg_val9;2092 u8 __agg_val6_th;2093 u8 __reserved1;2094#endif2095#if defined(__BIG_ENDIAN)2096 u16 hq_prod;2097 u16 hq_cons;2098#elif defined(__LITTLE_ENDIAN)2099 u16 hq_cons;2100 u16 hq_prod;2101#endif2102 u32 agg_vars8;2103#define XSTORM_ISCSI_AG_CONTEXT_AGG_MISC2 (0xFFFFFF<<0)2104#define XSTORM_ISCSI_AG_CONTEXT_AGG_MISC2_SHIFT 02105#define XSTORM_ISCSI_AG_CONTEXT_AGG_MISC3 (0xFF<<24)2106#define XSTORM_ISCSI_AG_CONTEXT_AGG_MISC3_SHIFT 242107#if defined(__BIG_ENDIAN)2108 u16 r2tq_prod;2109 u16 sq_prod;2110#elif defined(__LITTLE_ENDIAN)2111 u16 sq_prod;2112 u16 r2tq_prod;2113#endif2114#if defined(__BIG_ENDIAN)2115 u8 agg_val3;2116 u8 agg_val6;2117 u8 agg_val5_th;2118 u8 agg_val5;2119#elif defined(__LITTLE_ENDIAN)2120 u8 agg_val5;2121 u8 agg_val5_th;2122 u8 agg_val6;2123 u8 agg_val3;2124#endif2125#if defined(__BIG_ENDIAN)2126 u16 __agg_misc1;2127 u16 agg_limit1;2128#elif defined(__LITTLE_ENDIAN)2129 u16 agg_limit1;2130 u16 __agg_misc1;2131#endif2132 u32 hq_cons_tcp_seq;2133 u32 exp_stat_sn;2134 u32 rst_seq_num;2135};2136 2137 2138/*2139 * The L5cm aggregative context of XStorm2140 */2141struct xstorm_l5cm_ag_context {2142#if defined(__BIG_ENDIAN)2143 u16 agg_val1;2144 u8 agg_vars1;2145#define __XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)2146#define __XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 02147#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)2148#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 12149#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)2150#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 22151#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)2152#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 32153#define __XSTORM_L5CM_AG_CONTEXT_MORE_TO_SEND_EN (0x1<<4)2154#define __XSTORM_L5CM_AG_CONTEXT_MORE_TO_SEND_EN_SHIFT 42155#define XSTORM_L5CM_AG_CONTEXT_NAGLE_EN (0x1<<5)2156#define XSTORM_L5CM_AG_CONTEXT_NAGLE_EN_SHIFT 52157#define __XSTORM_L5CM_AG_CONTEXT_DQ_SPARE_FLAG (0x1<<6)2158#define __XSTORM_L5CM_AG_CONTEXT_DQ_SPARE_FLAG_SHIFT 62159#define __XSTORM_L5CM_AG_CONTEXT_UNA_GT_NXT_EN (0x1<<7)2160#define __XSTORM_L5CM_AG_CONTEXT_UNA_GT_NXT_EN_SHIFT 72161 u8 state;2162#elif defined(__LITTLE_ENDIAN)2163 u8 state;2164 u8 agg_vars1;2165#define __XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0)2166#define __XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 02167#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1)2168#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 12169#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2)2170#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 22171#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3)2172#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 32173#define __XSTORM_L5CM_AG_CONTEXT_MORE_TO_SEND_EN (0x1<<4)2174#define __XSTORM_L5CM_AG_CONTEXT_MORE_TO_SEND_EN_SHIFT 42175#define XSTORM_L5CM_AG_CONTEXT_NAGLE_EN (0x1<<5)2176#define XSTORM_L5CM_AG_CONTEXT_NAGLE_EN_SHIFT 52177#define __XSTORM_L5CM_AG_CONTEXT_DQ_SPARE_FLAG (0x1<<6)2178#define __XSTORM_L5CM_AG_CONTEXT_DQ_SPARE_FLAG_SHIFT 62179#define __XSTORM_L5CM_AG_CONTEXT_UNA_GT_NXT_EN (0x1<<7)2180#define __XSTORM_L5CM_AG_CONTEXT_UNA_GT_NXT_EN_SHIFT 72181 u16 agg_val1;2182#endif2183#if defined(__BIG_ENDIAN)2184 u8 cdu_reserved;2185 u8 __agg_vars4;2186 u8 agg_vars3;2187#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM2 (0x3F<<0)2188#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM2_SHIFT 02189#define __XSTORM_L5CM_AG_CONTEXT_RX_TS_EN_CF (0x3<<6)2190#define __XSTORM_L5CM_AG_CONTEXT_RX_TS_EN_CF_SHIFT 62191 u8 agg_vars2;2192#define XSTORM_L5CM_AG_CONTEXT_AUX4_CF (0x3<<0)2193#define XSTORM_L5CM_AG_CONTEXT_AUX4_CF_SHIFT 02194#define __XSTORM_L5CM_AG_CONTEXT_DQ_SPARE_FLAG_EN (0x1<<2)2195#define __XSTORM_L5CM_AG_CONTEXT_DQ_SPARE_FLAG_EN_SHIFT 22196#define __XSTORM_L5CM_AG_CONTEXT_AUX8_FLAG (0x1<<3)2197#define __XSTORM_L5CM_AG_CONTEXT_AUX8_FLAG_SHIFT 32198#define __XSTORM_L5CM_AG_CONTEXT_AUX9_FLAG (0x1<<4)2199#define __XSTORM_L5CM_AG_CONTEXT_AUX9_FLAG_SHIFT 42200#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE1 (0x3<<5)2201#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE1_SHIFT 52202#define XSTORM_L5CM_AG_CONTEXT_AUX4_CF_EN (0x1<<7)2203#define XSTORM_L5CM_AG_CONTEXT_AUX4_CF_EN_SHIFT 72204#elif defined(__LITTLE_ENDIAN)2205 u8 agg_vars2;2206#define XSTORM_L5CM_AG_CONTEXT_AUX4_CF (0x3<<0)2207#define XSTORM_L5CM_AG_CONTEXT_AUX4_CF_SHIFT 02208#define __XSTORM_L5CM_AG_CONTEXT_DQ_SPARE_FLAG_EN (0x1<<2)2209#define __XSTORM_L5CM_AG_CONTEXT_DQ_SPARE_FLAG_EN_SHIFT 22210#define __XSTORM_L5CM_AG_CONTEXT_AUX8_FLAG (0x1<<3)2211#define __XSTORM_L5CM_AG_CONTEXT_AUX8_FLAG_SHIFT 32212#define __XSTORM_L5CM_AG_CONTEXT_AUX9_FLAG (0x1<<4)2213#define __XSTORM_L5CM_AG_CONTEXT_AUX9_FLAG_SHIFT 42214#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE1 (0x3<<5)2215#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE1_SHIFT 52216#define XSTORM_L5CM_AG_CONTEXT_AUX4_CF_EN (0x1<<7)2217#define XSTORM_L5CM_AG_CONTEXT_AUX4_CF_EN_SHIFT 72218 u8 agg_vars3;2219#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM2 (0x3F<<0)2220#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM2_SHIFT 02221#define __XSTORM_L5CM_AG_CONTEXT_RX_TS_EN_CF (0x3<<6)2222#define __XSTORM_L5CM_AG_CONTEXT_RX_TS_EN_CF_SHIFT 62223 u8 __agg_vars4;2224 u8 cdu_reserved;2225#endif2226 u32 more_to_send;2227#if defined(__BIG_ENDIAN)2228 u16 agg_vars5;2229#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE5 (0x3<<0)2230#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE5_SHIFT 02231#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM0 (0x3F<<2)2232#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM0_SHIFT 22233#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM1 (0x3F<<8)2234#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM1_SHIFT 82235#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE2 (0x3<<14)2236#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE2_SHIFT 142237 u16 agg_val4_th;2238#elif defined(__LITTLE_ENDIAN)2239 u16 agg_val4_th;2240 u16 agg_vars5;2241#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE5 (0x3<<0)2242#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE5_SHIFT 02243#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM0 (0x3F<<2)2244#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM0_SHIFT 22245#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM1 (0x3F<<8)2246#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM1_SHIFT 82247#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE2 (0x3<<14)2248#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE2_SHIFT 142249#endif2250 struct xstorm_tcp_tcp_ag_context_section tcp;2251#if defined(__BIG_ENDIAN)2252 u16 agg_vars7;2253#define __XSTORM_L5CM_AG_CONTEXT_AGG_VAL11_DECISION_RULE (0x7<<0)2254#define __XSTORM_L5CM_AG_CONTEXT_AGG_VAL11_DECISION_RULE_SHIFT 02255#define __XSTORM_L5CM_AG_CONTEXT_AUX13_FLAG (0x1<<3)2256#define __XSTORM_L5CM_AG_CONTEXT_AUX13_FLAG_SHIFT 32257#define __XSTORM_L5CM_AG_CONTEXT_STORMS_SYNC_CF (0x3<<4)2258#define __XSTORM_L5CM_AG_CONTEXT_STORMS_SYNC_CF_SHIFT 42259#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE3 (0x3<<6)2260#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE3_SHIFT 62261#define XSTORM_L5CM_AG_CONTEXT_AUX1_CF (0x3<<8)2262#define XSTORM_L5CM_AG_CONTEXT_AUX1_CF_SHIFT 82263#define __XSTORM_L5CM_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK (0x1<<10)2264#define __XSTORM_L5CM_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK_SHIFT 102265#define __XSTORM_L5CM_AG_CONTEXT_AUX1_CF_EN (0x1<<11)2266#define __XSTORM_L5CM_AG_CONTEXT_AUX1_CF_EN_SHIFT 112267#define __XSTORM_L5CM_AG_CONTEXT_AUX10_FLAG (0x1<<12)2268#define __XSTORM_L5CM_AG_CONTEXT_AUX10_FLAG_SHIFT 122269#define __XSTORM_L5CM_AG_CONTEXT_AUX11_FLAG (0x1<<13)2270#define __XSTORM_L5CM_AG_CONTEXT_AUX11_FLAG_SHIFT 132271#define __XSTORM_L5CM_AG_CONTEXT_AUX12_FLAG (0x1<<14)2272#define __XSTORM_L5CM_AG_CONTEXT_AUX12_FLAG_SHIFT 142273#define __XSTORM_L5CM_AG_CONTEXT_RX_WND_SCL_EN (0x1<<15)2274#define __XSTORM_L5CM_AG_CONTEXT_RX_WND_SCL_EN_SHIFT 152275 u8 agg_val3_th;2276 u8 agg_vars6;2277#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE6 (0x7<<0)2278#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE6_SHIFT 02279#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE7 (0x7<<3)2280#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE7_SHIFT 32281#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE4 (0x3<<6)2282#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE4_SHIFT 62283#elif defined(__LITTLE_ENDIAN)2284 u8 agg_vars6;2285#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE6 (0x7<<0)2286#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE6_SHIFT 02287#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE7 (0x7<<3)2288#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE7_SHIFT 32289#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE4 (0x3<<6)2290#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE4_SHIFT 62291 u8 agg_val3_th;2292 u16 agg_vars7;2293#define __XSTORM_L5CM_AG_CONTEXT_AGG_VAL11_DECISION_RULE (0x7<<0)2294#define __XSTORM_L5CM_AG_CONTEXT_AGG_VAL11_DECISION_RULE_SHIFT 02295#define __XSTORM_L5CM_AG_CONTEXT_AUX13_FLAG (0x1<<3)2296#define __XSTORM_L5CM_AG_CONTEXT_AUX13_FLAG_SHIFT 32297#define __XSTORM_L5CM_AG_CONTEXT_STORMS_SYNC_CF (0x3<<4)2298#define __XSTORM_L5CM_AG_CONTEXT_STORMS_SYNC_CF_SHIFT 42299#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE3 (0x3<<6)2300#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE3_SHIFT 62301#define XSTORM_L5CM_AG_CONTEXT_AUX1_CF (0x3<<8)2302#define XSTORM_L5CM_AG_CONTEXT_AUX1_CF_SHIFT 82303#define __XSTORM_L5CM_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK (0x1<<10)2304#define __XSTORM_L5CM_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK_SHIFT 102305#define __XSTORM_L5CM_AG_CONTEXT_AUX1_CF_EN (0x1<<11)2306#define __XSTORM_L5CM_AG_CONTEXT_AUX1_CF_EN_SHIFT 112307#define __XSTORM_L5CM_AG_CONTEXT_AUX10_FLAG (0x1<<12)2308#define __XSTORM_L5CM_AG_CONTEXT_AUX10_FLAG_SHIFT 122309#define __XSTORM_L5CM_AG_CONTEXT_AUX11_FLAG (0x1<<13)2310#define __XSTORM_L5CM_AG_CONTEXT_AUX11_FLAG_SHIFT 132311#define __XSTORM_L5CM_AG_CONTEXT_AUX12_FLAG (0x1<<14)2312#define __XSTORM_L5CM_AG_CONTEXT_AUX12_FLAG_SHIFT 142313#define __XSTORM_L5CM_AG_CONTEXT_RX_WND_SCL_EN (0x1<<15)2314#define __XSTORM_L5CM_AG_CONTEXT_RX_WND_SCL_EN_SHIFT 152315#endif2316#if defined(__BIG_ENDIAN)2317 u16 __agg_val11_th;2318 u16 __gen_data;2319#elif defined(__LITTLE_ENDIAN)2320 u16 __gen_data;2321 u16 __agg_val11_th;2322#endif2323#if defined(__BIG_ENDIAN)2324 u8 __reserved1;2325 u8 __agg_val6_th;2326 u16 __agg_val9;2327#elif defined(__LITTLE_ENDIAN)2328 u16 __agg_val9;2329 u8 __agg_val6_th;2330 u8 __reserved1;2331#endif2332#if defined(__BIG_ENDIAN)2333 u16 agg_val2_th;2334 u16 agg_val2;2335#elif defined(__LITTLE_ENDIAN)2336 u16 agg_val2;2337 u16 agg_val2_th;2338#endif2339 u32 agg_vars8;2340#define XSTORM_L5CM_AG_CONTEXT_AGG_MISC2 (0xFFFFFF<<0)2341#define XSTORM_L5CM_AG_CONTEXT_AGG_MISC2_SHIFT 02342#define XSTORM_L5CM_AG_CONTEXT_AGG_MISC3 (0xFF<<24)2343#define XSTORM_L5CM_AG_CONTEXT_AGG_MISC3_SHIFT 242344#if defined(__BIG_ENDIAN)2345 u16 agg_misc0;2346 u16 agg_val4;2347#elif defined(__LITTLE_ENDIAN)2348 u16 agg_val4;2349 u16 agg_misc0;2350#endif2351#if defined(__BIG_ENDIAN)2352 u8 agg_val3;2353 u8 agg_val6;2354 u8 agg_val5_th;2355 u8 agg_val5;2356#elif defined(__LITTLE_ENDIAN)2357 u8 agg_val5;2358 u8 agg_val5_th;2359 u8 agg_val6;2360 u8 agg_val3;2361#endif2362#if defined(__BIG_ENDIAN)2363 u16 __agg_misc1;2364 u16 agg_limit1;2365#elif defined(__LITTLE_ENDIAN)2366 u16 agg_limit1;2367 u16 __agg_misc1;2368#endif2369 u32 completion_seq;2370 u32 agg_misc4;2371 u32 rst_seq_num;2372};2373 2374/*2375 * ABTS info $$KEEP_ENDIANNESS$$2376 */2377struct fcoe_abts_info {2378 __le16 aborted_task_id;2379 __le16 reserved0;2380 __le32 reserved1;2381};2382 2383 2384/*2385 * Fixed size structure in order to plant it in Union structure2386 * $$KEEP_ENDIANNESS$$2387 */2388struct fcoe_abts_rsp_union {2389 u8 r_ctl;2390 u8 rsrv[3];2391 __le32 abts_rsp_payload[7];2392};2393 2394 2395/*2396 * 4 regs size $$KEEP_ENDIANNESS$$2397 */2398struct fcoe_bd_ctx {2399 __le32 buf_addr_hi;2400 __le32 buf_addr_lo;2401 __le16 buf_len;2402 __le16 rsrv0;2403 __le16 flags;2404 __le16 rsrv1;2405};2406 2407 2408/*2409 * FCoE cached sges context $$KEEP_ENDIANNESS$$2410 */2411struct fcoe_cached_sge_ctx {2412 struct regpair cur_buf_addr;2413 __le16 cur_buf_rem;2414 __le16 second_buf_rem;2415 struct regpair second_buf_addr;2416};2417 2418 2419/*2420 * Cleanup info $$KEEP_ENDIANNESS$$2421 */2422struct fcoe_cleanup_info {2423 __le16 cleaned_task_id;2424 __le16 rolled_tx_seq_cnt;2425 __le32 rolled_tx_data_offset;2426};2427 2428 2429/*2430 * Fcp RSP flags $$KEEP_ENDIANNESS$$2431 */2432struct fcoe_fcp_rsp_flags {2433 u8 flags;2434#define FCOE_FCP_RSP_FLAGS_FCP_RSP_LEN_VALID (0x1<<0)2435#define FCOE_FCP_RSP_FLAGS_FCP_RSP_LEN_VALID_SHIFT 02436#define FCOE_FCP_RSP_FLAGS_FCP_SNS_LEN_VALID (0x1<<1)2437#define FCOE_FCP_RSP_FLAGS_FCP_SNS_LEN_VALID_SHIFT 12438#define FCOE_FCP_RSP_FLAGS_FCP_RESID_OVER (0x1<<2)2439#define FCOE_FCP_RSP_FLAGS_FCP_RESID_OVER_SHIFT 22440#define FCOE_FCP_RSP_FLAGS_FCP_RESID_UNDER (0x1<<3)2441#define FCOE_FCP_RSP_FLAGS_FCP_RESID_UNDER_SHIFT 32442#define FCOE_FCP_RSP_FLAGS_FCP_CONF_REQ (0x1<<4)2443#define FCOE_FCP_RSP_FLAGS_FCP_CONF_REQ_SHIFT 42444#define FCOE_FCP_RSP_FLAGS_FCP_BIDI_FLAGS (0x7<<5)2445#define FCOE_FCP_RSP_FLAGS_FCP_BIDI_FLAGS_SHIFT 52446};2447 2448/*2449 * Fcp RSP payload $$KEEP_ENDIANNESS$$2450 */2451struct fcoe_fcp_rsp_payload {2452 struct regpair reserved0;2453 __le32 fcp_resid;2454 u8 scsi_status_code;2455 struct fcoe_fcp_rsp_flags fcp_flags;2456 __le16 retry_delay_timer;2457 __le32 fcp_rsp_len;2458 __le32 fcp_sns_len;2459};2460 2461/*2462 * Fixed size structure in order to plant it in Union structure2463 * $$KEEP_ENDIANNESS$$2464 */2465struct fcoe_fcp_rsp_union {2466 struct fcoe_fcp_rsp_payload payload;2467 struct regpair reserved0;2468};2469 2470/*2471 * FC header $$KEEP_ENDIANNESS$$2472 */2473struct fcoe_fc_hdr {2474 u8 s_id[3];2475 u8 cs_ctl;2476 u8 d_id[3];2477 u8 r_ctl;2478 __le16 seq_cnt;2479 u8 df_ctl;2480 u8 seq_id;2481 u8 f_ctl[3];2482 u8 type;2483 __le32 parameters;2484 __le16 rx_id;2485 __le16 ox_id;2486};2487 2488/*2489 * FC header union $$KEEP_ENDIANNESS$$2490 */2491struct fcoe_mp_rsp_union {2492 struct fcoe_fc_hdr fc_hdr;2493 __le32 mp_payload_len;2494 __le32 rsrv;2495};2496 2497/*2498 * Completion information $$KEEP_ENDIANNESS$$2499 */2500union fcoe_comp_flow_info {2501 struct fcoe_fcp_rsp_union fcp_rsp;2502 struct fcoe_abts_rsp_union abts_rsp;2503 struct fcoe_mp_rsp_union mp_rsp;2504 __le32 opaque[8];2505};2506 2507 2508/*2509 * External ABTS info $$KEEP_ENDIANNESS$$2510 */2511struct fcoe_ext_abts_info {2512 __le32 rsrv0[6];2513 struct fcoe_abts_info ctx;2514};2515 2516 2517/*2518 * External cleanup info $$KEEP_ENDIANNESS$$2519 */2520struct fcoe_ext_cleanup_info {2521 __le32 rsrv0[6];2522 struct fcoe_cleanup_info ctx;2523};2524 2525 2526/*2527 * Fcoe FW Tx sequence context $$KEEP_ENDIANNESS$$2528 */2529struct fcoe_fw_tx_seq_ctx {2530 __le32 data_offset;2531 __le16 seq_cnt;2532 __le16 rsrv0;2533};2534 2535/*2536 * Fcoe external FW Tx sequence context $$KEEP_ENDIANNESS$$2537 */2538struct fcoe_ext_fw_tx_seq_ctx {2539 __le32 rsrv0[6];2540 struct fcoe_fw_tx_seq_ctx ctx;2541};2542 2543 2544/*2545 * FCoE multiple sges context $$KEEP_ENDIANNESS$$2546 */2547struct fcoe_mul_sges_ctx {2548 struct regpair cur_sge_addr;2549 __le16 cur_sge_off;2550 u8 cur_sge_idx;2551 u8 sgl_size;2552};2553 2554/*2555 * FCoE external multiple sges context $$KEEP_ENDIANNESS$$2556 */2557struct fcoe_ext_mul_sges_ctx {2558 struct fcoe_mul_sges_ctx mul_sgl;2559 struct regpair rsrv0;2560};2561 2562 2563/*2564 * FCP CMD payload $$KEEP_ENDIANNESS$$2565 */2566struct fcoe_fcp_cmd_payload {2567 __le32 opaque[8];2568};2569 2570 2571 2572 2573 2574/*2575 * Fcp xfr rdy payload $$KEEP_ENDIANNESS$$2576 */2577struct fcoe_fcp_xfr_rdy_payload {2578 __le32 burst_len;2579 __le32 data_ro;2580};2581 2582 2583/*2584 * FC frame $$KEEP_ENDIANNESS$$2585 */2586struct fcoe_fc_frame {2587 struct fcoe_fc_hdr fc_hdr;2588 __le32 reserved0[2];2589};2590 2591 2592 2593 2594/*2595 * FCoE KCQ CQE parameters $$KEEP_ENDIANNESS$$2596 */2597union fcoe_kcqe_params {2598 __le32 reserved0[4];2599};2600 2601/*2602 * FCoE KCQ CQE $$KEEP_ENDIANNESS$$2603 */2604struct fcoe_kcqe {2605 __le32 fcoe_conn_id;2606 __le32 completion_status;2607 __le32 fcoe_conn_context_id;2608 union fcoe_kcqe_params params;2609 __le16 qe_self_seq;2610 u8 op_code;2611 u8 flags;2612#define FCOE_KCQE_RESERVED0 (0x7<<0)2613#define FCOE_KCQE_RESERVED0_SHIFT 02614#define FCOE_KCQE_RAMROD_COMPLETION (0x1<<3)2615#define FCOE_KCQE_RAMROD_COMPLETION_SHIFT 32616#define FCOE_KCQE_LAYER_CODE (0x7<<4)2617#define FCOE_KCQE_LAYER_CODE_SHIFT 42618#define FCOE_KCQE_LINKED_WITH_NEXT (0x1<<7)2619#define FCOE_KCQE_LINKED_WITH_NEXT_SHIFT 72620};2621 2622 2623 2624/*2625 * FCoE KWQE header $$KEEP_ENDIANNESS$$2626 */2627struct fcoe_kwqe_header {2628 u8 op_code;2629 u8 flags;2630#define FCOE_KWQE_HEADER_RESERVED0 (0xF<<0)2631#define FCOE_KWQE_HEADER_RESERVED0_SHIFT 02632#define FCOE_KWQE_HEADER_LAYER_CODE (0x7<<4)2633#define FCOE_KWQE_HEADER_LAYER_CODE_SHIFT 42634#define FCOE_KWQE_HEADER_RESERVED1 (0x1<<7)2635#define FCOE_KWQE_HEADER_RESERVED1_SHIFT 72636};2637 2638/*2639 * FCoE firmware init request 1 $$KEEP_ENDIANNESS$$2640 */2641struct fcoe_kwqe_init1 {2642 __le16 num_tasks;2643 struct fcoe_kwqe_header hdr;2644 __le32 task_list_pbl_addr_lo;2645 __le32 task_list_pbl_addr_hi;2646 __le32 dummy_buffer_addr_lo;2647 __le32 dummy_buffer_addr_hi;2648 __le16 sq_num_wqes;2649 __le16 rq_num_wqes;2650 __le16 rq_buffer_log_size;2651 __le16 cq_num_wqes;2652 __le16 mtu;2653 u8 num_sessions_log;2654 u8 flags;2655#define FCOE_KWQE_INIT1_LOG_PAGE_SIZE (0xF<<0)2656#define FCOE_KWQE_INIT1_LOG_PAGE_SIZE_SHIFT 02657#define FCOE_KWQE_INIT1_LOG_CACHED_PBES_PER_FUNC (0x7<<4)2658#define FCOE_KWQE_INIT1_LOG_CACHED_PBES_PER_FUNC_SHIFT 42659#define FCOE_KWQE_INIT1_RESERVED1 (0x1<<7)2660#define FCOE_KWQE_INIT1_RESERVED1_SHIFT 72661};2662 2663/*2664 * FCoE firmware init request 2 $$KEEP_ENDIANNESS$$2665 */2666struct fcoe_kwqe_init2 {2667 u8 hsi_major_version;2668 u8 hsi_minor_version;2669 struct fcoe_kwqe_header hdr;2670 __le32 hash_tbl_pbl_addr_lo;2671 __le32 hash_tbl_pbl_addr_hi;2672 __le32 t2_hash_tbl_addr_lo;2673 __le32 t2_hash_tbl_addr_hi;2674 __le32 t2_ptr_hash_tbl_addr_lo;2675 __le32 t2_ptr_hash_tbl_addr_hi;2676 __le32 free_list_count;2677};2678 2679/*2680 * FCoE firmware init request 3 $$KEEP_ENDIANNESS$$2681 */2682struct fcoe_kwqe_init3 {2683 __le16 reserved0;2684 struct fcoe_kwqe_header hdr;2685 __le32 error_bit_map_lo;2686 __le32 error_bit_map_hi;2687 u8 perf_config;2688 u8 reserved21[3];2689 __le32 reserved2[4];2690};2691 2692/*2693 * FCoE connection offload request 1 $$KEEP_ENDIANNESS$$2694 */2695struct fcoe_kwqe_conn_offload1 {2696 __le16 fcoe_conn_id;2697 struct fcoe_kwqe_header hdr;2698 __le32 sq_addr_lo;2699 __le32 sq_addr_hi;2700 __le32 rq_pbl_addr_lo;2701 __le32 rq_pbl_addr_hi;2702 __le32 rq_first_pbe_addr_lo;2703 __le32 rq_first_pbe_addr_hi;2704 __le16 rq_prod;2705 __le16 reserved0;2706};2707 2708/*2709 * FCoE connection offload request 2 $$KEEP_ENDIANNESS$$2710 */2711struct fcoe_kwqe_conn_offload2 {2712 __le16 tx_max_fc_pay_len;2713 struct fcoe_kwqe_header hdr;2714 __le32 cq_addr_lo;2715 __le32 cq_addr_hi;2716 __le32 xferq_addr_lo;2717 __le32 xferq_addr_hi;2718 __le32 conn_db_addr_lo;2719 __le32 conn_db_addr_hi;2720 __le32 reserved1;2721};2722 2723/*2724 * FCoE connection offload request 3 $$KEEP_ENDIANNESS$$2725 */2726struct fcoe_kwqe_conn_offload3 {2727 __le16 vlan_tag;2728#define FCOE_KWQE_CONN_OFFLOAD3_VLAN_ID (0xFFF<<0)2729#define FCOE_KWQE_CONN_OFFLOAD3_VLAN_ID_SHIFT 02730#define FCOE_KWQE_CONN_OFFLOAD3_CFI (0x1<<12)2731#define FCOE_KWQE_CONN_OFFLOAD3_CFI_SHIFT 122732#define FCOE_KWQE_CONN_OFFLOAD3_PRIORITY (0x7<<13)2733#define FCOE_KWQE_CONN_OFFLOAD3_PRIORITY_SHIFT 132734 struct fcoe_kwqe_header hdr;2735 u8 s_id[3];2736 u8 tx_max_conc_seqs_c3;2737 u8 d_id[3];2738 u8 flags;2739#define FCOE_KWQE_CONN_OFFLOAD3_B_MUL_N_PORT_IDS (0x1<<0)2740#define FCOE_KWQE_CONN_OFFLOAD3_B_MUL_N_PORT_IDS_SHIFT 02741#define FCOE_KWQE_CONN_OFFLOAD3_B_E_D_TOV_RES (0x1<<1)2742#define FCOE_KWQE_CONN_OFFLOAD3_B_E_D_TOV_RES_SHIFT 12743#define FCOE_KWQE_CONN_OFFLOAD3_B_CONT_INCR_SEQ_CNT (0x1<<2)2744#define FCOE_KWQE_CONN_OFFLOAD3_B_CONT_INCR_SEQ_CNT_SHIFT 22745#define FCOE_KWQE_CONN_OFFLOAD3_B_CONF_REQ (0x1<<3)2746#define FCOE_KWQE_CONN_OFFLOAD3_B_CONF_REQ_SHIFT 32747#define FCOE_KWQE_CONN_OFFLOAD3_B_REC_VALID (0x1<<4)2748#define FCOE_KWQE_CONN_OFFLOAD3_B_REC_VALID_SHIFT 42749#define FCOE_KWQE_CONN_OFFLOAD3_B_C2_VALID (0x1<<5)2750#define FCOE_KWQE_CONN_OFFLOAD3_B_C2_VALID_SHIFT 52751#define FCOE_KWQE_CONN_OFFLOAD3_B_ACK_0 (0x1<<6)2752#define FCOE_KWQE_CONN_OFFLOAD3_B_ACK_0_SHIFT 62753#define FCOE_KWQE_CONN_OFFLOAD3_B_VLAN_FLAG (0x1<<7)2754#define FCOE_KWQE_CONN_OFFLOAD3_B_VLAN_FLAG_SHIFT 72755 __le32 reserved;2756 __le32 confq_first_pbe_addr_lo;2757 __le32 confq_first_pbe_addr_hi;2758 __le16 tx_total_conc_seqs;2759 __le16 rx_max_fc_pay_len;2760 __le16 rx_total_conc_seqs;2761 u8 rx_max_conc_seqs_c3;2762 u8 rx_open_seqs_exch_c3;2763};2764 2765/*2766 * FCoE connection offload request 4 $$KEEP_ENDIANNESS$$2767 */2768struct fcoe_kwqe_conn_offload4 {2769 u8 e_d_tov_timer_val;2770 u8 reserved2;2771 struct fcoe_kwqe_header hdr;2772 u8 src_mac_addr_lo[2];2773 u8 src_mac_addr_mid[2];2774 u8 src_mac_addr_hi[2];2775 u8 dst_mac_addr_hi[2];2776 u8 dst_mac_addr_lo[2];2777 u8 dst_mac_addr_mid[2];2778 __le32 lcq_addr_lo;2779 __le32 lcq_addr_hi;2780 __le32 confq_pbl_base_addr_lo;2781 __le32 confq_pbl_base_addr_hi;2782};2783 2784/*2785 * FCoE connection enable request $$KEEP_ENDIANNESS$$2786 */2787struct fcoe_kwqe_conn_enable_disable {2788 __le16 reserved0;2789 struct fcoe_kwqe_header hdr;2790 u8 src_mac_addr_lo[2];2791 u8 src_mac_addr_mid[2];2792 u8 src_mac_addr_hi[2];2793 u16 vlan_tag;2794#define FCOE_KWQE_CONN_ENABLE_DISABLE_VLAN_ID (0xFFF<<0)2795#define FCOE_KWQE_CONN_ENABLE_DISABLE_VLAN_ID_SHIFT 02796#define FCOE_KWQE_CONN_ENABLE_DISABLE_CFI (0x1<<12)2797#define FCOE_KWQE_CONN_ENABLE_DISABLE_CFI_SHIFT 122798#define FCOE_KWQE_CONN_ENABLE_DISABLE_PRIORITY (0x7<<13)2799#define FCOE_KWQE_CONN_ENABLE_DISABLE_PRIORITY_SHIFT 132800 u8 dst_mac_addr_lo[2];2801 u8 dst_mac_addr_mid[2];2802 u8 dst_mac_addr_hi[2];2803 __le16 reserved1;2804 u8 s_id[3];2805 u8 vlan_flag;2806 u8 d_id[3];2807 u8 reserved3;2808 __le32 context_id;2809 __le32 conn_id;2810 __le32 reserved4;2811};2812 2813/*2814 * FCoE connection destroy request $$KEEP_ENDIANNESS$$2815 */2816struct fcoe_kwqe_conn_destroy {2817 __le16 reserved0;2818 struct fcoe_kwqe_header hdr;2819 __le32 context_id;2820 __le32 conn_id;2821 __le32 reserved1[5];2822};2823 2824/*2825 * FCoe destroy request $$KEEP_ENDIANNESS$$2826 */2827struct fcoe_kwqe_destroy {2828 __le16 reserved0;2829 struct fcoe_kwqe_header hdr;2830 __le32 reserved1[7];2831};2832 2833/*2834 * FCoe statistics request $$KEEP_ENDIANNESS$$2835 */2836struct fcoe_kwqe_stat {2837 __le16 reserved0;2838 struct fcoe_kwqe_header hdr;2839 __le32 stat_params_addr_lo;2840 __le32 stat_params_addr_hi;2841 __le32 reserved1[5];2842};2843 2844/*2845 * FCoE KWQ WQE $$KEEP_ENDIANNESS$$2846 */2847union fcoe_kwqe {2848 struct fcoe_kwqe_init1 init1;2849 struct fcoe_kwqe_init2 init2;2850 struct fcoe_kwqe_init3 init3;2851 struct fcoe_kwqe_conn_offload1 conn_offload1;2852 struct fcoe_kwqe_conn_offload2 conn_offload2;2853 struct fcoe_kwqe_conn_offload3 conn_offload3;2854 struct fcoe_kwqe_conn_offload4 conn_offload4;2855 struct fcoe_kwqe_conn_enable_disable conn_enable_disable;2856 struct fcoe_kwqe_conn_destroy conn_destroy;2857 struct fcoe_kwqe_destroy destroy;2858 struct fcoe_kwqe_stat statistics;2859};2860 2861 2862 2863 2864 2865 2866 2867 2868 2869 2870 2871 2872 2873 2874 2875 2876/*2877 * TX SGL context $$KEEP_ENDIANNESS$$2878 */2879union fcoe_sgl_union_ctx {2880 struct fcoe_cached_sge_ctx cached_sge;2881 struct fcoe_ext_mul_sges_ctx sgl;2882 __le32 opaque[5];2883};2884 2885/*2886 * Data-In/ELS/BLS information $$KEEP_ENDIANNESS$$2887 */2888struct fcoe_read_flow_info {2889 union fcoe_sgl_union_ctx sgl_ctx;2890 __le32 rsrv0[3];2891};2892 2893 2894/*2895 * Fcoe stat context $$KEEP_ENDIANNESS$$2896 */2897struct fcoe_s_stat_ctx {2898 u8 flags;2899#define FCOE_S_STAT_CTX_ACTIVE (0x1<<0)2900#define FCOE_S_STAT_CTX_ACTIVE_SHIFT 02901#define FCOE_S_STAT_CTX_ACK_ABORT_SEQ_COND (0x1<<1)2902#define FCOE_S_STAT_CTX_ACK_ABORT_SEQ_COND_SHIFT 12903#define FCOE_S_STAT_CTX_ABTS_PERFORMED (0x1<<2)2904#define FCOE_S_STAT_CTX_ABTS_PERFORMED_SHIFT 22905#define FCOE_S_STAT_CTX_SEQ_TIMEOUT (0x1<<3)2906#define FCOE_S_STAT_CTX_SEQ_TIMEOUT_SHIFT 32907#define FCOE_S_STAT_CTX_P_RJT (0x1<<4)2908#define FCOE_S_STAT_CTX_P_RJT_SHIFT 42909#define FCOE_S_STAT_CTX_ACK_EOFT (0x1<<5)2910#define FCOE_S_STAT_CTX_ACK_EOFT_SHIFT 52911#define FCOE_S_STAT_CTX_RSRV1 (0x3<<6)2912#define FCOE_S_STAT_CTX_RSRV1_SHIFT 62913};2914 2915/*2916 * Fcoe rx seq context $$KEEP_ENDIANNESS$$2917 */2918struct fcoe_rx_seq_ctx {2919 u8 seq_id;2920 struct fcoe_s_stat_ctx s_stat;2921 __le16 seq_cnt;2922 __le32 low_exp_ro;2923 __le32 high_exp_ro;2924};2925 2926 2927/*2928 * Fcoe rx_wr union context $$KEEP_ENDIANNESS$$2929 */2930union fcoe_rx_wr_union_ctx {2931 struct fcoe_read_flow_info read_info;2932 union fcoe_comp_flow_info comp_info;2933 __le32 opaque[8];2934};2935 2936 2937 2938/*2939 * FCoE SQ element $$KEEP_ENDIANNESS$$2940 */2941struct fcoe_sqe {2942 __le16 wqe;2943#define FCOE_SQE_TASK_ID (0x7FFF<<0)2944#define FCOE_SQE_TASK_ID_SHIFT 02945#define FCOE_SQE_TOGGLE_BIT (0x1<<15)2946#define FCOE_SQE_TOGGLE_BIT_SHIFT 152947};2948 2949 2950 2951/*2952 * 14 regs $$KEEP_ENDIANNESS$$2953 */2954struct fcoe_tce_tx_only {2955 union fcoe_sgl_union_ctx sgl_ctx;2956 __le32 rsrv0;2957};2958 2959/*2960 * 32 bytes (8 regs) used for TX only purposes $$KEEP_ENDIANNESS$$2961 */2962union fcoe_tx_wr_rx_rd_union_ctx {2963 struct fcoe_fc_frame tx_frame;2964 struct fcoe_fcp_cmd_payload fcp_cmd;2965 struct fcoe_ext_cleanup_info cleanup;2966 struct fcoe_ext_abts_info abts;2967 struct fcoe_ext_fw_tx_seq_ctx tx_seq;2968 __le32 opaque[8];2969};2970 2971/*2972 * tce_tx_wr_rx_rd_const $$KEEP_ENDIANNESS$$2973 */2974struct fcoe_tce_tx_wr_rx_rd_const {2975 u8 init_flags;2976#define FCOE_TCE_TX_WR_RX_RD_CONST_TASK_TYPE (0x7<<0)2977#define FCOE_TCE_TX_WR_RX_RD_CONST_TASK_TYPE_SHIFT 02978#define FCOE_TCE_TX_WR_RX_RD_CONST_DEV_TYPE (0x1<<3)2979#define FCOE_TCE_TX_WR_RX_RD_CONST_DEV_TYPE_SHIFT 32980#define FCOE_TCE_TX_WR_RX_RD_CONST_CLASS_TYPE (0x1<<4)2981#define FCOE_TCE_TX_WR_RX_RD_CONST_CLASS_TYPE_SHIFT 42982#define FCOE_TCE_TX_WR_RX_RD_CONST_CACHED_SGE (0x3<<5)2983#define FCOE_TCE_TX_WR_RX_RD_CONST_CACHED_SGE_SHIFT 52984#define FCOE_TCE_TX_WR_RX_RD_CONST_SUPPORT_REC_TOV (0x1<<7)2985#define FCOE_TCE_TX_WR_RX_RD_CONST_SUPPORT_REC_TOV_SHIFT 72986 u8 tx_flags;2987#define FCOE_TCE_TX_WR_RX_RD_CONST_TX_VALID (0x1<<0)2988#define FCOE_TCE_TX_WR_RX_RD_CONST_TX_VALID_SHIFT 02989#define FCOE_TCE_TX_WR_RX_RD_CONST_TX_STATE (0xF<<1)2990#define FCOE_TCE_TX_WR_RX_RD_CONST_TX_STATE_SHIFT 12991#define FCOE_TCE_TX_WR_RX_RD_CONST_RSRV1 (0x1<<5)2992#define FCOE_TCE_TX_WR_RX_RD_CONST_RSRV1_SHIFT 52993#define FCOE_TCE_TX_WR_RX_RD_CONST_TX_SEQ_INIT (0x1<<6)2994#define FCOE_TCE_TX_WR_RX_RD_CONST_TX_SEQ_INIT_SHIFT 62995#define FCOE_TCE_TX_WR_RX_RD_CONST_TX_COMP_TRNS (0x1<<7)2996#define FCOE_TCE_TX_WR_RX_RD_CONST_TX_COMP_TRNS_SHIFT 72997 __le16 rsrv3;2998 __le32 verify_tx_seq;2999};3000 3001/*3002 * tce_tx_wr_rx_rd $$KEEP_ENDIANNESS$$3003 */3004struct fcoe_tce_tx_wr_rx_rd {3005 union fcoe_tx_wr_rx_rd_union_ctx union_ctx;3006 struct fcoe_tce_tx_wr_rx_rd_const const_ctx;3007};3008 3009/*3010 * tce_rx_wr_tx_rd_const $$KEEP_ENDIANNESS$$3011 */3012struct fcoe_tce_rx_wr_tx_rd_const {3013 __le32 data_2_trns;3014 __le32 init_flags;3015#define FCOE_TCE_RX_WR_TX_RD_CONST_CID (0xFFFFFF<<0)3016#define FCOE_TCE_RX_WR_TX_RD_CONST_CID_SHIFT 03017#define FCOE_TCE_RX_WR_TX_RD_CONST_RSRV0 (0xFF<<24)3018#define FCOE_TCE_RX_WR_TX_RD_CONST_RSRV0_SHIFT 243019};3020 3021/*3022 * tce_rx_wr_tx_rd_var $$KEEP_ENDIANNESS$$3023 */3024struct fcoe_tce_rx_wr_tx_rd_var {3025 __le16 rx_flags;3026#define FCOE_TCE_RX_WR_TX_RD_VAR_RSRV1 (0xF<<0)3027#define FCOE_TCE_RX_WR_TX_RD_VAR_RSRV1_SHIFT 03028#define FCOE_TCE_RX_WR_TX_RD_VAR_NUM_RQ_WQE (0x7<<4)3029#define FCOE_TCE_RX_WR_TX_RD_VAR_NUM_RQ_WQE_SHIFT 43030#define FCOE_TCE_RX_WR_TX_RD_VAR_CONF_REQ (0x1<<7)3031#define FCOE_TCE_RX_WR_TX_RD_VAR_CONF_REQ_SHIFT 73032#define FCOE_TCE_RX_WR_TX_RD_VAR_RX_STATE (0xF<<8)3033#define FCOE_TCE_RX_WR_TX_RD_VAR_RX_STATE_SHIFT 83034#define FCOE_TCE_RX_WR_TX_RD_VAR_EXP_FIRST_FRAME (0x1<<12)3035#define FCOE_TCE_RX_WR_TX_RD_VAR_EXP_FIRST_FRAME_SHIFT 123036#define FCOE_TCE_RX_WR_TX_RD_VAR_RX_SEQ_INIT (0x1<<13)3037#define FCOE_TCE_RX_WR_TX_RD_VAR_RX_SEQ_INIT_SHIFT 133038#define FCOE_TCE_RX_WR_TX_RD_VAR_RSRV2 (0x1<<14)3039#define FCOE_TCE_RX_WR_TX_RD_VAR_RSRV2_SHIFT 143040#define FCOE_TCE_RX_WR_TX_RD_VAR_RX_VALID (0x1<<15)3041#define FCOE_TCE_RX_WR_TX_RD_VAR_RX_VALID_SHIFT 153042 __le16 rx_id;3043 struct fcoe_fcp_xfr_rdy_payload fcp_xfr_rdy;3044};3045 3046/*3047 * tce_rx_wr_tx_rd $$KEEP_ENDIANNESS$$3048 */3049struct fcoe_tce_rx_wr_tx_rd {3050 struct fcoe_tce_rx_wr_tx_rd_const const_ctx;3051 struct fcoe_tce_rx_wr_tx_rd_var var_ctx;3052};3053 3054/*3055 * tce_rx_only $$KEEP_ENDIANNESS$$3056 */3057struct fcoe_tce_rx_only {3058 struct fcoe_rx_seq_ctx rx_seq_ctx;3059 union fcoe_rx_wr_union_ctx union_ctx;3060};3061 3062/*3063 * task_ctx_entry $$KEEP_ENDIANNESS$$3064 */3065struct fcoe_task_ctx_entry {3066 struct fcoe_tce_tx_only txwr_only;3067 struct fcoe_tce_tx_wr_rx_rd txwr_rxrd;3068 struct fcoe_tce_rx_wr_tx_rd rxwr_txrd;3069 struct fcoe_tce_rx_only rxwr_only;3070};3071 3072 3073 3074 3075 3076 3077 3078 3079 3080 3081/*3082 * FCoE XFRQ element $$KEEP_ENDIANNESS$$3083 */3084struct fcoe_xfrqe {3085 __le16 wqe;3086#define FCOE_XFRQE_TASK_ID (0x7FFF<<0)3087#define FCOE_XFRQE_TASK_ID_SHIFT 03088#define FCOE_XFRQE_TOGGLE_BIT (0x1<<15)3089#define FCOE_XFRQE_TOGGLE_BIT_SHIFT 153090};3091 3092 3093/*3094 * Cached SGEs $$KEEP_ENDIANNESS$$3095 */3096struct common_fcoe_sgl {3097 struct fcoe_bd_ctx sge[3];3098};3099 3100 3101/*3102 * FCoE SQ\XFRQ element3103 */3104struct fcoe_cached_wqe {3105 struct fcoe_sqe sqe;3106 struct fcoe_xfrqe xfrqe;3107};3108 3109 3110/*3111 * FCoE connection enable\disable params passed by driver to FW in FCoE enable3112 * ramrod $$KEEP_ENDIANNESS$$3113 */3114struct fcoe_conn_enable_disable_ramrod_params {3115 struct fcoe_kwqe_conn_enable_disable enable_disable_kwqe;3116};3117 3118 3119/*3120 * FCoE connection offload params passed by driver to FW in FCoE offload ramrod3121 * $$KEEP_ENDIANNESS$$3122 */3123struct fcoe_conn_offload_ramrod_params {3124 struct fcoe_kwqe_conn_offload1 offload_kwqe1;3125 struct fcoe_kwqe_conn_offload2 offload_kwqe2;3126 struct fcoe_kwqe_conn_offload3 offload_kwqe3;3127 struct fcoe_kwqe_conn_offload4 offload_kwqe4;3128};3129 3130 3131struct ustorm_fcoe_mng_ctx {3132#if defined(__BIG_ENDIAN)3133 u8 mid_seq_proc_flag;3134 u8 tce_in_cam_flag;3135 u8 tce_on_ior_flag;3136 u8 en_cached_tce_flag;3137#elif defined(__LITTLE_ENDIAN)3138 u8 en_cached_tce_flag;3139 u8 tce_on_ior_flag;3140 u8 tce_in_cam_flag;3141 u8 mid_seq_proc_flag;3142#endif3143#if defined(__BIG_ENDIAN)3144 u8 tce_cam_addr;3145 u8 cached_conn_flag;3146 u16 rsrv0;3147#elif defined(__LITTLE_ENDIAN)3148 u16 rsrv0;3149 u8 cached_conn_flag;3150 u8 tce_cam_addr;3151#endif3152#if defined(__BIG_ENDIAN)3153 u16 dma_tce_ram_addr;3154 u16 tce_ram_addr;3155#elif defined(__LITTLE_ENDIAN)3156 u16 tce_ram_addr;3157 u16 dma_tce_ram_addr;3158#endif3159#if defined(__BIG_ENDIAN)3160 u16 ox_id;3161 u16 wr_done_seq;3162#elif defined(__LITTLE_ENDIAN)3163 u16 wr_done_seq;3164 u16 ox_id;3165#endif3166 struct regpair task_addr;3167};3168 3169/*3170 * Parameters initialized during offloaded according to FLOGI/PLOGI/PRLI and3171 * used in FCoE context section3172 */3173struct ustorm_fcoe_params {3174#if defined(__BIG_ENDIAN)3175 u16 fcoe_conn_id;3176 u16 flags;3177#define USTORM_FCOE_PARAMS_B_MUL_N_PORT_IDS (0x1<<0)3178#define USTORM_FCOE_PARAMS_B_MUL_N_PORT_IDS_SHIFT 03179#define USTORM_FCOE_PARAMS_B_E_D_TOV_RES (0x1<<1)3180#define USTORM_FCOE_PARAMS_B_E_D_TOV_RES_SHIFT 13181#define USTORM_FCOE_PARAMS_B_CONT_INCR_SEQ_CNT (0x1<<2)3182#define USTORM_FCOE_PARAMS_B_CONT_INCR_SEQ_CNT_SHIFT 23183#define USTORM_FCOE_PARAMS_B_CONF_REQ (0x1<<3)3184#define USTORM_FCOE_PARAMS_B_CONF_REQ_SHIFT 33185#define USTORM_FCOE_PARAMS_B_REC_VALID (0x1<<4)3186#define USTORM_FCOE_PARAMS_B_REC_VALID_SHIFT 43187#define USTORM_FCOE_PARAMS_B_CQ_TOGGLE_BIT (0x1<<5)3188#define USTORM_FCOE_PARAMS_B_CQ_TOGGLE_BIT_SHIFT 53189#define USTORM_FCOE_PARAMS_B_XFRQ_TOGGLE_BIT (0x1<<6)3190#define USTORM_FCOE_PARAMS_B_XFRQ_TOGGLE_BIT_SHIFT 63191#define USTORM_FCOE_PARAMS_RSRV0 (0x1FF<<7)3192#define USTORM_FCOE_PARAMS_RSRV0_SHIFT 73193#elif defined(__LITTLE_ENDIAN)3194 u16 flags;3195#define USTORM_FCOE_PARAMS_B_MUL_N_PORT_IDS (0x1<<0)3196#define USTORM_FCOE_PARAMS_B_MUL_N_PORT_IDS_SHIFT 03197#define USTORM_FCOE_PARAMS_B_E_D_TOV_RES (0x1<<1)3198#define USTORM_FCOE_PARAMS_B_E_D_TOV_RES_SHIFT 13199#define USTORM_FCOE_PARAMS_B_CONT_INCR_SEQ_CNT (0x1<<2)3200#define USTORM_FCOE_PARAMS_B_CONT_INCR_SEQ_CNT_SHIFT 23201#define USTORM_FCOE_PARAMS_B_CONF_REQ (0x1<<3)3202#define USTORM_FCOE_PARAMS_B_CONF_REQ_SHIFT 33203#define USTORM_FCOE_PARAMS_B_REC_VALID (0x1<<4)3204#define USTORM_FCOE_PARAMS_B_REC_VALID_SHIFT 43205#define USTORM_FCOE_PARAMS_B_CQ_TOGGLE_BIT (0x1<<5)3206#define USTORM_FCOE_PARAMS_B_CQ_TOGGLE_BIT_SHIFT 53207#define USTORM_FCOE_PARAMS_B_XFRQ_TOGGLE_BIT (0x1<<6)3208#define USTORM_FCOE_PARAMS_B_XFRQ_TOGGLE_BIT_SHIFT 63209#define USTORM_FCOE_PARAMS_RSRV0 (0x1FF<<7)3210#define USTORM_FCOE_PARAMS_RSRV0_SHIFT 73211 u16 fcoe_conn_id;3212#endif3213#if defined(__BIG_ENDIAN)3214 u8 hc_csdm_byte_en;3215 u8 func_id;3216 u8 port_id;3217 u8 vnic_id;3218#elif defined(__LITTLE_ENDIAN)3219 u8 vnic_id;3220 u8 port_id;3221 u8 func_id;3222 u8 hc_csdm_byte_en;3223#endif3224#if defined(__BIG_ENDIAN)3225 u16 rx_total_conc_seqs;3226 u16 rx_max_fc_pay_len;3227#elif defined(__LITTLE_ENDIAN)3228 u16 rx_max_fc_pay_len;3229 u16 rx_total_conc_seqs;3230#endif3231#if defined(__BIG_ENDIAN)3232 u8 task_pbe_idx_off;3233 u8 task_in_page_log_size;3234 u16 rx_max_conc_seqs;3235#elif defined(__LITTLE_ENDIAN)3236 u16 rx_max_conc_seqs;3237 u8 task_in_page_log_size;3238 u8 task_pbe_idx_off;3239#endif3240};3241 3242/*3243 * FCoE 16-bits index structure3244 */3245struct fcoe_idx16_fields {3246 u16 fields;3247#define FCOE_IDX16_FIELDS_IDX (0x7FFF<<0)3248#define FCOE_IDX16_FIELDS_IDX_SHIFT 03249#define FCOE_IDX16_FIELDS_MSB (0x1<<15)3250#define FCOE_IDX16_FIELDS_MSB_SHIFT 153251};3252 3253/*3254 * FCoE 16-bits index union3255 */3256union fcoe_idx16_field_union {3257 struct fcoe_idx16_fields fields;3258 u16 val;3259};3260 3261/*3262 * Parameters required for placement according to SGL3263 */3264struct ustorm_fcoe_data_place_mng {3265#if defined(__BIG_ENDIAN)3266 u16 sge_off;3267 u8 num_sges;3268 u8 sge_idx;3269#elif defined(__LITTLE_ENDIAN)3270 u8 sge_idx;3271 u8 num_sges;3272 u16 sge_off;3273#endif3274};3275 3276/*3277 * Parameters required for placement according to SGL3278 */3279struct ustorm_fcoe_data_place {3280 struct ustorm_fcoe_data_place_mng cached_mng;3281 struct fcoe_bd_ctx cached_sge[2];3282};3283 3284/*3285 * TX processing shall write and RX processing shall read from this section3286 */3287union fcoe_u_tce_tx_wr_rx_rd_union {3288 struct fcoe_abts_info abts;3289 struct fcoe_cleanup_info cleanup;3290 struct fcoe_fw_tx_seq_ctx tx_seq_ctx;3291 u32 opaque[2];3292};3293 3294/*3295 * TX processing shall write and RX processing shall read from this section3296 */3297struct fcoe_u_tce_tx_wr_rx_rd {3298 union fcoe_u_tce_tx_wr_rx_rd_union union_ctx;3299 struct fcoe_tce_tx_wr_rx_rd_const const_ctx;3300};3301 3302struct ustorm_fcoe_tce {3303 struct fcoe_u_tce_tx_wr_rx_rd txwr_rxrd;3304 struct fcoe_tce_rx_wr_tx_rd rxwr_txrd;3305 struct fcoe_tce_rx_only rxwr;3306};3307 3308struct ustorm_fcoe_cache_ctx {3309 u32 rsrv0;3310 struct ustorm_fcoe_data_place data_place;3311 struct ustorm_fcoe_tce tce;3312};3313 3314/*3315 * Ustorm FCoE Storm Context3316 */3317struct ustorm_fcoe_st_context {3318 struct ustorm_fcoe_mng_ctx mng_ctx;3319 struct ustorm_fcoe_params fcoe_params;3320 struct regpair cq_base_addr;3321 struct regpair rq_pbl_base;3322 struct regpair rq_cur_page_addr;3323 struct regpair confq_pbl_base_addr;3324 struct regpair conn_db_base;3325 struct regpair xfrq_base_addr;3326 struct regpair lcq_base_addr;3327#if defined(__BIG_ENDIAN)3328 union fcoe_idx16_field_union rq_cons;3329 union fcoe_idx16_field_union rq_prod;3330#elif defined(__LITTLE_ENDIAN)3331 union fcoe_idx16_field_union rq_prod;3332 union fcoe_idx16_field_union rq_cons;3333#endif3334#if defined(__BIG_ENDIAN)3335 u16 xfrq_prod;3336 u16 cq_cons;3337#elif defined(__LITTLE_ENDIAN)3338 u16 cq_cons;3339 u16 xfrq_prod;3340#endif3341#if defined(__BIG_ENDIAN)3342 u16 lcq_cons;3343 u16 hc_cram_address;3344#elif defined(__LITTLE_ENDIAN)3345 u16 hc_cram_address;3346 u16 lcq_cons;3347#endif3348#if defined(__BIG_ENDIAN)3349 u16 sq_xfrq_lcq_confq_size;3350 u16 confq_prod;3351#elif defined(__LITTLE_ENDIAN)3352 u16 confq_prod;3353 u16 sq_xfrq_lcq_confq_size;3354#endif3355#if defined(__BIG_ENDIAN)3356 u8 hc_csdm_agg_int;3357 u8 rsrv2;3358 u8 available_rqes;3359 u8 sp_q_flush_cnt;3360#elif defined(__LITTLE_ENDIAN)3361 u8 sp_q_flush_cnt;3362 u8 available_rqes;3363 u8 rsrv2;3364 u8 hc_csdm_agg_int;3365#endif3366#if defined(__BIG_ENDIAN)3367 u16 num_pend_tasks;3368 u16 pbf_ack_ram_addr;3369#elif defined(__LITTLE_ENDIAN)3370 u16 pbf_ack_ram_addr;3371 u16 num_pend_tasks;3372#endif3373 struct ustorm_fcoe_cache_ctx cache_ctx;3374};3375 3376/*3377 * The FCoE non-aggregative context of Tstorm3378 */3379struct tstorm_fcoe_st_context {3380 struct regpair reserved0;3381 struct regpair reserved1;3382};3383 3384/*3385 * Ethernet context section3386 */3387struct xstorm_fcoe_eth_context_section {3388#if defined(__BIG_ENDIAN)3389 u8 remote_addr_4;3390 u8 remote_addr_5;3391 u8 local_addr_0;3392 u8 local_addr_1;3393#elif defined(__LITTLE_ENDIAN)3394 u8 local_addr_1;3395 u8 local_addr_0;3396 u8 remote_addr_5;3397 u8 remote_addr_4;3398#endif3399#if defined(__BIG_ENDIAN)3400 u8 remote_addr_0;3401 u8 remote_addr_1;3402 u8 remote_addr_2;3403 u8 remote_addr_3;3404#elif defined(__LITTLE_ENDIAN)3405 u8 remote_addr_3;3406 u8 remote_addr_2;3407 u8 remote_addr_1;3408 u8 remote_addr_0;3409#endif3410#if defined(__BIG_ENDIAN)3411 u16 reserved_vlan_type;3412 u16 params;3413#define XSTORM_FCOE_ETH_CONTEXT_SECTION_VLAN_ID (0xFFF<<0)3414#define XSTORM_FCOE_ETH_CONTEXT_SECTION_VLAN_ID_SHIFT 03415#define XSTORM_FCOE_ETH_CONTEXT_SECTION_CFI (0x1<<12)3416#define XSTORM_FCOE_ETH_CONTEXT_SECTION_CFI_SHIFT 123417#define XSTORM_FCOE_ETH_CONTEXT_SECTION_PRIORITY (0x7<<13)3418#define XSTORM_FCOE_ETH_CONTEXT_SECTION_PRIORITY_SHIFT 133419#elif defined(__LITTLE_ENDIAN)3420 u16 params;3421#define XSTORM_FCOE_ETH_CONTEXT_SECTION_VLAN_ID (0xFFF<<0)3422#define XSTORM_FCOE_ETH_CONTEXT_SECTION_VLAN_ID_SHIFT 03423#define XSTORM_FCOE_ETH_CONTEXT_SECTION_CFI (0x1<<12)3424#define XSTORM_FCOE_ETH_CONTEXT_SECTION_CFI_SHIFT 123425#define XSTORM_FCOE_ETH_CONTEXT_SECTION_PRIORITY (0x7<<13)3426#define XSTORM_FCOE_ETH_CONTEXT_SECTION_PRIORITY_SHIFT 133427 u16 reserved_vlan_type;3428#endif3429#if defined(__BIG_ENDIAN)3430 u8 local_addr_2;3431 u8 local_addr_3;3432 u8 local_addr_4;3433 u8 local_addr_5;3434#elif defined(__LITTLE_ENDIAN)3435 u8 local_addr_5;3436 u8 local_addr_4;3437 u8 local_addr_3;3438 u8 local_addr_2;3439#endif3440};3441 3442/*3443 * Flags used in FCoE context section - 1 byte3444 */3445struct xstorm_fcoe_context_flags {3446 u8 flags;3447#define XSTORM_FCOE_CONTEXT_FLAGS_B_PROC_Q (0x3<<0)3448#define XSTORM_FCOE_CONTEXT_FLAGS_B_PROC_Q_SHIFT 03449#define XSTORM_FCOE_CONTEXT_FLAGS_B_MID_SEQ (0x1<<2)3450#define XSTORM_FCOE_CONTEXT_FLAGS_B_MID_SEQ_SHIFT 23451#define XSTORM_FCOE_CONTEXT_FLAGS_B_BLOCK_SQ (0x1<<3)3452#define XSTORM_FCOE_CONTEXT_FLAGS_B_BLOCK_SQ_SHIFT 33453#define XSTORM_FCOE_CONTEXT_FLAGS_B_REC_SUPPORT (0x1<<4)3454#define XSTORM_FCOE_CONTEXT_FLAGS_B_REC_SUPPORT_SHIFT 43455#define XSTORM_FCOE_CONTEXT_FLAGS_B_SQ_TOGGLE (0x1<<5)3456#define XSTORM_FCOE_CONTEXT_FLAGS_B_SQ_TOGGLE_SHIFT 53457#define XSTORM_FCOE_CONTEXT_FLAGS_B_XFRQ_TOGGLE (0x1<<6)3458#define XSTORM_FCOE_CONTEXT_FLAGS_B_XFRQ_TOGGLE_SHIFT 63459#define XSTORM_FCOE_CONTEXT_FLAGS_B_VNTAG_VLAN (0x1<<7)3460#define XSTORM_FCOE_CONTEXT_FLAGS_B_VNTAG_VLAN_SHIFT 73461};3462 3463struct xstorm_fcoe_tce {3464 struct fcoe_tce_tx_only txwr;3465 struct fcoe_tce_tx_wr_rx_rd txwr_rxrd;3466};3467 3468/*3469 * FCP_DATA parameters required for transmission3470 */3471struct xstorm_fcoe_fcp_data {3472 u32 io_rem;3473#if defined(__BIG_ENDIAN)3474 u16 cached_sge_off;3475 u8 cached_num_sges;3476 u8 cached_sge_idx;3477#elif defined(__LITTLE_ENDIAN)3478 u8 cached_sge_idx;3479 u8 cached_num_sges;3480 u16 cached_sge_off;3481#endif3482 u32 buf_addr_hi_0;3483 u32 buf_addr_lo_0;3484#if defined(__BIG_ENDIAN)3485 u16 num_of_pending_tasks;3486 u16 buf_len_0;3487#elif defined(__LITTLE_ENDIAN)3488 u16 buf_len_0;3489 u16 num_of_pending_tasks;3490#endif3491 u32 buf_addr_hi_1;3492 u32 buf_addr_lo_1;3493#if defined(__BIG_ENDIAN)3494 u16 task_pbe_idx_off;3495 u16 buf_len_1;3496#elif defined(__LITTLE_ENDIAN)3497 u16 buf_len_1;3498 u16 task_pbe_idx_off;3499#endif3500 u32 buf_addr_hi_2;3501 u32 buf_addr_lo_2;3502#if defined(__BIG_ENDIAN)3503 u16 ox_id;3504 u16 buf_len_2;3505#elif defined(__LITTLE_ENDIAN)3506 u16 buf_len_2;3507 u16 ox_id;3508#endif3509};3510 3511/*3512 * vlan configuration3513 */3514struct xstorm_fcoe_vlan_conf {3515 u8 vlan_conf;3516#define XSTORM_FCOE_VLAN_CONF_PRIORITY (0x7<<0)3517#define XSTORM_FCOE_VLAN_CONF_PRIORITY_SHIFT 03518#define XSTORM_FCOE_VLAN_CONF_INNER_VLAN_FLAG (0x1<<3)3519#define XSTORM_FCOE_VLAN_CONF_INNER_VLAN_FLAG_SHIFT 33520#define XSTORM_FCOE_VLAN_CONF_RESERVED (0xF<<4)3521#define XSTORM_FCOE_VLAN_CONF_RESERVED_SHIFT 43522};3523 3524/*3525 * FCoE 16-bits vlan structure3526 */3527struct fcoe_vlan_fields {3528 u16 fields;3529#define FCOE_VLAN_FIELDS_VID (0xFFF<<0)3530#define FCOE_VLAN_FIELDS_VID_SHIFT 03531#define FCOE_VLAN_FIELDS_CLI (0x1<<12)3532#define FCOE_VLAN_FIELDS_CLI_SHIFT 123533#define FCOE_VLAN_FIELDS_PRI (0x7<<13)3534#define FCOE_VLAN_FIELDS_PRI_SHIFT 133535};3536 3537/*3538 * FCoE 16-bits vlan union3539 */3540union fcoe_vlan_field_union {3541 struct fcoe_vlan_fields fields;3542 u16 val;3543};3544 3545/*3546 * FCoE 16-bits vlan, vif union3547 */3548union fcoe_vlan_vif_field_union {3549 union fcoe_vlan_field_union vlan;3550 u16 vif;3551};3552 3553/*3554 * FCoE context section3555 */3556struct xstorm_fcoe_context_section {3557#if defined(__BIG_ENDIAN)3558 u8 cs_ctl;3559 u8 s_id[3];3560#elif defined(__LITTLE_ENDIAN)3561 u8 s_id[3];3562 u8 cs_ctl;3563#endif3564#if defined(__BIG_ENDIAN)3565 u8 rctl;3566 u8 d_id[3];3567#elif defined(__LITTLE_ENDIAN)3568 u8 d_id[3];3569 u8 rctl;3570#endif3571#if defined(__BIG_ENDIAN)3572 u16 sq_xfrq_lcq_confq_size;3573 u16 tx_max_fc_pay_len;3574#elif defined(__LITTLE_ENDIAN)3575 u16 tx_max_fc_pay_len;3576 u16 sq_xfrq_lcq_confq_size;3577#endif3578 u32 lcq_prod;3579#if defined(__BIG_ENDIAN)3580 u8 port_id;3581 u8 func_id;3582 u8 seq_id;3583 struct xstorm_fcoe_context_flags tx_flags;3584#elif defined(__LITTLE_ENDIAN)3585 struct xstorm_fcoe_context_flags tx_flags;3586 u8 seq_id;3587 u8 func_id;3588 u8 port_id;3589#endif3590#if defined(__BIG_ENDIAN)3591 u16 mtu;3592 u8 func_mode;3593 u8 vnic_id;3594#elif defined(__LITTLE_ENDIAN)3595 u8 vnic_id;3596 u8 func_mode;3597 u16 mtu;3598#endif3599 struct regpair confq_curr_page_addr;3600 struct fcoe_cached_wqe cached_wqe[8];3601 struct regpair lcq_base_addr;3602 struct xstorm_fcoe_tce tce;3603 struct xstorm_fcoe_fcp_data fcp_data;3604#if defined(__BIG_ENDIAN)3605 u8 tx_max_conc_seqs_c3;3606 u8 vlan_flag;3607 u8 dcb_val;3608 u8 data_pb_cmd_size;3609#elif defined(__LITTLE_ENDIAN)3610 u8 data_pb_cmd_size;3611 u8 dcb_val;3612 u8 vlan_flag;3613 u8 tx_max_conc_seqs_c3;3614#endif3615#if defined(__BIG_ENDIAN)3616 u16 fcoe_tx_stat_params_ram_addr;3617 u16 fcoe_tx_fc_seq_ram_addr;3618#elif defined(__LITTLE_ENDIAN)3619 u16 fcoe_tx_fc_seq_ram_addr;3620 u16 fcoe_tx_stat_params_ram_addr;3621#endif3622#if defined(__BIG_ENDIAN)3623 u8 fcp_cmd_line_credit;3624 u8 eth_hdr_size;3625 u16 pbf_addr;3626#elif defined(__LITTLE_ENDIAN)3627 u16 pbf_addr;3628 u8 eth_hdr_size;3629 u8 fcp_cmd_line_credit;3630#endif3631#if defined(__BIG_ENDIAN)3632 union fcoe_vlan_vif_field_union multi_func_val;3633 u8 page_log_size;3634 struct xstorm_fcoe_vlan_conf orig_vlan_conf;3635#elif defined(__LITTLE_ENDIAN)3636 struct xstorm_fcoe_vlan_conf orig_vlan_conf;3637 u8 page_log_size;3638 union fcoe_vlan_vif_field_union multi_func_val;3639#endif3640#if defined(__BIG_ENDIAN)3641 u16 fcp_cmd_frame_size;3642 u16 pbf_addr_ff;3643#elif defined(__LITTLE_ENDIAN)3644 u16 pbf_addr_ff;3645 u16 fcp_cmd_frame_size;3646#endif3647#if defined(__BIG_ENDIAN)3648 u8 vlan_num;3649 u8 cos;3650 u8 cache_xfrq_cons;3651 u8 cache_sq_cons;3652#elif defined(__LITTLE_ENDIAN)3653 u8 cache_sq_cons;3654 u8 cache_xfrq_cons;3655 u8 cos;3656 u8 vlan_num;3657#endif3658 u32 verify_tx_seq;3659};3660 3661/*3662 * Xstorm FCoE Storm Context3663 */3664struct xstorm_fcoe_st_context {3665 struct xstorm_fcoe_eth_context_section eth;3666 struct xstorm_fcoe_context_section fcoe;3667};3668 3669/*3670 * Fcoe connection context3671 */3672struct fcoe_context {3673 struct ustorm_fcoe_st_context ustorm_st_context;3674 struct tstorm_fcoe_st_context tstorm_st_context;3675 struct xstorm_fcoe_ag_context xstorm_ag_context;3676 struct tstorm_fcoe_ag_context tstorm_ag_context;3677 struct ustorm_fcoe_ag_context ustorm_ag_context;3678 struct timers_block_context timers_context;3679 struct xstorm_fcoe_st_context xstorm_st_context;3680};3681 3682/*3683 * FCoE init params passed by driver to FW in FCoE init ramrod3684 * $$KEEP_ENDIANNESS$$3685 */3686struct fcoe_init_ramrod_params {3687 struct fcoe_kwqe_init1 init_kwqe1;3688 struct fcoe_kwqe_init2 init_kwqe2;3689 struct fcoe_kwqe_init3 init_kwqe3;3690 struct regpair eq_pbl_base;3691 __le32 eq_pbl_size;3692 __le32 reserved2;3693 __le16 eq_prod;3694 __le16 sb_num;3695 u8 sb_id;3696 u8 reserved0;3697 __le16 reserved1;3698};3699 3700/*3701 * FCoE statistics params buffer passed by driver to FW in FCoE statistics3702 * ramrod $$KEEP_ENDIANNESS$$3703 */3704struct fcoe_stat_ramrod_params {3705 struct fcoe_kwqe_stat stat_kwqe;3706};3707 3708/*3709 * CQ DB CQ producer and pending completion counter3710 */3711struct iscsi_cq_db_prod_pnd_cmpltn_cnt {3712#if defined(__BIG_ENDIAN)3713 u16 cntr;3714 u16 prod;3715#elif defined(__LITTLE_ENDIAN)3716 u16 prod;3717 u16 cntr;3718#endif3719};3720 3721/*3722 * CQ DB pending completion ITT array3723 */3724struct iscsi_cq_db_prod_pnd_cmpltn_cnt_arr {3725 struct iscsi_cq_db_prod_pnd_cmpltn_cnt prod_pend_comp[8];3726};3727 3728/*3729 * Cstorm CQ sequence to notify array, updated by driver3730 */3731struct iscsi_cq_db_sqn_2_notify_arr {3732 u16 sqn[8];3733};3734 3735/*3736 * Cstorm iSCSI Storm Context3737 */3738struct cstorm_iscsi_st_context {3739 struct iscsi_cq_db_prod_pnd_cmpltn_cnt_arr cq_c_prod_pend_comp_ctr_arr;3740 struct iscsi_cq_db_sqn_2_notify_arr cq_c_prod_sqn_arr;3741 struct iscsi_cq_db_sqn_2_notify_arr cq_c_sqn_2_notify_arr;3742 struct regpair hq_pbl_base;3743 struct regpair hq_curr_pbe;3744 struct regpair task_pbl_base;3745 struct regpair cq_db_base;3746#if defined(__BIG_ENDIAN)3747 u16 hq_bd_itt;3748 u16 iscsi_conn_id;3749#elif defined(__LITTLE_ENDIAN)3750 u16 iscsi_conn_id;3751 u16 hq_bd_itt;3752#endif3753 u32 hq_bd_data_segment_len;3754 u32 hq_bd_buffer_offset;3755#if defined(__BIG_ENDIAN)3756 u8 rsrv;3757 u8 cq_proc_en_bit_map;3758 u8 cq_pend_comp_itt_valid_bit_map;3759 u8 hq_bd_opcode;3760#elif defined(__LITTLE_ENDIAN)3761 u8 hq_bd_opcode;3762 u8 cq_pend_comp_itt_valid_bit_map;3763 u8 cq_proc_en_bit_map;3764 u8 rsrv;3765#endif3766 u32 hq_tcp_seq;3767#if defined(__BIG_ENDIAN)3768 u16 flags;3769#define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN (0x1<<0)3770#define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN_SHIFT 03771#define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN (0x1<<1)3772#define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN_SHIFT 13773#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID (0x1<<2)3774#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID_SHIFT 23775#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG (0x1<<3)3776#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG_SHIFT 33777#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK (0x1<<4)3778#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK_SHIFT 43779#define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV (0x7FF<<5)3780#define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV_SHIFT 53781 u16 hq_cons;3782#elif defined(__LITTLE_ENDIAN)3783 u16 hq_cons;3784 u16 flags;3785#define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN (0x1<<0)3786#define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN_SHIFT 03787#define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN (0x1<<1)3788#define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN_SHIFT 13789#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID (0x1<<2)3790#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID_SHIFT 23791#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG (0x1<<3)3792#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG_SHIFT 33793#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK (0x1<<4)3794#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK_SHIFT 43795#define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV (0x7FF<<5)3796#define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV_SHIFT 53797#endif3798 struct regpair rsrv1;3799};3800 3801 3802/*3803 * SCSI read/write SQ WQE3804 */3805struct iscsi_cmd_pdu_hdr_little_endian {3806#if defined(__BIG_ENDIAN)3807 u8 opcode;3808 u8 op_attr;3809#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_ATTRIBUTES (0x7<<0)3810#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_ATTRIBUTES_SHIFT 03811#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_RSRV1 (0x3<<3)3812#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 33813#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_WRITE_FLAG (0x1<<5)3814#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_WRITE_FLAG_SHIFT 53815#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_READ_FLAG (0x1<<6)3816#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_READ_FLAG_SHIFT 63817#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG (0x1<<7)3818#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG_SHIFT 73819 u16 rsrv0;3820#elif defined(__LITTLE_ENDIAN)3821 u16 rsrv0;3822 u8 op_attr;3823#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_ATTRIBUTES (0x7<<0)3824#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_ATTRIBUTES_SHIFT 03825#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_RSRV1 (0x3<<3)3826#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 33827#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_WRITE_FLAG (0x1<<5)3828#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_WRITE_FLAG_SHIFT 53829#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_READ_FLAG (0x1<<6)3830#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_READ_FLAG_SHIFT 63831#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG (0x1<<7)3832#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG_SHIFT 73833 u8 opcode;3834#endif3835 u32 data_fields;3836#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH (0xFFFFFF<<0)3837#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH_SHIFT 03838#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH (0xFF<<24)3839#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH_SHIFT 243840 struct regpair lun;3841 u32 itt;3842 u32 expected_data_transfer_length;3843 u32 cmd_sn;3844 u32 exp_stat_sn;3845 u32 scsi_command_block[4];3846};3847 3848 3849/*3850 * Buffer per connection, used in Tstorm3851 */3852struct iscsi_conn_buf {3853 struct regpair reserved[8];3854};3855 3856 3857/*3858 * iSCSI context region, used only in iSCSI3859 */3860struct ustorm_iscsi_rq_db {3861 struct regpair pbl_base;3862 struct regpair curr_pbe;3863};3864 3865/*3866 * iSCSI context region, used only in iSCSI3867 */3868struct ustorm_iscsi_r2tq_db {3869 struct regpair pbl_base;3870 struct regpair curr_pbe;3871};3872 3873/*3874 * iSCSI context region, used only in iSCSI3875 */3876struct ustorm_iscsi_cq_db {3877#if defined(__BIG_ENDIAN)3878 u16 cq_sn;3879 u16 prod;3880#elif defined(__LITTLE_ENDIAN)3881 u16 prod;3882 u16 cq_sn;3883#endif3884 struct regpair curr_pbe;3885};3886 3887/*3888 * iSCSI context region, used only in iSCSI3889 */3890struct rings_db {3891 struct ustorm_iscsi_rq_db rq;3892 struct ustorm_iscsi_r2tq_db r2tq;3893 struct ustorm_iscsi_cq_db cq[8];3894#if defined(__BIG_ENDIAN)3895 u16 rq_prod;3896 u16 r2tq_prod;3897#elif defined(__LITTLE_ENDIAN)3898 u16 r2tq_prod;3899 u16 rq_prod;3900#endif3901 struct regpair cq_pbl_base;3902};3903 3904/*3905 * iSCSI context region, used only in iSCSI3906 */3907struct ustorm_iscsi_placement_db {3908 u32 sgl_base_lo;3909 u32 sgl_base_hi;3910 u32 local_sge_0_address_hi;3911 u32 local_sge_0_address_lo;3912#if defined(__BIG_ENDIAN)3913 u16 curr_sge_offset;3914 u16 local_sge_0_size;3915#elif defined(__LITTLE_ENDIAN)3916 u16 local_sge_0_size;3917 u16 curr_sge_offset;3918#endif3919 u32 local_sge_1_address_hi;3920 u32 local_sge_1_address_lo;3921#if defined(__BIG_ENDIAN)3922 u8 exp_padding_2b;3923 u8 nal_len_3b;3924 u16 local_sge_1_size;3925#elif defined(__LITTLE_ENDIAN)3926 u16 local_sge_1_size;3927 u8 nal_len_3b;3928 u8 exp_padding_2b;3929#endif3930#if defined(__BIG_ENDIAN)3931 u8 sgl_size;3932 u8 local_sge_index_2b;3933 u16 reserved7;3934#elif defined(__LITTLE_ENDIAN)3935 u16 reserved7;3936 u8 local_sge_index_2b;3937 u8 sgl_size;3938#endif3939 u32 rem_pdu;3940 u32 place_db_bitfield_1;3941#define USTORM_ISCSI_PLACEMENT_DB_REM_PDU_PAYLOAD (0xFFFFFF<<0)3942#define USTORM_ISCSI_PLACEMENT_DB_REM_PDU_PAYLOAD_SHIFT 03943#define USTORM_ISCSI_PLACEMENT_DB_CQ_ID (0xFF<<24)3944#define USTORM_ISCSI_PLACEMENT_DB_CQ_ID_SHIFT 243945 u32 place_db_bitfield_2;3946#define USTORM_ISCSI_PLACEMENT_DB_BYTES_2_TRUNCATE (0xFFFFFF<<0)3947#define USTORM_ISCSI_PLACEMENT_DB_BYTES_2_TRUNCATE_SHIFT 03948#define USTORM_ISCSI_PLACEMENT_DB_HOST_SGE_INDEX (0xFF<<24)3949#define USTORM_ISCSI_PLACEMENT_DB_HOST_SGE_INDEX_SHIFT 243950 u32 nal;3951#define USTORM_ISCSI_PLACEMENT_DB_REM_SGE_SIZE (0xFFFFFF<<0)3952#define USTORM_ISCSI_PLACEMENT_DB_REM_SGE_SIZE_SHIFT 03953#define USTORM_ISCSI_PLACEMENT_DB_EXP_DIGEST_3B (0xFF<<24)3954#define USTORM_ISCSI_PLACEMENT_DB_EXP_DIGEST_3B_SHIFT 243955};3956 3957/*3958 * Ustorm iSCSI Storm Context3959 */3960struct ustorm_iscsi_st_context {3961 u32 exp_stat_sn;3962 u32 exp_data_sn;3963 struct rings_db ring;3964 struct regpair task_pbl_base;3965 struct regpair tce_phy_addr;3966 struct ustorm_iscsi_placement_db place_db;3967 u32 reserved8;3968 u32 rem_rcv_len;3969#if defined(__BIG_ENDIAN)3970 u16 hdr_itt;3971 u16 iscsi_conn_id;3972#elif defined(__LITTLE_ENDIAN)3973 u16 iscsi_conn_id;3974 u16 hdr_itt;3975#endif3976 u32 nal_bytes;3977#if defined(__BIG_ENDIAN)3978 u8 hdr_second_byte_union;3979 u8 bitfield_0;3980#define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU (0x1<<0)3981#define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU_SHIFT 03982#define USTORM_ISCSI_ST_CONTEXT_BFENCECQE (0x1<<1)3983#define USTORM_ISCSI_ST_CONTEXT_BFENCECQE_SHIFT 13984#define USTORM_ISCSI_ST_CONTEXT_BRESETCRC (0x1<<2)3985#define USTORM_ISCSI_ST_CONTEXT_BRESETCRC_SHIFT 23986#define USTORM_ISCSI_ST_CONTEXT_RESERVED1 (0x1F<<3)3987#define USTORM_ISCSI_ST_CONTEXT_RESERVED1_SHIFT 33988 u8 task_pdu_cache_index;3989 u8 task_pbe_cache_index;3990#elif defined(__LITTLE_ENDIAN)3991 u8 task_pbe_cache_index;3992 u8 task_pdu_cache_index;3993 u8 bitfield_0;3994#define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU (0x1<<0)3995#define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU_SHIFT 03996#define USTORM_ISCSI_ST_CONTEXT_BFENCECQE (0x1<<1)3997#define USTORM_ISCSI_ST_CONTEXT_BFENCECQE_SHIFT 13998#define USTORM_ISCSI_ST_CONTEXT_BRESETCRC (0x1<<2)3999#define USTORM_ISCSI_ST_CONTEXT_BRESETCRC_SHIFT 24000#define USTORM_ISCSI_ST_CONTEXT_RESERVED1 (0x1F<<3)4001#define USTORM_ISCSI_ST_CONTEXT_RESERVED1_SHIFT 34002 u8 hdr_second_byte_union;4003#endif4004#if defined(__BIG_ENDIAN)4005 u16 reserved3;4006 u8 reserved2;4007 u8 acDecrement;4008#elif defined(__LITTLE_ENDIAN)4009 u8 acDecrement;4010 u8 reserved2;4011 u16 reserved3;4012#endif4013 u32 task_stat;4014#if defined(__BIG_ENDIAN)4015 u8 hdr_opcode;4016 u8 num_cqs;4017 u16 reserved5;4018#elif defined(__LITTLE_ENDIAN)4019 u16 reserved5;4020 u8 num_cqs;4021 u8 hdr_opcode;4022#endif4023 u32 negotiated_rx;4024#define USTORM_ISCSI_ST_CONTEXT_MAX_RECV_PDU_LENGTH (0xFFFFFF<<0)4025#define USTORM_ISCSI_ST_CONTEXT_MAX_RECV_PDU_LENGTH_SHIFT 04026#define USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS (0xFF<<24)4027#define USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT 244028 u32 negotiated_rx_and_flags;4029#define USTORM_ISCSI_ST_CONTEXT_MAX_BURST_LENGTH (0xFFFFFF<<0)4030#define USTORM_ISCSI_ST_CONTEXT_MAX_BURST_LENGTH_SHIFT 04031#define USTORM_ISCSI_ST_CONTEXT_B_CQE_POSTED_OR_HEADER_CACHED (0x1<<24)4032#define USTORM_ISCSI_ST_CONTEXT_B_CQE_POSTED_OR_HEADER_CACHED_SHIFT 244033#define USTORM_ISCSI_ST_CONTEXT_B_HDR_DIGEST_EN (0x1<<25)4034#define USTORM_ISCSI_ST_CONTEXT_B_HDR_DIGEST_EN_SHIFT 254035#define USTORM_ISCSI_ST_CONTEXT_B_DATA_DIGEST_EN (0x1<<26)4036#define USTORM_ISCSI_ST_CONTEXT_B_DATA_DIGEST_EN_SHIFT 264037#define USTORM_ISCSI_ST_CONTEXT_B_PROTOCOL_ERROR (0x1<<27)4038#define USTORM_ISCSI_ST_CONTEXT_B_PROTOCOL_ERROR_SHIFT 274039#define USTORM_ISCSI_ST_CONTEXT_B_TASK_VALID (0x1<<28)4040#define USTORM_ISCSI_ST_CONTEXT_B_TASK_VALID_SHIFT 284041#define USTORM_ISCSI_ST_CONTEXT_TASK_TYPE (0x3<<29)4042#define USTORM_ISCSI_ST_CONTEXT_TASK_TYPE_SHIFT 294043#define USTORM_ISCSI_ST_CONTEXT_B_ALL_DATA_ACKED (0x1<<31)4044#define USTORM_ISCSI_ST_CONTEXT_B_ALL_DATA_ACKED_SHIFT 314045};4046 4047/*4048 * TCP context region, shared in TOE, RDMA and ISCSI4049 */4050struct tstorm_tcp_st_context_section {4051 u32 flags1;4052#define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_SRTT (0xFFFFFF<<0)4053#define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_SRTT_SHIFT 04054#define TSTORM_TCP_ST_CONTEXT_SECTION_PAWS_INVALID (0x1<<24)4055#define TSTORM_TCP_ST_CONTEXT_SECTION_PAWS_INVALID_SHIFT 244056#define TSTORM_TCP_ST_CONTEXT_SECTION_TIMESTAMP_EXISTS (0x1<<25)4057#define TSTORM_TCP_ST_CONTEXT_SECTION_TIMESTAMP_EXISTS_SHIFT 254058#define TSTORM_TCP_ST_CONTEXT_SECTION_RESERVED0 (0x1<<26)4059#define TSTORM_TCP_ST_CONTEXT_SECTION_RESERVED0_SHIFT 264060#define TSTORM_TCP_ST_CONTEXT_SECTION_STOP_RX_PAYLOAD (0x1<<27)4061#define TSTORM_TCP_ST_CONTEXT_SECTION_STOP_RX_PAYLOAD_SHIFT 274062#define TSTORM_TCP_ST_CONTEXT_SECTION_KA_ENABLED (0x1<<28)4063#define TSTORM_TCP_ST_CONTEXT_SECTION_KA_ENABLED_SHIFT 284064#define TSTORM_TCP_ST_CONTEXT_SECTION_FIRST_RTO_ESTIMATE (0x1<<29)4065#define TSTORM_TCP_ST_CONTEXT_SECTION_FIRST_RTO_ESTIMATE_SHIFT 294066#define TSTORM_TCP_ST_CONTEXT_SECTION_MAX_SEG_RETRANSMIT_EN (0x1<<30)4067#define TSTORM_TCP_ST_CONTEXT_SECTION_MAX_SEG_RETRANSMIT_EN_SHIFT 304068#define TSTORM_TCP_ST_CONTEXT_SECTION_LAST_ISLE_HAS_FIN (0x1<<31)4069#define TSTORM_TCP_ST_CONTEXT_SECTION_LAST_ISLE_HAS_FIN_SHIFT 314070 u32 flags2;4071#define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_VARIATION (0xFFFFFF<<0)4072#define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_VARIATION_SHIFT 04073#define TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN (0x1<<24)4074#define TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN_SHIFT 244075#define TSTORM_TCP_ST_CONTEXT_SECTION_DA_COUNTER_EN (0x1<<25)4076#define TSTORM_TCP_ST_CONTEXT_SECTION_DA_COUNTER_EN_SHIFT 254077#define __TSTORM_TCP_ST_CONTEXT_SECTION_KA_PROBE_SENT (0x1<<26)4078#define __TSTORM_TCP_ST_CONTEXT_SECTION_KA_PROBE_SENT_SHIFT 264079#define __TSTORM_TCP_ST_CONTEXT_SECTION_PERSIST_PROBE_SENT (0x1<<27)4080#define __TSTORM_TCP_ST_CONTEXT_SECTION_PERSIST_PROBE_SENT_SHIFT 274081#define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L2_STATSTICS (0x1<<28)4082#define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L2_STATSTICS_SHIFT 284083#define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L4_STATSTICS (0x1<<29)4084#define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L4_STATSTICS_SHIFT 294085#define __TSTORM_TCP_ST_CONTEXT_SECTION_IN_WINDOW_RST_ATTACK (0x1<<30)4086#define __TSTORM_TCP_ST_CONTEXT_SECTION_IN_WINDOW_RST_ATTACK_SHIFT 304087#define __TSTORM_TCP_ST_CONTEXT_SECTION_IN_WINDOW_SYN_ATTACK (0x1<<31)4088#define __TSTORM_TCP_ST_CONTEXT_SECTION_IN_WINDOW_SYN_ATTACK_SHIFT 314089#if defined(__BIG_ENDIAN)4090 u16 mss;4091 u8 tcp_sm_state;4092 u8 rto_exp;4093#elif defined(__LITTLE_ENDIAN)4094 u8 rto_exp;4095 u8 tcp_sm_state;4096 u16 mss;4097#endif4098 u32 rcv_nxt;4099 u32 timestamp_recent;4100 u32 timestamp_recent_time;4101 u32 cwnd;4102 u32 ss_thresh;4103 u32 cwnd_accum;4104 u32 prev_seg_seq;4105 u32 expected_rel_seq;4106 u32 recover;4107#if defined(__BIG_ENDIAN)4108 u8 retransmit_count;4109 u8 ka_max_probe_count;4110 u8 persist_probe_count;4111 u8 ka_probe_count;4112#elif defined(__LITTLE_ENDIAN)4113 u8 ka_probe_count;4114 u8 persist_probe_count;4115 u8 ka_max_probe_count;4116 u8 retransmit_count;4117#endif4118#if defined(__BIG_ENDIAN)4119 u8 statistics_counter_id;4120 u8 ooo_support_mode;4121 u8 snd_wnd_scale;4122 u8 dup_ack_count;4123#elif defined(__LITTLE_ENDIAN)4124 u8 dup_ack_count;4125 u8 snd_wnd_scale;4126 u8 ooo_support_mode;4127 u8 statistics_counter_id;4128#endif4129 u32 retransmit_start_time;4130 u32 ka_timeout;4131 u32 ka_interval;4132 u32 isle_start_seq;4133 u32 isle_end_seq;4134#if defined(__BIG_ENDIAN)4135 u16 second_isle_address;4136 u16 recent_seg_wnd;4137#elif defined(__LITTLE_ENDIAN)4138 u16 recent_seg_wnd;4139 u16 second_isle_address;4140#endif4141#if defined(__BIG_ENDIAN)4142 u8 max_isles_ever_happened;4143 u8 isles_number;4144 u16 last_isle_address;4145#elif defined(__LITTLE_ENDIAN)4146 u16 last_isle_address;4147 u8 isles_number;4148 u8 max_isles_ever_happened;4149#endif4150 u32 max_rt_time;4151#if defined(__BIG_ENDIAN)4152 u16 lsb_mac_address;4153 u16 vlan_id;4154#elif defined(__LITTLE_ENDIAN)4155 u16 vlan_id;4156 u16 lsb_mac_address;4157#endif4158#if defined(__BIG_ENDIAN)4159 u16 msb_mac_address;4160 u16 mid_mac_address;4161#elif defined(__LITTLE_ENDIAN)4162 u16 mid_mac_address;4163 u16 msb_mac_address;4164#endif4165 u32 rightmost_received_seq;4166};4167 4168/*4169 * Termination variables4170 */4171struct iscsi_term_vars {4172 u8 BitMap;4173#define ISCSI_TERM_VARS_TCP_STATE (0xF<<0)4174#define ISCSI_TERM_VARS_TCP_STATE_SHIFT 04175#define ISCSI_TERM_VARS_FIN_RECEIVED_SBIT (0x1<<4)4176#define ISCSI_TERM_VARS_FIN_RECEIVED_SBIT_SHIFT 44177#define ISCSI_TERM_VARS_ACK_ON_FIN_RECEIVED_SBIT (0x1<<5)4178#define ISCSI_TERM_VARS_ACK_ON_FIN_RECEIVED_SBIT_SHIFT 54179#define ISCSI_TERM_VARS_TERM_ON_CHIP (0x1<<6)4180#define ISCSI_TERM_VARS_TERM_ON_CHIP_SHIFT 64181#define ISCSI_TERM_VARS_RSRV (0x1<<7)4182#define ISCSI_TERM_VARS_RSRV_SHIFT 74183};4184 4185/*4186 * iSCSI context region, used only in iSCSI4187 */4188struct tstorm_iscsi_st_context_section {4189 u32 nalPayload;4190 u32 b2nh;4191#if defined(__BIG_ENDIAN)4192 u16 rq_cons;4193 u8 flags;4194#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN (0x1<<0)4195#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN_SHIFT 04196#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN (0x1<<1)4197#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN_SHIFT 14198#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER (0x1<<2)4199#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER_SHIFT 24200#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE (0x1<<3)4201#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE_SHIFT 34202#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS (0x1<<4)4203#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS_SHIFT 44204#define TSTORM_ISCSI_ST_CONTEXT_SECTION_NALLEN (0x3<<5)4205#define TSTORM_ISCSI_ST_CONTEXT_SECTION_NALLEN_SHIFT 54206#define TSTORM_ISCSI_ST_CONTEXT_SECTION_RSRV0 (0x1<<7)4207#define TSTORM_ISCSI_ST_CONTEXT_SECTION_RSRV0_SHIFT 74208 u8 hdr_bytes_2_fetch;4209#elif defined(__LITTLE_ENDIAN)4210 u8 hdr_bytes_2_fetch;4211 u8 flags;4212#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN (0x1<<0)4213#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN_SHIFT 04214#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN (0x1<<1)4215#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN_SHIFT 14216#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER (0x1<<2)4217#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER_SHIFT 24218#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE (0x1<<3)4219#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE_SHIFT 34220#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS (0x1<<4)4221#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS_SHIFT 44222#define TSTORM_ISCSI_ST_CONTEXT_SECTION_NALLEN (0x3<<5)4223#define TSTORM_ISCSI_ST_CONTEXT_SECTION_NALLEN_SHIFT 54224#define TSTORM_ISCSI_ST_CONTEXT_SECTION_RSRV0 (0x1<<7)4225#define TSTORM_ISCSI_ST_CONTEXT_SECTION_RSRV0_SHIFT 74226 u16 rq_cons;4227#endif4228 struct regpair rq_db_phy_addr;4229#if defined(__BIG_ENDIAN)4230 struct iscsi_term_vars term_vars;4231 u8 rsrv1;4232 u16 iscsi_conn_id;4233#elif defined(__LITTLE_ENDIAN)4234 u16 iscsi_conn_id;4235 u8 rsrv1;4236 struct iscsi_term_vars term_vars;4237#endif4238 u32 process_nxt;4239};4240 4241/*4242 * The iSCSI non-aggregative context of Tstorm4243 */4244struct tstorm_iscsi_st_context {4245 struct tstorm_tcp_st_context_section tcp;4246 struct tstorm_iscsi_st_context_section iscsi;4247};4248 4249/*4250 * Ethernet context section, shared in TOE, RDMA and ISCSI4251 */4252struct xstorm_eth_context_section {4253#if defined(__BIG_ENDIAN)4254 u8 remote_addr_4;4255 u8 remote_addr_5;4256 u8 local_addr_0;4257 u8 local_addr_1;4258#elif defined(__LITTLE_ENDIAN)4259 u8 local_addr_1;4260 u8 local_addr_0;4261 u8 remote_addr_5;4262 u8 remote_addr_4;4263#endif4264#if defined(__BIG_ENDIAN)4265 u8 remote_addr_0;4266 u8 remote_addr_1;4267 u8 remote_addr_2;4268 u8 remote_addr_3;4269#elif defined(__LITTLE_ENDIAN)4270 u8 remote_addr_3;4271 u8 remote_addr_2;4272 u8 remote_addr_1;4273 u8 remote_addr_0;4274#endif4275#if defined(__BIG_ENDIAN)4276 u16 reserved_vlan_type;4277 u16 vlan_params;4278#define XSTORM_ETH_CONTEXT_SECTION_VLAN_ID (0xFFF<<0)4279#define XSTORM_ETH_CONTEXT_SECTION_VLAN_ID_SHIFT 04280#define XSTORM_ETH_CONTEXT_SECTION_CFI (0x1<<12)4281#define XSTORM_ETH_CONTEXT_SECTION_CFI_SHIFT 124282#define XSTORM_ETH_CONTEXT_SECTION_PRIORITY (0x7<<13)4283#define XSTORM_ETH_CONTEXT_SECTION_PRIORITY_SHIFT 134284#elif defined(__LITTLE_ENDIAN)4285 u16 vlan_params;4286#define XSTORM_ETH_CONTEXT_SECTION_VLAN_ID (0xFFF<<0)4287#define XSTORM_ETH_CONTEXT_SECTION_VLAN_ID_SHIFT 04288#define XSTORM_ETH_CONTEXT_SECTION_CFI (0x1<<12)4289#define XSTORM_ETH_CONTEXT_SECTION_CFI_SHIFT 124290#define XSTORM_ETH_CONTEXT_SECTION_PRIORITY (0x7<<13)4291#define XSTORM_ETH_CONTEXT_SECTION_PRIORITY_SHIFT 134292 u16 reserved_vlan_type;4293#endif4294#if defined(__BIG_ENDIAN)4295 u8 local_addr_2;4296 u8 local_addr_3;4297 u8 local_addr_4;4298 u8 local_addr_5;4299#elif defined(__LITTLE_ENDIAN)4300 u8 local_addr_5;4301 u8 local_addr_4;4302 u8 local_addr_3;4303 u8 local_addr_2;4304#endif4305};4306 4307/*4308 * IpV4 context section, shared in TOE, RDMA and ISCSI4309 */4310struct xstorm_ip_v4_context_section {4311#if defined(__BIG_ENDIAN)4312 u16 __pbf_hdr_cmd_rsvd_id;4313 u16 __pbf_hdr_cmd_rsvd_flags_offset;4314#elif defined(__LITTLE_ENDIAN)4315 u16 __pbf_hdr_cmd_rsvd_flags_offset;4316 u16 __pbf_hdr_cmd_rsvd_id;4317#endif4318#if defined(__BIG_ENDIAN)4319 u8 __pbf_hdr_cmd_rsvd_ver_ihl;4320 u8 tos;4321 u16 __pbf_hdr_cmd_rsvd_length;4322#elif defined(__LITTLE_ENDIAN)4323 u16 __pbf_hdr_cmd_rsvd_length;4324 u8 tos;4325 u8 __pbf_hdr_cmd_rsvd_ver_ihl;4326#endif4327 u32 ip_local_addr;4328#if defined(__BIG_ENDIAN)4329 u8 ttl;4330 u8 __pbf_hdr_cmd_rsvd_protocol;4331 u16 __pbf_hdr_cmd_rsvd_csum;4332#elif defined(__LITTLE_ENDIAN)4333 u16 __pbf_hdr_cmd_rsvd_csum;4334 u8 __pbf_hdr_cmd_rsvd_protocol;4335 u8 ttl;4336#endif4337 u32 __pbf_hdr_cmd_rsvd_1;4338 u32 ip_remote_addr;4339};4340 4341/*4342 * context section, shared in TOE, RDMA and ISCSI4343 */4344struct xstorm_padded_ip_v4_context_section {4345 struct xstorm_ip_v4_context_section ip_v4;4346 u32 reserved1[4];4347};4348 4349/*4350 * IpV6 context section, shared in TOE, RDMA and ISCSI4351 */4352struct xstorm_ip_v6_context_section {4353#if defined(__BIG_ENDIAN)4354 u16 pbf_hdr_cmd_rsvd_payload_len;4355 u8 pbf_hdr_cmd_rsvd_nxt_hdr;4356 u8 hop_limit;4357#elif defined(__LITTLE_ENDIAN)4358 u8 hop_limit;4359 u8 pbf_hdr_cmd_rsvd_nxt_hdr;4360 u16 pbf_hdr_cmd_rsvd_payload_len;4361#endif4362 u32 priority_flow_label;4363#define XSTORM_IP_V6_CONTEXT_SECTION_FLOW_LABEL (0xFFFFF<<0)4364#define XSTORM_IP_V6_CONTEXT_SECTION_FLOW_LABEL_SHIFT 04365#define XSTORM_IP_V6_CONTEXT_SECTION_TRAFFIC_CLASS (0xFF<<20)4366#define XSTORM_IP_V6_CONTEXT_SECTION_TRAFFIC_CLASS_SHIFT 204367#define XSTORM_IP_V6_CONTEXT_SECTION_PBF_HDR_CMD_RSVD_VER (0xF<<28)4368#define XSTORM_IP_V6_CONTEXT_SECTION_PBF_HDR_CMD_RSVD_VER_SHIFT 284369 u32 ip_local_addr_lo_hi;4370 u32 ip_local_addr_lo_lo;4371 u32 ip_local_addr_hi_hi;4372 u32 ip_local_addr_hi_lo;4373 u32 ip_remote_addr_lo_hi;4374 u32 ip_remote_addr_lo_lo;4375 u32 ip_remote_addr_hi_hi;4376 u32 ip_remote_addr_hi_lo;4377};4378 4379union xstorm_ip_context_section_types {4380 struct xstorm_padded_ip_v4_context_section padded_ip_v4;4381 struct xstorm_ip_v6_context_section ip_v6;4382};4383 4384/*4385 * TCP context section, shared in TOE, RDMA and ISCSI4386 */4387struct xstorm_tcp_context_section {4388 u32 snd_max;4389#if defined(__BIG_ENDIAN)4390 u16 remote_port;4391 u16 local_port;4392#elif defined(__LITTLE_ENDIAN)4393 u16 local_port;4394 u16 remote_port;4395#endif4396#if defined(__BIG_ENDIAN)4397 u8 original_nagle_1b;4398 u8 ts_enabled;4399 u16 tcp_params;4400#define XSTORM_TCP_CONTEXT_SECTION_TOTAL_HEADER_SIZE (0xFF<<0)4401#define XSTORM_TCP_CONTEXT_SECTION_TOTAL_HEADER_SIZE_SHIFT 04402#define __XSTORM_TCP_CONTEXT_SECTION_ECT_BIT (0x1<<8)4403#define __XSTORM_TCP_CONTEXT_SECTION_ECT_BIT_SHIFT 84404#define __XSTORM_TCP_CONTEXT_SECTION_ECN_ENABLED (0x1<<9)4405#define __XSTORM_TCP_CONTEXT_SECTION_ECN_ENABLED_SHIFT 94406#define XSTORM_TCP_CONTEXT_SECTION_SACK_ENABLED (0x1<<10)4407#define XSTORM_TCP_CONTEXT_SECTION_SACK_ENABLED_SHIFT 104408#define XSTORM_TCP_CONTEXT_SECTION_SMALL_WIN_ADV (0x1<<11)4409#define XSTORM_TCP_CONTEXT_SECTION_SMALL_WIN_ADV_SHIFT 114410#define XSTORM_TCP_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<12)4411#define XSTORM_TCP_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 124412#define XSTORM_TCP_CONTEXT_SECTION_WINDOW_SATURATED (0x1<<13)4413#define XSTORM_TCP_CONTEXT_SECTION_WINDOW_SATURATED_SHIFT 134414#define XSTORM_TCP_CONTEXT_SECTION_SLOWPATH_QUEUES_FLUSH_COUNTER (0x3<<14)4415#define XSTORM_TCP_CONTEXT_SECTION_SLOWPATH_QUEUES_FLUSH_COUNTER_SHIFT 144416#elif defined(__LITTLE_ENDIAN)4417 u16 tcp_params;4418#define XSTORM_TCP_CONTEXT_SECTION_TOTAL_HEADER_SIZE (0xFF<<0)4419#define XSTORM_TCP_CONTEXT_SECTION_TOTAL_HEADER_SIZE_SHIFT 04420#define __XSTORM_TCP_CONTEXT_SECTION_ECT_BIT (0x1<<8)4421#define __XSTORM_TCP_CONTEXT_SECTION_ECT_BIT_SHIFT 84422#define __XSTORM_TCP_CONTEXT_SECTION_ECN_ENABLED (0x1<<9)4423#define __XSTORM_TCP_CONTEXT_SECTION_ECN_ENABLED_SHIFT 94424#define XSTORM_TCP_CONTEXT_SECTION_SACK_ENABLED (0x1<<10)4425#define XSTORM_TCP_CONTEXT_SECTION_SACK_ENABLED_SHIFT 104426#define XSTORM_TCP_CONTEXT_SECTION_SMALL_WIN_ADV (0x1<<11)4427#define XSTORM_TCP_CONTEXT_SECTION_SMALL_WIN_ADV_SHIFT 114428#define XSTORM_TCP_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<12)4429#define XSTORM_TCP_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 124430#define XSTORM_TCP_CONTEXT_SECTION_WINDOW_SATURATED (0x1<<13)4431#define XSTORM_TCP_CONTEXT_SECTION_WINDOW_SATURATED_SHIFT 134432#define XSTORM_TCP_CONTEXT_SECTION_SLOWPATH_QUEUES_FLUSH_COUNTER (0x3<<14)4433#define XSTORM_TCP_CONTEXT_SECTION_SLOWPATH_QUEUES_FLUSH_COUNTER_SHIFT 144434 u8 ts_enabled;4435 u8 original_nagle_1b;4436#endif4437#if defined(__BIG_ENDIAN)4438 u16 pseudo_csum;4439 u16 window_scaling_factor;4440#elif defined(__LITTLE_ENDIAN)4441 u16 window_scaling_factor;4442 u16 pseudo_csum;4443#endif4444#if defined(__BIG_ENDIAN)4445 u16 reserved2;4446 u8 statistics_counter_id;4447 u8 statistics_params;4448#define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L2_STATSTICS (0x1<<0)4449#define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L2_STATSTICS_SHIFT 04450#define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L4_STATSTICS (0x1<<1)4451#define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L4_STATSTICS_SHIFT 14452#define XSTORM_TCP_CONTEXT_SECTION_RESERVED (0x3F<<2)4453#define XSTORM_TCP_CONTEXT_SECTION_RESERVED_SHIFT 24454#elif defined(__LITTLE_ENDIAN)4455 u8 statistics_params;4456#define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L2_STATSTICS (0x1<<0)4457#define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L2_STATSTICS_SHIFT 04458#define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L4_STATSTICS (0x1<<1)4459#define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L4_STATSTICS_SHIFT 14460#define XSTORM_TCP_CONTEXT_SECTION_RESERVED (0x3F<<2)4461#define XSTORM_TCP_CONTEXT_SECTION_RESERVED_SHIFT 24462 u8 statistics_counter_id;4463 u16 reserved2;4464#endif4465 u32 ts_time_diff;4466 u32 __next_timer_expir;4467};4468 4469/*4470 * Common context section, shared in TOE, RDMA and ISCSI4471 */4472struct xstorm_common_context_section {4473 struct xstorm_eth_context_section ethernet;4474 union xstorm_ip_context_section_types ip_union;4475 struct xstorm_tcp_context_section tcp;4476#if defined(__BIG_ENDIAN)4477 u8 __dcb_val;4478 u8 flags;4479#define XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED (0x1<<0)4480#define XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED_SHIFT 04481#define XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT (0x7<<1)4482#define XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT_SHIFT 14483#define XSTORM_COMMON_CONTEXT_SECTION_VLAN_MODE (0x1<<4)4484#define XSTORM_COMMON_CONTEXT_SECTION_VLAN_MODE_SHIFT 44485#define XSTORM_COMMON_CONTEXT_SECTION_ORIGINAL_PRIORITY (0x7<<5)4486#define XSTORM_COMMON_CONTEXT_SECTION_ORIGINAL_PRIORITY_SHIFT 54487 u8 reserved;4488 u8 ip_version_1b;4489#elif defined(__LITTLE_ENDIAN)4490 u8 ip_version_1b;4491 u8 reserved;4492 u8 flags;4493#define XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED (0x1<<0)4494#define XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED_SHIFT 04495#define XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT (0x7<<1)4496#define XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT_SHIFT 14497#define XSTORM_COMMON_CONTEXT_SECTION_VLAN_MODE (0x1<<4)4498#define XSTORM_COMMON_CONTEXT_SECTION_VLAN_MODE_SHIFT 44499#define XSTORM_COMMON_CONTEXT_SECTION_ORIGINAL_PRIORITY (0x7<<5)4500#define XSTORM_COMMON_CONTEXT_SECTION_ORIGINAL_PRIORITY_SHIFT 54501 u8 __dcb_val;4502#endif4503};4504 4505/*4506 * Flags used in ISCSI context section4507 */4508struct xstorm_iscsi_context_flags {4509 u8 flags;4510#define XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA (0x1<<0)4511#define XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA_SHIFT 04512#define XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T (0x1<<1)4513#define XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T_SHIFT 14514#define XSTORM_ISCSI_CONTEXT_FLAGS_B_EN_HEADER_DIGEST (0x1<<2)4515#define XSTORM_ISCSI_CONTEXT_FLAGS_B_EN_HEADER_DIGEST_SHIFT 24516#define XSTORM_ISCSI_CONTEXT_FLAGS_B_EN_DATA_DIGEST (0x1<<3)4517#define XSTORM_ISCSI_CONTEXT_FLAGS_B_EN_DATA_DIGEST_SHIFT 34518#define XSTORM_ISCSI_CONTEXT_FLAGS_B_HQ_BD_WRITTEN (0x1<<4)4519#define XSTORM_ISCSI_CONTEXT_FLAGS_B_HQ_BD_WRITTEN_SHIFT 44520#define XSTORM_ISCSI_CONTEXT_FLAGS_B_LAST_OP_SQ (0x1<<5)4521#define XSTORM_ISCSI_CONTEXT_FLAGS_B_LAST_OP_SQ_SHIFT 54522#define XSTORM_ISCSI_CONTEXT_FLAGS_B_UPDATE_SND_NXT (0x1<<6)4523#define XSTORM_ISCSI_CONTEXT_FLAGS_B_UPDATE_SND_NXT_SHIFT 64524#define XSTORM_ISCSI_CONTEXT_FLAGS_RESERVED4 (0x1<<7)4525#define XSTORM_ISCSI_CONTEXT_FLAGS_RESERVED4_SHIFT 74526};4527 4528struct iscsi_task_context_entry_x {4529 u32 data_out_buffer_offset;4530 u32 itt;4531 u32 data_sn;4532};4533 4534struct iscsi_task_context_entry_xuc_x_write_only {4535 u32 tx_r2t_sn;4536};4537 4538struct iscsi_task_context_entry_xuc_xu_write_both {4539 u32 sgl_base_lo;4540 u32 sgl_base_hi;4541#if defined(__BIG_ENDIAN)4542 u8 sgl_size;4543 u8 sge_index;4544 u16 sge_offset;4545#elif defined(__LITTLE_ENDIAN)4546 u16 sge_offset;4547 u8 sge_index;4548 u8 sgl_size;4549#endif4550};4551 4552/*4553 * iSCSI context section4554 */4555struct xstorm_iscsi_context_section {4556 u32 first_burst_length;4557 u32 max_send_pdu_length;4558 struct regpair sq_pbl_base;4559 struct regpair sq_curr_pbe;4560 struct regpair hq_pbl_base;4561 struct regpair hq_curr_pbe_base;4562 struct regpair r2tq_pbl_base;4563 struct regpair r2tq_curr_pbe_base;4564 struct regpair task_pbl_base;4565#if defined(__BIG_ENDIAN)4566 u16 data_out_count;4567 struct xstorm_iscsi_context_flags flags;4568 u8 task_pbl_cache_idx;4569#elif defined(__LITTLE_ENDIAN)4570 u8 task_pbl_cache_idx;4571 struct xstorm_iscsi_context_flags flags;4572 u16 data_out_count;4573#endif4574 u32 seq_more_2_send;4575 u32 pdu_more_2_send;4576 struct iscsi_task_context_entry_x temp_tce_x;4577 struct iscsi_task_context_entry_xuc_x_write_only temp_tce_x_wr;4578 struct iscsi_task_context_entry_xuc_xu_write_both temp_tce_xu_wr;4579 struct regpair lun;4580 u32 exp_data_transfer_len_ttt;4581 u32 pdu_data_2_rxmit;4582 u32 rxmit_bytes_2_dr;4583#if defined(__BIG_ENDIAN)4584 u16 rxmit_sge_offset;4585 u16 hq_rxmit_cons;4586#elif defined(__LITTLE_ENDIAN)4587 u16 hq_rxmit_cons;4588 u16 rxmit_sge_offset;4589#endif4590#if defined(__BIG_ENDIAN)4591 u16 r2tq_cons;4592 u8 rxmit_flags;4593#define XSTORM_ISCSI_CONTEXT_SECTION_B_NEW_HQ_BD (0x1<<0)4594#define XSTORM_ISCSI_CONTEXT_SECTION_B_NEW_HQ_BD_SHIFT 04595#define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PDU_HDR (0x1<<1)4596#define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PDU_HDR_SHIFT 14597#define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_END_PDU (0x1<<2)4598#define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_END_PDU_SHIFT 24599#define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_DR (0x1<<3)4600#define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_DR_SHIFT 34601#define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_START_DR (0x1<<4)4602#define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_START_DR_SHIFT 44603#define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PADDING (0x3<<5)4604#define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PADDING_SHIFT 54605#define XSTORM_ISCSI_CONTEXT_SECTION_B_ISCSI_CONT_FAST_RXMIT (0x1<<7)4606#define XSTORM_ISCSI_CONTEXT_SECTION_B_ISCSI_CONT_FAST_RXMIT_SHIFT 74607 u8 rxmit_sge_idx;4608#elif defined(__LITTLE_ENDIAN)4609 u8 rxmit_sge_idx;4610 u8 rxmit_flags;4611#define XSTORM_ISCSI_CONTEXT_SECTION_B_NEW_HQ_BD (0x1<<0)4612#define XSTORM_ISCSI_CONTEXT_SECTION_B_NEW_HQ_BD_SHIFT 04613#define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PDU_HDR (0x1<<1)4614#define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PDU_HDR_SHIFT 14615#define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_END_PDU (0x1<<2)4616#define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_END_PDU_SHIFT 24617#define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_DR (0x1<<3)4618#define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_DR_SHIFT 34619#define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_START_DR (0x1<<4)4620#define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_START_DR_SHIFT 44621#define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PADDING (0x3<<5)4622#define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PADDING_SHIFT 54623#define XSTORM_ISCSI_CONTEXT_SECTION_B_ISCSI_CONT_FAST_RXMIT (0x1<<7)4624#define XSTORM_ISCSI_CONTEXT_SECTION_B_ISCSI_CONT_FAST_RXMIT_SHIFT 74625 u16 r2tq_cons;4626#endif4627 u32 hq_rxmit_tcp_seq;4628};4629 4630/*4631 * Xstorm iSCSI Storm Context4632 */4633struct xstorm_iscsi_st_context {4634 struct xstorm_common_context_section common;4635 struct xstorm_iscsi_context_section iscsi;4636};4637 4638/*4639 * Iscsi connection context4640 */4641struct iscsi_context {4642 struct ustorm_iscsi_st_context ustorm_st_context;4643 struct tstorm_iscsi_st_context tstorm_st_context;4644 struct xstorm_iscsi_ag_context xstorm_ag_context;4645 struct tstorm_iscsi_ag_context tstorm_ag_context;4646 struct cstorm_iscsi_ag_context cstorm_ag_context;4647 struct ustorm_iscsi_ag_context ustorm_ag_context;4648 struct timers_block_context timers_context;4649 struct regpair upb_context;4650 struct xstorm_iscsi_st_context xstorm_st_context;4651 struct regpair xpb_context;4652 struct cstorm_iscsi_st_context cstorm_st_context;4653};4654 4655 4656/*4657 * PDU header of an iSCSI DATA-OUT4658 */4659struct iscsi_data_pdu_hdr_little_endian {4660#if defined(__BIG_ENDIAN)4661 u8 opcode;4662 u8 op_attr;4663#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_RSRV1 (0x7F<<0)4664#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 04665#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG (0x1<<7)4666#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG_SHIFT 74667 u16 rsrv0;4668#elif defined(__LITTLE_ENDIAN)4669 u16 rsrv0;4670 u8 op_attr;4671#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_RSRV1 (0x7F<<0)4672#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 04673#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG (0x1<<7)4674#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG_SHIFT 74675 u8 opcode;4676#endif4677 u32 data_fields;4678#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH (0xFFFFFF<<0)4679#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH_SHIFT 04680#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH (0xFF<<24)4681#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH_SHIFT 244682 struct regpair lun;4683 u32 itt;4684 u32 ttt;4685 u32 rsrv2;4686 u32 exp_stat_sn;4687 u32 rsrv3;4688 u32 data_sn;4689 u32 buffer_offset;4690 u32 rsrv4;4691};4692 4693 4694/*4695 * PDU header of an iSCSI login request4696 */4697struct iscsi_login_req_hdr_little_endian {4698#if defined(__BIG_ENDIAN)4699 u8 opcode;4700 u8 op_attr;4701#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_NSG (0x3<<0)4702#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_NSG_SHIFT 04703#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CSG (0x3<<2)4704#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CSG_SHIFT 24705#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_RSRV0 (0x3<<4)4706#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_RSRV0_SHIFT 44707#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG (0x1<<6)4708#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG_SHIFT 64709#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_TRANSIT (0x1<<7)4710#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_TRANSIT_SHIFT 74711 u8 version_max;4712 u8 version_min;4713#elif defined(__LITTLE_ENDIAN)4714 u8 version_min;4715 u8 version_max;4716 u8 op_attr;4717#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_NSG (0x3<<0)4718#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_NSG_SHIFT 04719#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CSG (0x3<<2)4720#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CSG_SHIFT 24721#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_RSRV0 (0x3<<4)4722#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_RSRV0_SHIFT 44723#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG (0x1<<6)4724#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG_SHIFT 64725#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_TRANSIT (0x1<<7)4726#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_TRANSIT_SHIFT 74727 u8 opcode;4728#endif4729 u32 data_fields;4730#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH (0xFFFFFF<<0)4731#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH_SHIFT 04732#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH (0xFF<<24)4733#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH_SHIFT 244734 u32 isid_lo;4735#if defined(__BIG_ENDIAN)4736 u16 isid_hi;4737 u16 tsih;4738#elif defined(__LITTLE_ENDIAN)4739 u16 tsih;4740 u16 isid_hi;4741#endif4742 u32 itt;4743#if defined(__BIG_ENDIAN)4744 u16 cid;4745 u16 rsrv1;4746#elif defined(__LITTLE_ENDIAN)4747 u16 rsrv1;4748 u16 cid;4749#endif4750 u32 cmd_sn;4751 u32 exp_stat_sn;4752 u32 rsrv2[4];4753};4754 4755/*4756 * PDU header of an iSCSI logout request4757 */4758struct iscsi_logout_req_hdr_little_endian {4759#if defined(__BIG_ENDIAN)4760 u8 opcode;4761 u8 op_attr;4762#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_REASON_CODE (0x7F<<0)4763#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_REASON_CODE_SHIFT 04764#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_RSRV1_1 (0x1<<7)4765#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_RSRV1_1_SHIFT 74766 u16 rsrv0;4767#elif defined(__LITTLE_ENDIAN)4768 u16 rsrv0;4769 u8 op_attr;4770#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_REASON_CODE (0x7F<<0)4771#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_REASON_CODE_SHIFT 04772#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_RSRV1_1 (0x1<<7)4773#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_RSRV1_1_SHIFT 74774 u8 opcode;4775#endif4776 u32 data_fields;4777#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH (0xFFFFFF<<0)4778#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH_SHIFT 04779#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH (0xFF<<24)4780#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH_SHIFT 244781 u32 rsrv2[2];4782 u32 itt;4783#if defined(__BIG_ENDIAN)4784 u16 cid;4785 u16 rsrv1;4786#elif defined(__LITTLE_ENDIAN)4787 u16 rsrv1;4788 u16 cid;4789#endif4790 u32 cmd_sn;4791 u32 exp_stat_sn;4792 u32 rsrv3[4];4793};4794 4795/*4796 * PDU header of an iSCSI TMF request4797 */4798struct iscsi_tmf_req_hdr_little_endian {4799#if defined(__BIG_ENDIAN)4800 u8 opcode;4801 u8 op_attr;4802#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_FUNCTION (0x7F<<0)4803#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_FUNCTION_SHIFT 04804#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_RSRV1_1 (0x1<<7)4805#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_RSRV1_1_SHIFT 74806 u16 rsrv0;4807#elif defined(__LITTLE_ENDIAN)4808 u16 rsrv0;4809 u8 op_attr;4810#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_FUNCTION (0x7F<<0)4811#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_FUNCTION_SHIFT 04812#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_RSRV1_1 (0x1<<7)4813#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_RSRV1_1_SHIFT 74814 u8 opcode;4815#endif4816 u32 data_fields;4817#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH (0xFFFFFF<<0)4818#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH_SHIFT 04819#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH (0xFF<<24)4820#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH_SHIFT 244821 struct regpair lun;4822 u32 itt;4823 u32 referenced_task_tag;4824 u32 cmd_sn;4825 u32 exp_stat_sn;4826 u32 ref_cmd_sn;4827 u32 exp_data_sn;4828 u32 rsrv2[2];4829};4830 4831/*4832 * PDU header of an iSCSI Text request4833 */4834struct iscsi_text_req_hdr_little_endian {4835#if defined(__BIG_ENDIAN)4836 u8 opcode;4837 u8 op_attr;4838#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_RSRV1 (0x3F<<0)4839#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 04840#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG (0x1<<6)4841#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG_SHIFT 64842#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_FINAL (0x1<<7)4843#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_FINAL_SHIFT 74844 u16 rsrv0;4845#elif defined(__LITTLE_ENDIAN)4846 u16 rsrv0;4847 u8 op_attr;4848#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_RSRV1 (0x3F<<0)4849#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 04850#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG (0x1<<6)4851#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG_SHIFT 64852#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_FINAL (0x1<<7)4853#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_FINAL_SHIFT 74854 u8 opcode;4855#endif4856 u32 data_fields;4857#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH (0xFFFFFF<<0)4858#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH_SHIFT 04859#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH (0xFF<<24)4860#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH_SHIFT 244861 struct regpair lun;4862 u32 itt;4863 u32 ttt;4864 u32 cmd_sn;4865 u32 exp_stat_sn;4866 u32 rsrv3[4];4867};4868 4869/*4870 * PDU header of an iSCSI Nop-Out4871 */4872struct iscsi_nop_out_hdr_little_endian {4873#if defined(__BIG_ENDIAN)4874 u8 opcode;4875 u8 op_attr;4876#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV1 (0x7F<<0)4877#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 04878#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV2_1 (0x1<<7)4879#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV2_1_SHIFT 74880 u16 rsrv0;4881#elif defined(__LITTLE_ENDIAN)4882 u16 rsrv0;4883 u8 op_attr;4884#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV1 (0x7F<<0)4885#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 04886#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV2_1 (0x1<<7)4887#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV2_1_SHIFT 74888 u8 opcode;4889#endif4890 u32 data_fields;4891#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH (0xFFFFFF<<0)4892#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH_SHIFT 04893#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH (0xFF<<24)4894#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH_SHIFT 244895 struct regpair lun;4896 u32 itt;4897 u32 ttt;4898 u32 cmd_sn;4899 u32 exp_stat_sn;4900 u32 rsrv3[4];4901};4902 4903/*4904 * iscsi pdu headers in little endian form.4905 */4906union iscsi_pdu_headers_little_endian {4907 u32 fullHeaderSize[12];4908 struct iscsi_cmd_pdu_hdr_little_endian command_pdu_hdr;4909 struct iscsi_data_pdu_hdr_little_endian data_out_pdu_hdr;4910 struct iscsi_login_req_hdr_little_endian login_req_pdu_hdr;4911 struct iscsi_logout_req_hdr_little_endian logout_req_pdu_hdr;4912 struct iscsi_tmf_req_hdr_little_endian tmf_req_pdu_hdr;4913 struct iscsi_text_req_hdr_little_endian text_req_pdu_hdr;4914 struct iscsi_nop_out_hdr_little_endian nop_out_pdu_hdr;4915};4916 4917struct iscsi_hq_bd {4918 union iscsi_pdu_headers_little_endian pdu_header;4919#if defined(__BIG_ENDIAN)4920 u16 reserved1;4921 u16 lcl_cmp_flg;4922#elif defined(__LITTLE_ENDIAN)4923 u16 lcl_cmp_flg;4924 u16 reserved1;4925#endif4926 u32 sgl_base_lo;4927 u32 sgl_base_hi;4928#if defined(__BIG_ENDIAN)4929 u8 sgl_size;4930 u8 sge_index;4931 u16 sge_offset;4932#elif defined(__LITTLE_ENDIAN)4933 u16 sge_offset;4934 u8 sge_index;4935 u8 sgl_size;4936#endif4937};4938 4939 4940/*4941 * CQE data for L2 OOO connection $$KEEP_ENDIANNESS$$4942 */4943struct iscsi_l2_ooo_data {4944 __le32 iscsi_cid;4945 u8 drop_isle;4946 u8 drop_size;4947 u8 ooo_opcode;4948 u8 ooo_isle;4949 u8 reserved[8];4950};4951 4952 4953 4954 4955 4956 4957struct iscsi_task_context_entry_xuc_c_write_only {4958 u32 total_data_acked;4959};4960 4961struct iscsi_task_context_r2t_table_entry {4962 u32 ttt;4963 u32 desired_data_len;4964};4965 4966struct iscsi_task_context_entry_xuc_u_write_only {4967 u32 exp_r2t_sn;4968 struct iscsi_task_context_r2t_table_entry r2t_table[4];4969#if defined(__BIG_ENDIAN)4970 u16 data_in_count;4971 u8 cq_id;4972 u8 valid_1b;4973#elif defined(__LITTLE_ENDIAN)4974 u8 valid_1b;4975 u8 cq_id;4976 u16 data_in_count;4977#endif4978};4979 4980struct iscsi_task_context_entry_xuc {4981 struct iscsi_task_context_entry_xuc_c_write_only write_c;4982 u32 exp_data_transfer_len;4983 struct iscsi_task_context_entry_xuc_x_write_only write_x;4984 u32 lun_lo;4985 struct iscsi_task_context_entry_xuc_xu_write_both write_xu;4986 u32 lun_hi;4987 struct iscsi_task_context_entry_xuc_u_write_only write_u;4988};4989 4990struct iscsi_task_context_entry_u {4991 u32 exp_r2t_buff_offset;4992 u32 rem_rcv_len;4993 u32 exp_data_sn;4994};4995 4996struct iscsi_task_context_entry {4997 struct iscsi_task_context_entry_x tce_x;4998#if defined(__BIG_ENDIAN)4999 u16 data_out_count;5000 u16 rsrv0;5001#elif defined(__LITTLE_ENDIAN)5002 u16 rsrv0;5003 u16 data_out_count;5004#endif5005 struct iscsi_task_context_entry_xuc tce_xuc;5006 struct iscsi_task_context_entry_u tce_u;5007 u32 rsrv1[7];5008};5009 5010 5011 5012 5013 5014 5015 5016 5017struct iscsi_task_context_entry_xuc_x_init_only {5018 struct regpair lun;5019 u32 exp_data_transfer_len;5020};5021 5022 5023 5024 5025 5026 5027 5028 5029 5030 5031 5032 5033 5034 5035 5036 5037 5038/*5039 * ipv6 structure5040 */5041struct ip_v6_addr {5042 u32 ip_addr_lo_lo;5043 u32 ip_addr_lo_hi;5044 u32 ip_addr_hi_lo;5045 u32 ip_addr_hi_hi;5046};5047 5048 5049 5050/*5051 * l5cm- connection identification params5052 */5053struct l5cm_conn_addr_params {5054 u32 pmtu;5055#if defined(__BIG_ENDIAN)5056 u8 remote_addr_3;5057 u8 remote_addr_2;5058 u8 remote_addr_1;5059 u8 remote_addr_0;5060#elif defined(__LITTLE_ENDIAN)5061 u8 remote_addr_0;5062 u8 remote_addr_1;5063 u8 remote_addr_2;5064 u8 remote_addr_3;5065#endif5066#if defined(__BIG_ENDIAN)5067 u16 params;5068#define L5CM_CONN_ADDR_PARAMS_IP_VERSION (0x1<<0)5069#define L5CM_CONN_ADDR_PARAMS_IP_VERSION_SHIFT 05070#define L5CM_CONN_ADDR_PARAMS_RSRV (0x7FFF<<1)5071#define L5CM_CONN_ADDR_PARAMS_RSRV_SHIFT 15072 u8 remote_addr_5;5073 u8 remote_addr_4;5074#elif defined(__LITTLE_ENDIAN)5075 u8 remote_addr_4;5076 u8 remote_addr_5;5077 u16 params;5078#define L5CM_CONN_ADDR_PARAMS_IP_VERSION (0x1<<0)5079#define L5CM_CONN_ADDR_PARAMS_IP_VERSION_SHIFT 05080#define L5CM_CONN_ADDR_PARAMS_RSRV (0x7FFF<<1)5081#define L5CM_CONN_ADDR_PARAMS_RSRV_SHIFT 15082#endif5083 struct ip_v6_addr local_ip_addr;5084 struct ip_v6_addr remote_ip_addr;5085 u32 ipv6_flow_label_20b;5086 u32 reserved1;5087#if defined(__BIG_ENDIAN)5088 u16 remote_tcp_port;5089 u16 local_tcp_port;5090#elif defined(__LITTLE_ENDIAN)5091 u16 local_tcp_port;5092 u16 remote_tcp_port;5093#endif5094};5095 5096/*5097 * l5cm-xstorm connection buffer5098 */5099struct l5cm_xstorm_conn_buffer {5100#if defined(__BIG_ENDIAN)5101 u16 rsrv1;5102 u16 params;5103#define L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE (0x1<<0)5104#define L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE_SHIFT 05105#define L5CM_XSTORM_CONN_BUFFER_RSRV (0x7FFF<<1)5106#define L5CM_XSTORM_CONN_BUFFER_RSRV_SHIFT 15107#elif defined(__LITTLE_ENDIAN)5108 u16 params;5109#define L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE (0x1<<0)5110#define L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE_SHIFT 05111#define L5CM_XSTORM_CONN_BUFFER_RSRV (0x7FFF<<1)5112#define L5CM_XSTORM_CONN_BUFFER_RSRV_SHIFT 15113 u16 rsrv1;5114#endif5115#if defined(__BIG_ENDIAN)5116 u16 mss;5117 u16 pseudo_header_checksum;5118#elif defined(__LITTLE_ENDIAN)5119 u16 pseudo_header_checksum;5120 u16 mss;5121#endif5122 u32 rcv_buf;5123 u32 rsrv2;5124 struct regpair context_addr;5125};5126 5127/*5128 * l5cm-tstorm connection buffer5129 */5130struct l5cm_tstorm_conn_buffer {5131 u32 rsrv1[2];5132#if defined(__BIG_ENDIAN)5133 u16 params;5134#define L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE (0x1<<0)5135#define L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE_SHIFT 05136#define L5CM_TSTORM_CONN_BUFFER_RSRV (0x7FFF<<1)5137#define L5CM_TSTORM_CONN_BUFFER_RSRV_SHIFT 15138 u8 ka_max_probe_count;5139 u8 ka_enable;5140#elif defined(__LITTLE_ENDIAN)5141 u8 ka_enable;5142 u8 ka_max_probe_count;5143 u16 params;5144#define L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE (0x1<<0)5145#define L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE_SHIFT 05146#define L5CM_TSTORM_CONN_BUFFER_RSRV (0x7FFF<<1)5147#define L5CM_TSTORM_CONN_BUFFER_RSRV_SHIFT 15148#endif5149 u32 ka_timeout;5150 u32 ka_interval;5151 u32 max_rt_time;5152};5153 5154/*5155 * l5cm connection buffer for active side5156 */5157struct l5cm_active_conn_buffer {5158 struct l5cm_conn_addr_params conn_addr_buf;5159 struct l5cm_xstorm_conn_buffer xstorm_conn_buffer;5160 struct l5cm_tstorm_conn_buffer tstorm_conn_buffer;5161};5162 5163 5164 5165/*5166 * The l5cm opaque buffer passed in add new connection ramrod passive side5167 */5168struct l5cm_hash_input_string {5169 u32 __opaque1;5170#if defined(__BIG_ENDIAN)5171 u16 __opaque3;5172 u16 __opaque2;5173#elif defined(__LITTLE_ENDIAN)5174 u16 __opaque2;5175 u16 __opaque3;5176#endif5177 struct ip_v6_addr __opaque4;5178 struct ip_v6_addr __opaque5;5179 u32 __opaque6;5180 u32 __opaque7[5];5181};5182 5183 5184/*5185 * syn cookie component5186 */5187struct l5cm_syn_cookie_comp {5188 u32 __opaque;5189};5190 5191/*5192 * data related to listeners of a TCP port5193 */5194struct l5cm_port_listener_data {5195 u8 params;5196#define L5CM_PORT_LISTENER_DATA_ENABLE (0x1<<0)5197#define L5CM_PORT_LISTENER_DATA_ENABLE_SHIFT 05198#define L5CM_PORT_LISTENER_DATA_IP_INDEX (0xF<<1)5199#define L5CM_PORT_LISTENER_DATA_IP_INDEX_SHIFT 15200#define L5CM_PORT_LISTENER_DATA_NET_FILTER (0x1<<5)5201#define L5CM_PORT_LISTENER_DATA_NET_FILTER_SHIFT 55202#define L5CM_PORT_LISTENER_DATA_DEFFERED_MODE (0x1<<6)5203#define L5CM_PORT_LISTENER_DATA_DEFFERED_MODE_SHIFT 65204#define L5CM_PORT_LISTENER_DATA_MPA_MODE (0x1<<7)5205#define L5CM_PORT_LISTENER_DATA_MPA_MODE_SHIFT 75206};5207 5208/*5209 * Opaque structure passed from U to X when final ack arrives5210 */5211struct l5cm_opaque_buf {5212 u32 __opaque1;5213 u32 __opaque2;5214 u32 __opaque3;5215 u32 __opaque4;5216 struct l5cm_syn_cookie_comp __opaque5;5217#if defined(__BIG_ENDIAN)5218 u16 rsrv2;5219 u8 rsrv;5220 struct l5cm_port_listener_data __opaque6;5221#elif defined(__LITTLE_ENDIAN)5222 struct l5cm_port_listener_data __opaque6;5223 u8 rsrv;5224 u16 rsrv2;5225#endif5226};5227 5228 5229/*5230 * l5cm slow path element5231 */5232struct l5cm_packet_size {5233 u32 size;5234 u32 rsrv;5235};5236 5237 5238/*5239 * The final-ack union structure in PCS entry after final ack arrived5240 */5241struct l5cm_pcse_ack {5242 struct l5cm_xstorm_conn_buffer tx_socket_params;5243 struct l5cm_opaque_buf opaque_buf;5244 struct l5cm_tstorm_conn_buffer rx_socket_params;5245};5246 5247 5248/*5249 * The syn union structure in PCS entry after syn arrived5250 */5251struct l5cm_pcse_syn {5252 struct l5cm_opaque_buf opaque_buf;5253 u32 rsrv[12];5254};5255 5256 5257/*5258 * pcs entry data for passive connections5259 */5260struct l5cm_pcs_attributes {5261#if defined(__BIG_ENDIAN)5262 u16 pcs_id;5263 u8 status;5264 u8 flags;5265#define L5CM_PCS_ATTRIBUTES_NET_FILTER (0x1<<0)5266#define L5CM_PCS_ATTRIBUTES_NET_FILTER_SHIFT 05267#define L5CM_PCS_ATTRIBUTES_CALCULATE_HASH (0x1<<1)5268#define L5CM_PCS_ATTRIBUTES_CALCULATE_HASH_SHIFT 15269#define L5CM_PCS_ATTRIBUTES_COMPARE_HASH_RESULT (0x1<<2)5270#define L5CM_PCS_ATTRIBUTES_COMPARE_HASH_RESULT_SHIFT 25271#define L5CM_PCS_ATTRIBUTES_QUERY_ULP_ACCEPT (0x1<<3)5272#define L5CM_PCS_ATTRIBUTES_QUERY_ULP_ACCEPT_SHIFT 35273#define L5CM_PCS_ATTRIBUTES_FIND_DEST_MAC (0x1<<4)5274#define L5CM_PCS_ATTRIBUTES_FIND_DEST_MAC_SHIFT 45275#define L5CM_PCS_ATTRIBUTES_L4_OFFLOAD (0x1<<5)5276#define L5CM_PCS_ATTRIBUTES_L4_OFFLOAD_SHIFT 55277#define L5CM_PCS_ATTRIBUTES_FORWARD_PACKET (0x1<<6)5278#define L5CM_PCS_ATTRIBUTES_FORWARD_PACKET_SHIFT 65279#define L5CM_PCS_ATTRIBUTES_RSRV (0x1<<7)5280#define L5CM_PCS_ATTRIBUTES_RSRV_SHIFT 75281#elif defined(__LITTLE_ENDIAN)5282 u8 flags;5283#define L5CM_PCS_ATTRIBUTES_NET_FILTER (0x1<<0)5284#define L5CM_PCS_ATTRIBUTES_NET_FILTER_SHIFT 05285#define L5CM_PCS_ATTRIBUTES_CALCULATE_HASH (0x1<<1)5286#define L5CM_PCS_ATTRIBUTES_CALCULATE_HASH_SHIFT 15287#define L5CM_PCS_ATTRIBUTES_COMPARE_HASH_RESULT (0x1<<2)5288#define L5CM_PCS_ATTRIBUTES_COMPARE_HASH_RESULT_SHIFT 25289#define L5CM_PCS_ATTRIBUTES_QUERY_ULP_ACCEPT (0x1<<3)5290#define L5CM_PCS_ATTRIBUTES_QUERY_ULP_ACCEPT_SHIFT 35291#define L5CM_PCS_ATTRIBUTES_FIND_DEST_MAC (0x1<<4)5292#define L5CM_PCS_ATTRIBUTES_FIND_DEST_MAC_SHIFT 45293#define L5CM_PCS_ATTRIBUTES_L4_OFFLOAD (0x1<<5)5294#define L5CM_PCS_ATTRIBUTES_L4_OFFLOAD_SHIFT 55295#define L5CM_PCS_ATTRIBUTES_FORWARD_PACKET (0x1<<6)5296#define L5CM_PCS_ATTRIBUTES_FORWARD_PACKET_SHIFT 65297#define L5CM_PCS_ATTRIBUTES_RSRV (0x1<<7)5298#define L5CM_PCS_ATTRIBUTES_RSRV_SHIFT 75299 u8 status;5300 u16 pcs_id;5301#endif5302};5303 5304 5305union l5cm_seg_params {5306 struct l5cm_pcse_syn syn_seg_params;5307 struct l5cm_pcse_ack ack_seg_params;5308};5309 5310/*5311 * pcs entry data for passive connections5312 */5313struct l5cm_pcs_hdr {5314 struct l5cm_hash_input_string hash_input_string;5315 struct l5cm_conn_addr_params conn_addr_buf;5316 u32 cid;5317 u32 hash_result;5318 union l5cm_seg_params seg_params;5319 struct l5cm_pcs_attributes att;5320#if defined(__BIG_ENDIAN)5321 u16 rsrv;5322 u16 rx_seg_size;5323#elif defined(__LITTLE_ENDIAN)5324 u16 rx_seg_size;5325 u16 rsrv;5326#endif5327};5328 5329/*5330 * pcs entry for passive connections5331 */5332struct l5cm_pcs_entry {5333 struct l5cm_pcs_hdr hdr;5334 u8 rx_segment[1516];5335};5336 5337 5338 5339 5340/*5341 * l5cm connection parameters5342 */5343union l5cm_reduce_param_union {5344 u32 opaque1;5345 u32 opaque2;5346};5347 5348/*5349 * l5cm connection parameters5350 */5351struct l5cm_reduce_conn {5352 union l5cm_reduce_param_union opaque1;5353 u32 opaque2;5354};5355 5356/*5357 * l5cm slow path element5358 */5359union l5cm_specific_data {5360 u8 protocol_data[8];5361 struct regpair phy_address;5362 struct l5cm_packet_size packet_size;5363 struct l5cm_reduce_conn reduced_conn;5364};5365 5366/*5367 * l5 slow path element5368 */5369struct l5cm_spe {5370 struct spe_hdr hdr;5371 union l5cm_specific_data data;5372};5373 5374 5375 5376 5377/*5378 * Termination variables5379 */5380struct l5cm_term_vars {5381 u8 BitMap;5382#define L5CM_TERM_VARS_TCP_STATE (0xF<<0)5383#define L5CM_TERM_VARS_TCP_STATE_SHIFT 05384#define L5CM_TERM_VARS_FIN_RECEIVED_SBIT (0x1<<4)5385#define L5CM_TERM_VARS_FIN_RECEIVED_SBIT_SHIFT 45386#define L5CM_TERM_VARS_ACK_ON_FIN_RECEIVED_SBIT (0x1<<5)5387#define L5CM_TERM_VARS_ACK_ON_FIN_RECEIVED_SBIT_SHIFT 55388#define L5CM_TERM_VARS_TERM_ON_CHIP (0x1<<6)5389#define L5CM_TERM_VARS_TERM_ON_CHIP_SHIFT 65390#define L5CM_TERM_VARS_RSRV (0x1<<7)5391#define L5CM_TERM_VARS_RSRV_SHIFT 75392};5393 5394 5395 5396 5397/*5398 * Tstorm Tcp flags5399 */5400struct tstorm_l5cm_tcp_flags {5401 u16 flags;5402#define TSTORM_L5CM_TCP_FLAGS_VLAN_ID (0xFFF<<0)5403#define TSTORM_L5CM_TCP_FLAGS_VLAN_ID_SHIFT 05404#define TSTORM_L5CM_TCP_FLAGS_DELAYED_ACK_EN (0x1<<12)5405#define TSTORM_L5CM_TCP_FLAGS_DELAYED_ACK_SHIFT 125406#define TSTORM_L5CM_TCP_FLAGS_TS_ENABLED (0x1<<13)5407#define TSTORM_L5CM_TCP_FLAGS_TS_ENABLED_SHIFT 135408#define TSTORM_L5CM_TCP_FLAGS_RSRV1 (0x3<<14)5409#define TSTORM_L5CM_TCP_FLAGS_RSRV1_SHIFT 145410};5411 5412 5413/*5414 * Xstorm Tcp flags5415 */5416struct xstorm_l5cm_tcp_flags {5417 u8 flags;5418#define XSTORM_L5CM_TCP_FLAGS_ENC_ENABLED (0x1<<0)5419#define XSTORM_L5CM_TCP_FLAGS_ENC_ENABLED_SHIFT 05420#define XSTORM_L5CM_TCP_FLAGS_TS_ENABLED (0x1<<1)5421#define XSTORM_L5CM_TCP_FLAGS_TS_ENABLED_SHIFT 15422#define XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN (0x1<<2)5423#define XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN_SHIFT 25424#define XSTORM_L5CM_TCP_FLAGS_RSRV (0x1F<<3)5425#define XSTORM_L5CM_TCP_FLAGS_RSRV_SHIFT 35426};5427 5428 5429 5430/*5431 * Out-of-order states5432 */5433enum tcp_ooo_event {5434 TCP_EVENT_ADD_PEN = 0,5435 TCP_EVENT_ADD_NEW_ISLE = 1,5436 TCP_EVENT_ADD_ISLE_RIGHT = 2,5437 TCP_EVENT_ADD_ISLE_LEFT = 3,5438 TCP_EVENT_JOIN = 4,5439 TCP_EVENT_NOP = 5,5440 MAX_TCP_OOO_EVENT5441};5442 5443 5444/*5445 * OOO support modes5446 */5447enum tcp_tstorm_ooo {5448 TCP_TSTORM_OOO_DROP_AND_PROC_ACK = 0,5449 TCP_TSTORM_OOO_SEND_PURE_ACK = 1,5450 TCP_TSTORM_OOO_SUPPORTED = 2,5451 MAX_TCP_TSTORM_OOO5452};5453 5454 5455 5456 5457 5458 5459 5460 5461 5462#endif /* __5710_HSI_CNIC_LE__ */5463