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1/**********************************************************************2 * Author: Cavium, Inc.3 *4 * Contact: support@cavium.com5 * Please include "LiquidIO" in the subject.6 *7 * Copyright (c) 2003-2016 Cavium, Inc.8 *9 * This file is free software; you can redistribute it and/or modify10 * it under the terms of the GNU General Public License, Version 2, as11 * published by the Free Software Foundation.12 *13 * This file is distributed in the hope that it will be useful, but14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or16 * NONINFRINGEMENT. See the GNU General Public License for more details.17 ***********************************************************************/18/*! \file cn68xx_regs.h19 * \brief Host Driver: Register Address and Register Mask values for20 * Octeon CN68XX devices. The register map for CN66XX is the same21 * for most registers. This file has the other registers that are22 * 68XX-specific.23 */24 25#ifndef __CN68XX_REGS_H__26#define __CN68XX_REGS_H__27 28/*###################### REQUEST QUEUE #########################*/29 30#define CN68XX_SLI_IQ_PORT0_PKIND 0x080031 32#define CN68XX_SLI_IQ_PORT_PKIND(iq) \33 (CN68XX_SLI_IQ_PORT0_PKIND + ((iq) * CN6XXX_IQ_OFFSET))34 35/*############################ OUTPUT QUEUE #########################*/36 37/* Starting pipe number and number of pipes used by the SLI packet output. */38#define CN68XX_SLI_TX_PIPE 0x123039 40/*######################## INTERRUPTS #########################*/41 42/*------------------ Interrupt Masks ----------------*/43#define CN68XX_INTR_PIPE_ERR BIT_ULL(61)44 45#endif46