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1/**********************************************************************2 * Author: Cavium, Inc.3 *4 * Contact: support@cavium.com5 * Please include "LiquidIO" in the subject.6 *7 * Copyright (c) 2003-2016 Cavium, Inc.8 *9 * This file is free software; you can redistribute it and/or modify10 * it under the terms of the GNU General Public License, Version 2, as11 * published by the Free Software Foundation.12 *13 * This file is distributed in the hope that it will be useful, but14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or16 * NONINFRINGEMENT. See the GNU General Public License for more details.17 ***********************************************************************/18/*! \file liquidio_common.h19 * \brief Common: Structures and macros used in PCI-NIC package by core and20 * host driver.21 */22 23#ifndef __LIQUIDIO_COMMON_H__24#define __LIQUIDIO_COMMON_H__25 26#include "octeon_config.h"27 28#define LIQUIDIO_BASE_MAJOR_VERSION 129#define LIQUIDIO_BASE_MINOR_VERSION 730#define LIQUIDIO_BASE_MICRO_VERSION 231#define LIQUIDIO_BASE_VERSION __stringify(LIQUIDIO_BASE_MAJOR_VERSION) "." \32 __stringify(LIQUIDIO_BASE_MINOR_VERSION)33 34struct lio_version {35 u16 major;36 u16 minor;37 u16 micro;38 u16 reserved;39};40 41#define CONTROL_IQ 042/** Tag types used by Octeon cores in its work. */43enum octeon_tag_type {44 ORDERED_TAG = 0,45 ATOMIC_TAG = 1,46 NULL_TAG = 2,47 NULL_NULL_TAG = 348};49 50/* pre-defined host->NIC tag values */51#define LIO_CONTROL (0x11111110)52#define LIO_DATA(i) (0x11111111 + (i))53 54/* Opcodes used by host driver/apps to perform operations on the core.55 * These are used to identify the major subsystem that the operation56 * is for.57 */58#define OPCODE_CORE 0 /* used for generic core operations */59#define OPCODE_NIC 1 /* used for NIC operations */60/* Subcodes are used by host driver/apps to identify the sub-operation61 * for the core. They only need to by unique for a given subsystem.62 */63#define OPCODE_SUBCODE(op, sub) ((((op) & 0x0f) << 8) | ((sub) & 0x7f))64 65/** OPCODE_CORE subcodes. For future use. */66 67/** OPCODE_NIC subcodes */68 69/* This subcode is sent by core PCI driver to indicate cores are ready. */70#define OPCODE_NIC_CORE_DRV_ACTIVE 0x0171#define OPCODE_NIC_NW_DATA 0x02 /* network packet data */72#define OPCODE_NIC_CMD 0x0373#define OPCODE_NIC_INFO 0x0474#define OPCODE_NIC_PORT_STATS 0x0575#define OPCODE_NIC_MDIO45 0x0676#define OPCODE_NIC_TIMESTAMP 0x0777#define OPCODE_NIC_INTRMOD_CFG 0x0878#define OPCODE_NIC_IF_CFG 0x0979#define OPCODE_NIC_VF_DRV_NOTICE 0x0A80#define OPCODE_NIC_INTRMOD_PARAMS 0x0B81#define OPCODE_NIC_QCOUNT_UPDATE 0x1282#define OPCODE_NIC_SET_TRUSTED_VF 0x1383#define OPCODE_NIC_SYNC_OCTEON_TIME 0x1484#define VF_DRV_LOADED 185#define VF_DRV_REMOVED -186#define VF_DRV_MACADDR_CHANGED 287 88#define OPCODE_NIC_VF_REP_PKT 0x1589#define OPCODE_NIC_VF_REP_CMD 0x1690#define OPCODE_NIC_UBOOT_CTL 0x1791 92#define CORE_DRV_TEST_SCATTER_OP 0xFFF593 94/* Application codes advertised by the core driver initialization packet. */95#define CVM_DRV_APP_START 0x096#define CVM_DRV_NO_APP 097#define CVM_DRV_APP_COUNT 0x298#define CVM_DRV_BASE_APP (CVM_DRV_APP_START + 0x0)99#define CVM_DRV_NIC_APP (CVM_DRV_APP_START + 0x1)100#define CVM_DRV_INVALID_APP (CVM_DRV_APP_START + 0x2)101#define CVM_DRV_APP_END (CVM_DRV_INVALID_APP - 1)102 103#define BYTES_PER_DHLEN_UNIT 8104#define MAX_REG_CNT 2000000U105#define INTRNAMSIZ 32106#define IRQ_NAME_OFF(i) ((i) * INTRNAMSIZ)107#define MAX_IOQ_INTERRUPTS_PER_PF (64 * 2)108#define MAX_IOQ_INTERRUPTS_PER_VF (8 * 2)109 110#define SCR2_BIT_FW_LOADED 63111 112/* App specific capabilities from firmware to pf driver */113#define LIQUIDIO_TIME_SYNC_CAP 0x1114#define LIQUIDIO_SWITCHDEV_CAP 0x2115#define LIQUIDIO_SPOOFCHK_CAP 0x4116 117/* error status return from firmware */118#define OCTEON_REQUEST_NO_PERMISSION 0xc119 120static inline u32 incr_index(u32 index, u32 count, u32 max)121{122 if ((index + count) >= max)123 index = index + count - max;124 else125 index += count;126 127 return index;128}129 130#define OCT_BOARD_NAME 32131#define OCT_SERIAL_LEN 64132 133/* Structure used by core driver to send indication that the Octeon134 * application is ready.135 */136struct octeon_core_setup {137 u64 corefreq;138 139 char boardname[OCT_BOARD_NAME];140 141 char board_serial_number[OCT_SERIAL_LEN];142 143 u64 board_rev_major;144 145 u64 board_rev_minor;146 147};148 149/*--------------------------- SCATTER GATHER ENTRY -----------------------*/150 151/* The Scatter-Gather List Entry. The scatter or gather component used with152 * a Octeon input instruction has this format.153 */154struct octeon_sg_entry {155 /** The first 64 bit gives the size of data in each dptr.*/156 union {157 u16 size[4];158 u64 size64;159 } u;160 161 /** The 4 dptr pointers for this entry. */162 u64 ptr[4];163 164};165 166#define OCT_SG_ENTRY_SIZE (sizeof(struct octeon_sg_entry))167 168/* \brief Add size to gather list169 * @param sg_entry scatter/gather entry170 * @param size size to add171 * @param pos position to add it.172 */173static inline void add_sg_size(struct octeon_sg_entry *sg_entry,174 u16 size,175 u32 pos)176{177#ifdef __BIG_ENDIAN_BITFIELD178 sg_entry->u.size[pos] = size;179#else180 sg_entry->u.size[3 - pos] = size;181#endif182}183 184/*------------------------- End Scatter/Gather ---------------------------*/185 186#define OCTNET_FRM_LENGTH_SIZE 8187 188#define OCTNET_FRM_PTP_HEADER_SIZE 8189 190#define OCTNET_FRM_HEADER_SIZE 22 /* VLAN + Ethernet */191 192#define OCTNET_MIN_FRM_SIZE 64193 194#define OCTNET_MAX_FRM_SIZE (16000 + OCTNET_FRM_HEADER_SIZE)195 196#define OCTNET_DEFAULT_MTU (1500)197#define OCTNET_DEFAULT_FRM_SIZE (OCTNET_DEFAULT_MTU + OCTNET_FRM_HEADER_SIZE)198 199/** NIC Commands are sent using this Octeon Input Queue */200#define OCTNET_CMD_Q 0201 202/* NIC Command types */203#define OCTNET_CMD_CHANGE_MTU 0x1204#define OCTNET_CMD_CHANGE_MACADDR 0x2205#define OCTNET_CMD_CHANGE_DEVFLAGS 0x3206#define OCTNET_CMD_RX_CTL 0x4207 208#define OCTNET_CMD_SET_MULTI_LIST 0x5209#define OCTNET_CMD_CLEAR_STATS 0x6210 211/* command for setting the speed, duplex & autoneg */212#define OCTNET_CMD_SET_SETTINGS 0x7213#define OCTNET_CMD_SET_FLOW_CTL 0x8214 215#define OCTNET_CMD_MDIO_READ_WRITE 0x9216#define OCTNET_CMD_GPIO_ACCESS 0xA217#define OCTNET_CMD_LRO_ENABLE 0xB218#define OCTNET_CMD_LRO_DISABLE 0xC219#define OCTNET_CMD_SET_RSS 0xD220#define OCTNET_CMD_WRITE_SA 0xE221#define OCTNET_CMD_DELETE_SA 0xF222#define OCTNET_CMD_UPDATE_SA 0x12223 224#define OCTNET_CMD_TNL_RX_CSUM_CTL 0x10225#define OCTNET_CMD_TNL_TX_CSUM_CTL 0x11226#define OCTNET_CMD_IPSECV2_AH_ESP_CTL 0x13227#define OCTNET_CMD_VERBOSE_ENABLE 0x14228#define OCTNET_CMD_VERBOSE_DISABLE 0x15229 230#define OCTNET_CMD_VLAN_FILTER_CTL 0x16231#define OCTNET_CMD_ADD_VLAN_FILTER 0x17232#define OCTNET_CMD_DEL_VLAN_FILTER 0x18233#define OCTNET_CMD_VXLAN_PORT_CONFIG 0x19234 235#define OCTNET_CMD_ID_ACTIVE 0x1a236 237#define OCTNET_CMD_SET_UC_LIST 0x1b238#define OCTNET_CMD_SET_VF_LINKSTATE 0x1c239 240#define OCTNET_CMD_QUEUE_COUNT_CTL 0x1f241 242#define OCTNET_CMD_GROUP1 1243#define OCTNET_CMD_SET_VF_SPOOFCHK 0x1244#define OCTNET_GROUP1_LAST_CMD OCTNET_CMD_SET_VF_SPOOFCHK245 246#define OCTNET_CMD_VXLAN_PORT_ADD 0x0247#define OCTNET_CMD_VXLAN_PORT_DEL 0x1248#define OCTNET_CMD_RXCSUM_ENABLE 0x0249#define OCTNET_CMD_RXCSUM_DISABLE 0x1250#define OCTNET_CMD_TXCSUM_ENABLE 0x0251#define OCTNET_CMD_TXCSUM_DISABLE 0x1252#define OCTNET_CMD_VLAN_FILTER_ENABLE 0x1253#define OCTNET_CMD_VLAN_FILTER_DISABLE 0x0254 255#define OCTNET_CMD_FAIL 0x1256 257#define SEAPI_CMD_FEC_SET 0x0258#define SEAPI_CMD_FEC_SET_DISABLE 0x0259#define SEAPI_CMD_FEC_SET_RS 0x1260#define SEAPI_CMD_FEC_GET 0x1261 262#define SEAPI_CMD_SPEED_SET 0x2263#define SEAPI_CMD_SPEED_GET 0x3264 265#define OPCODE_NIC_VF_PORT_STATS 0x22266 267#define LIO_CMD_WAIT_TM 100268 269/* RX(packets coming from wire) Checksum verification flags */270/* TCP/UDP csum */271#define CNNIC_L4SUM_VERIFIED 0x1272#define CNNIC_IPSUM_VERIFIED 0x2273#define CNNIC_TUN_CSUM_VERIFIED 0x4274#define CNNIC_CSUM_VERIFIED (CNNIC_IPSUM_VERIFIED | CNNIC_L4SUM_VERIFIED)275 276/*LROIPV4 and LROIPV6 Flags*/277#define OCTNIC_LROIPV4 0x1278#define OCTNIC_LROIPV6 0x2279 280/* Interface flags communicated between host driver and core app. */281enum octnet_ifflags {282 OCTNET_IFFLAG_PROMISC = 0x01,283 OCTNET_IFFLAG_ALLMULTI = 0x02,284 OCTNET_IFFLAG_MULTICAST = 0x04,285 OCTNET_IFFLAG_BROADCAST = 0x08,286 OCTNET_IFFLAG_UNICAST = 0x10287};288 289/* wqe290 * --------------- 0291 * | wqe word0-3 |292 * --------------- 32293 * | PCI IH |294 * --------------- 40295 * | RPTR |296 * --------------- 48297 * | PCI IRH |298 * --------------- 56299 * | OCT_NET_CMD |300 * --------------- 64301 * | Addtl 8-BData |302 * | |303 * ---------------304 */305 306union octnet_cmd {307 u64 u64;308 309 struct {310#ifdef __BIG_ENDIAN_BITFIELD311 u64 cmd:5;312 313 u64 more:6; /* How many udd words follow the command */314 315 u64 cmdgroup:8;316 u64 reserved:21;317 318 u64 param1:16;319 320 u64 param2:8;321 322#else323 324 u64 param2:8;325 326 u64 param1:16;327 328 u64 reserved:21;329 u64 cmdgroup:8;330 331 u64 more:6;332 333 u64 cmd:5;334 335#endif336 } s;337 338};339 340#define OCTNET_CMD_SIZE (sizeof(union octnet_cmd))341 342/*pkiih3 + irh + ossp[0] + ossp[1] + rdp + rptr = 40 bytes */343#define LIO_SOFTCMDRESP_IH2 40344#define LIO_SOFTCMDRESP_IH3 (40 + 8)345 346#define LIO_PCICMD_O2 24347#define LIO_PCICMD_O3 (24 + 8)348 349/* Instruction Header(DPI) - for OCTEON-III models */350struct octeon_instr_ih3 {351#ifdef __BIG_ENDIAN_BITFIELD352 353 /** Reserved3 */354 u64 reserved3:1;355 356 /** Gather indicator 1=gather*/357 u64 gather:1;358 359 /** Data length OR no. of entries in gather list */360 u64 dlengsz:14;361 362 /** Front Data size */363 u64 fsz:6;364 365 /** Reserved2 */366 u64 reserved2:4;367 368 /** PKI port kind - PKIND */369 u64 pkind:6;370 371 /** Reserved1 */372 u64 reserved1:32;373 374#else375 /** Reserved1 */376 u64 reserved1:32;377 378 /** PKI port kind - PKIND */379 u64 pkind:6;380 381 /** Reserved2 */382 u64 reserved2:4;383 384 /** Front Data size */385 u64 fsz:6;386 387 /** Data length OR no. of entries in gather list */388 u64 dlengsz:14;389 390 /** Gather indicator 1=gather*/391 u64 gather:1;392 393 /** Reserved3 */394 u64 reserved3:1;395 396#endif397};398 399/* Optional PKI Instruction Header(PKI IH) - for OCTEON-III models */400/** BIG ENDIAN format. */401struct octeon_instr_pki_ih3 {402#ifdef __BIG_ENDIAN_BITFIELD403 404 /** Wider bit */405 u64 w:1;406 407 /** Raw mode indicator 1 = RAW */408 u64 raw:1;409 410 /** Use Tag */411 u64 utag:1;412 413 /** Use QPG */414 u64 uqpg:1;415 416 /** Reserved2 */417 u64 reserved2:1;418 419 /** Parse Mode */420 u64 pm:3;421 422 /** Skip Length */423 u64 sl:8;424 425 /** Use Tag Type */426 u64 utt:1;427 428 /** Tag type */429 u64 tagtype:2;430 431 /** Reserved1 */432 u64 reserved1:2;433 434 /** QPG Value */435 u64 qpg:11;436 437 /** Tag Value */438 u64 tag:32;439 440#else441 442 /** Tag Value */443 u64 tag:32;444 445 /** QPG Value */446 u64 qpg:11;447 448 /** Reserved1 */449 u64 reserved1:2;450 451 /** Tag type */452 u64 tagtype:2;453 454 /** Use Tag Type */455 u64 utt:1;456 457 /** Skip Length */458 u64 sl:8;459 460 /** Parse Mode */461 u64 pm:3;462 463 /** Reserved2 */464 u64 reserved2:1;465 466 /** Use QPG */467 u64 uqpg:1;468 469 /** Use Tag */470 u64 utag:1;471 472 /** Raw mode indicator 1 = RAW */473 u64 raw:1;474 475 /** Wider bit */476 u64 w:1;477#endif478 479};480 481/** Instruction Header */482struct octeon_instr_ih2 {483#ifdef __BIG_ENDIAN_BITFIELD484 /** Raw mode indicator 1 = RAW */485 u64 raw:1;486 487 /** Gather indicator 1=gather*/488 u64 gather:1;489 490 /** Data length OR no. of entries in gather list */491 u64 dlengsz:14;492 493 /** Front Data size */494 u64 fsz:6;495 496 /** Packet Order / Work Unit selection (1 of 8)*/497 u64 qos:3;498 499 /** Core group selection (1 of 16) */500 u64 grp:4;501 502 /** Short Raw Packet Indicator 1=short raw pkt */503 u64 rs:1;504 505 /** Tag type */506 u64 tagtype:2;507 508 /** Tag Value */509 u64 tag:32;510#else511 /** Tag Value */512 u64 tag:32;513 514 /** Tag type */515 u64 tagtype:2;516 517 /** Short Raw Packet Indicator 1=short raw pkt */518 u64 rs:1;519 520 /** Core group selection (1 of 16) */521 u64 grp:4;522 523 /** Packet Order / Work Unit selection (1 of 8)*/524 u64 qos:3;525 526 /** Front Data size */527 u64 fsz:6;528 529 /** Data length OR no. of entries in gather list */530 u64 dlengsz:14;531 532 /** Gather indicator 1=gather*/533 u64 gather:1;534 535 /** Raw mode indicator 1 = RAW */536 u64 raw:1;537#endif538};539 540/** Input Request Header */541struct octeon_instr_irh {542#ifdef __BIG_ENDIAN_BITFIELD543 u64 opcode:4;544 u64 rflag:1;545 u64 subcode:7;546 u64 vlan:12;547 u64 priority:3;548 u64 reserved:5;549 u64 ossp:32; /* opcode/subcode specific parameters */550#else551 u64 ossp:32; /* opcode/subcode specific parameters */552 u64 reserved:5;553 u64 priority:3;554 u64 vlan:12;555 u64 subcode:7;556 u64 rflag:1;557 u64 opcode:4;558#endif559};560 561/** Return Data Parameters */562struct octeon_instr_rdp {563#ifdef __BIG_ENDIAN_BITFIELD564 u64 reserved:49;565 u64 pcie_port:3;566 u64 rlen:12;567#else568 u64 rlen:12;569 u64 pcie_port:3;570 u64 reserved:49;571#endif572};573 574/** Receive Header */575union octeon_rh {576#ifdef __BIG_ENDIAN_BITFIELD577 u64 u64;578 struct {579 u64 opcode:4;580 u64 subcode:8;581 u64 len:3; /** additional 64-bit words */582 u64 reserved:17;583 u64 ossp:32; /** opcode/subcode specific parameters */584 } r;585 struct {586 u64 opcode:4;587 u64 subcode:8;588 u64 len:3; /** additional 64-bit words */589 u64 extra:28;590 u64 vlan:12;591 u64 priority:3;592 u64 csum_verified:3; /** checksum verified. */593 u64 has_hwtstamp:1; /** Has hardware timestamp. 1 = yes. */594 u64 encap_on:1;595 u64 has_hash:1; /** Has hash (rth or rss). 1 = yes. */596 } r_dh;597 struct {598 u64 opcode:4;599 u64 subcode:8;600 u64 len:3; /** additional 64-bit words */601 u64 reserved:11;602 u64 num_gmx_ports:8;603 u64 max_nic_ports:10;604 u64 app_cap_flags:4;605 u64 app_mode:8;606 u64 pkind:8;607 } r_core_drv_init;608 struct {609 u64 opcode:4;610 u64 subcode:8;611 u64 len:3; /** additional 64-bit words */612 u64 reserved:8;613 u64 extra:25;614 u64 gmxport:16;615 } r_nic_info;616#else617 u64 u64;618 struct {619 u64 ossp:32; /** opcode/subcode specific parameters */620 u64 reserved:17;621 u64 len:3; /** additional 64-bit words */622 u64 subcode:8;623 u64 opcode:4;624 } r;625 struct {626 u64 has_hash:1; /** Has hash (rth or rss). 1 = yes. */627 u64 encap_on:1;628 u64 has_hwtstamp:1; /** 1 = has hwtstamp */629 u64 csum_verified:3; /** checksum verified. */630 u64 priority:3;631 u64 vlan:12;632 u64 extra:28;633 u64 len:3; /** additional 64-bit words */634 u64 subcode:8;635 u64 opcode:4;636 } r_dh;637 struct {638 u64 pkind:8;639 u64 app_mode:8;640 u64 app_cap_flags:4;641 u64 max_nic_ports:10;642 u64 num_gmx_ports:8;643 u64 reserved:11;644 u64 len:3; /** additional 64-bit words */645 u64 subcode:8;646 u64 opcode:4;647 } r_core_drv_init;648 struct {649 u64 gmxport:16;650 u64 extra:25;651 u64 reserved:8;652 u64 len:3; /** additional 64-bit words */653 u64 subcode:8;654 u64 opcode:4;655 } r_nic_info;656#endif657};658 659#define OCT_RH_SIZE (sizeof(union octeon_rh))660 661union octnic_packet_params {662 u32 u32;663 struct {664#ifdef __BIG_ENDIAN_BITFIELD665 u32 reserved:24;666 u32 ip_csum:1; /* Perform IP header checksum(s) */667 /* Perform Outer transport header checksum */668 u32 transport_csum:1;669 /* Find tunnel, and perform transport csum. */670 u32 tnl_csum:1;671 u32 tsflag:1; /* Timestamp this packet */672 u32 ipsec_ops:4; /* IPsec operation */673#else674 u32 ipsec_ops:4;675 u32 tsflag:1;676 u32 tnl_csum:1;677 u32 transport_csum:1;678 u32 ip_csum:1;679 u32 reserved:24;680#endif681 } s;682};683 684/** Status of a RGMII Link on Octeon as seen by core driver. */685union oct_link_status {686 u64 u64;687 688 struct {689#ifdef __BIG_ENDIAN_BITFIELD690 u64 duplex:8;691 u64 mtu:16;692 u64 speed:16;693 u64 link_up:1;694 u64 autoneg:1;695 u64 if_mode:5;696 u64 pause:1;697 u64 flashing:1;698 u64 phy_type:5;699 u64 reserved:10;700#else701 u64 reserved:10;702 u64 phy_type:5;703 u64 flashing:1;704 u64 pause:1;705 u64 if_mode:5;706 u64 autoneg:1;707 u64 link_up:1;708 u64 speed:16;709 u64 mtu:16;710 u64 duplex:8;711#endif712 } s;713};714 715enum lio_phy_type {716 LIO_PHY_PORT_TP = 0x0,717 LIO_PHY_PORT_FIBRE = 0x1,718 LIO_PHY_PORT_UNKNOWN,719};720 721/** The txpciq info passed to host from the firmware */722 723union oct_txpciq {724 u64 u64;725 726 struct {727#ifdef __BIG_ENDIAN_BITFIELD728 u64 q_no:8;729 u64 port:8;730 u64 pkind:6;731 u64 use_qpg:1;732 u64 qpg:11;733 u64 reserved0:10;734 u64 ctrl_qpg:11;735 u64 reserved:9;736#else737 u64 reserved:9;738 u64 ctrl_qpg:11;739 u64 reserved0:10;740 u64 qpg:11;741 u64 use_qpg:1;742 u64 pkind:6;743 u64 port:8;744 u64 q_no:8;745#endif746 } s;747};748 749/** The rxpciq info passed to host from the firmware */750 751union oct_rxpciq {752 u64 u64;753 754 struct {755#ifdef __BIG_ENDIAN_BITFIELD756 u64 q_no:8;757 u64 reserved:56;758#else759 u64 reserved:56;760 u64 q_no:8;761#endif762 } s;763};764 765/** Information for a OCTEON ethernet interface shared between core & host. */766struct oct_link_info {767 union oct_link_status link;768 u64 hw_addr;769 770#ifdef __BIG_ENDIAN_BITFIELD771 u64 gmxport:16;772 u64 macaddr_is_admin_asgnd:1;773 u64 rsvd:13;774 u64 macaddr_spoofchk:1;775 u64 rsvd1:17;776 u64 num_txpciq:8;777 u64 num_rxpciq:8;778#else779 u64 num_rxpciq:8;780 u64 num_txpciq:8;781 u64 rsvd1:17;782 u64 macaddr_spoofchk:1;783 u64 rsvd:13;784 u64 macaddr_is_admin_asgnd:1;785 u64 gmxport:16;786#endif787 788 union oct_txpciq txpciq[MAX_IOQS_PER_NICIF];789 union oct_rxpciq rxpciq[MAX_IOQS_PER_NICIF];790};791 792#define OCT_LINK_INFO_SIZE (sizeof(struct oct_link_info))793 794struct liquidio_if_cfg_info {795 u64 iqmask; /** mask for IQs enabled for the port */796 u64 oqmask; /** mask for OQs enabled for the port */797 struct oct_link_info linfo; /** initial link information */798 char liquidio_firmware_version[32];799};800 801/** Stats for each NIC port in RX direction. */802struct nic_rx_stats {803 /* link-level stats */804 u64 total_rcvd; /* Received packets */805 u64 bytes_rcvd; /* Octets of received packets */806 u64 total_bcst; /* Number of non-dropped L2 broadcast packets */807 u64 total_mcst; /* Number of non-dropped L2 multicast packets */808 u64 runts; /* Packets shorter than allowed */809 u64 ctl_rcvd; /* Received PAUSE packets */810 u64 fifo_err; /* Packets dropped due to RX FIFO full */811 u64 dmac_drop; /* Packets dropped by the DMAC filter */812 u64 fcs_err; /* Sum of fragment, overrun, and FCS errors */813 u64 jabber_err; /* Packets larger than allowed */814 u64 l2_err; /* Sum of DMA, parity, PCAM access, no memory,815 * buffer overflow, malformed L2 header or816 * length, oversize errors817 **/818 u64 frame_err; /* Sum of IPv4 and L4 checksum errors */819 u64 red_drops; /* Packets dropped by RED due to buffer820 * exhaustion821 **/822 823 /* firmware stats */824 u64 fw_total_rcvd;825 u64 fw_total_fwd;826 u64 fw_total_fwd_bytes;827 u64 fw_total_mcast;828 u64 fw_total_bcast;829 830 u64 fw_err_pko;831 u64 fw_err_link;832 u64 fw_err_drop;833 u64 fw_rx_vxlan;834 u64 fw_rx_vxlan_err;835 836 /* LRO */837 u64 fw_lro_pkts; /* Number of packets that are LROed */838 u64 fw_lro_octs; /* Number of octets that are LROed */839 u64 fw_total_lro; /* Number of LRO packets formed */840 u64 fw_lro_aborts; /* Number of times LRO of packet aborted */841 u64 fw_lro_aborts_port;842 u64 fw_lro_aborts_seq;843 u64 fw_lro_aborts_tsval;844 u64 fw_lro_aborts_timer; /* Timer setting error */845 /* intrmod: packet forward rate */846 u64 fwd_rate;847};848 849/** Stats for each NIC port in RX direction. */850struct nic_tx_stats {851 /* link-level stats */852 u64 total_pkts_sent; /* Total frames sent on the interface */853 u64 total_bytes_sent; /* Total octets sent on the interface */854 u64 mcast_pkts_sent; /* Packets sent to the multicast DMAC */855 u64 bcast_pkts_sent; /* Packets sent to a broadcast DMAC */856 u64 ctl_sent; /* Control/PAUSE packets sent */857 u64 one_collision_sent; /* Packets sent that experienced a858 * single collision before successful859 * transmission860 **/861 u64 multi_collision_sent; /* Packets sent that experienced862 * multiple collisions before successful863 * transmission864 **/865 u64 max_collision_fail; /* Packets dropped due to excessive866 * collisions867 **/868 u64 max_deferral_fail; /* Packets not sent due to max869 * deferrals870 **/871 u64 fifo_err; /* Packets sent that experienced a872 * transmit underflow and were873 * truncated874 **/875 u64 runts; /* Packets sent with an octet count876 * lessthan 64877 **/878 u64 total_collisions; /* Packets dropped due to excessive879 * collisions880 **/881 882 /* firmware stats */883 u64 fw_total_sent;884 u64 fw_total_fwd;885 u64 fw_total_fwd_bytes;886 u64 fw_total_mcast_sent;887 u64 fw_total_bcast_sent;888 u64 fw_err_pko;889 u64 fw_err_link;890 u64 fw_err_drop;891 u64 fw_err_tso;892 u64 fw_tso; /* number of tso requests */893 u64 fw_tso_fwd; /* number of packets segmented in tso */894 u64 fw_tx_vxlan;895 u64 fw_err_pki;896};897 898struct oct_link_stats {899 struct nic_rx_stats fromwire;900 struct nic_tx_stats fromhost;901 902};903 904static inline int opcode_slow_path(union octeon_rh *rh)905{906 u16 subcode1, subcode2;907 908 subcode1 = OPCODE_SUBCODE((rh)->r.opcode, (rh)->r.subcode);909 subcode2 = OPCODE_SUBCODE(OPCODE_NIC, OPCODE_NIC_NW_DATA);910 911 return (subcode2 != subcode1);912}913 914#define LIO68XX_LED_CTRL_ADDR 0x3501915#define LIO68XX_LED_CTRL_CFGON 0x1f916#define LIO68XX_LED_CTRL_CFGOFF 0x100917#define LIO68XX_LED_BEACON_ADDR 0x3508918#define LIO68XX_LED_BEACON_CFGON 0x47fd919#define LIO68XX_LED_BEACON_CFGOFF 0x11fc920#define VITESSE_PHY_GPIO_DRIVEON 0x1921#define VITESSE_PHY_GPIO_CFG 0x8922#define VITESSE_PHY_GPIO_DRIVEOFF 0x4923#define VITESSE_PHY_GPIO_HIGH 0x2924#define VITESSE_PHY_GPIO_LOW 0x3925#define LED_IDENTIFICATION_ON 0x1926#define LED_IDENTIFICATION_OFF 0x0927#define LIO23XX_COPPERHEAD_LED_GPIO 0x2928 929struct oct_mdio_cmd {930 u64 op;931 u64 mdio_addr;932 u64 value1;933 u64 value2;934 u64 value3;935};936 937#define OCT_LINK_STATS_SIZE (sizeof(struct oct_link_stats))938 939struct oct_intrmod_cfg {940 u64 rx_enable;941 u64 tx_enable;942 u64 check_intrvl;943 u64 maxpkt_ratethr;944 u64 minpkt_ratethr;945 u64 rx_maxcnt_trigger;946 u64 rx_mincnt_trigger;947 u64 rx_maxtmr_trigger;948 u64 rx_mintmr_trigger;949 u64 tx_mincnt_trigger;950 u64 tx_maxcnt_trigger;951 u64 rx_frames;952 u64 tx_frames;953 u64 rx_usecs;954};955 956#define BASE_QUEUE_NOT_REQUESTED 65535957 958union oct_nic_if_cfg {959 u64 u64;960 struct {961#ifdef __BIG_ENDIAN_BITFIELD962 u64 base_queue:16;963 u64 num_iqueues:16;964 u64 num_oqueues:16;965 u64 gmx_port_id:8;966 u64 vf_id:8;967#else968 u64 vf_id:8;969 u64 gmx_port_id:8;970 u64 num_oqueues:16;971 u64 num_iqueues:16;972 u64 base_queue:16;973#endif974 } s;975};976 977struct lio_trusted_vf {978 uint64_t active: 1;979 uint64_t id : 8;980 uint64_t reserved: 55;981};982 983struct lio_time {984 s64 sec; /* seconds */985 s64 nsec; /* nanoseconds */986};987 988struct lio_vf_rep_stats {989 u64 tx_packets;990 u64 tx_bytes;991 u64 tx_dropped;992 993 u64 rx_packets;994 u64 rx_bytes;995 u64 rx_dropped;996};997 998enum lio_vf_rep_req_type {999 LIO_VF_REP_REQ_NONE,1000 LIO_VF_REP_REQ_STATE,1001 LIO_VF_REP_REQ_MTU,1002 LIO_VF_REP_REQ_STATS,1003 LIO_VF_REP_REQ_DEVNAME1004};1005 1006enum {1007 LIO_VF_REP_STATE_DOWN,1008 LIO_VF_REP_STATE_UP1009};1010 1011#define LIO_IF_NAME_SIZE 161012struct lio_vf_rep_req {1013 u8 req_type;1014 u8 ifidx;1015 u8 rsvd[6];1016 1017 union {1018 struct lio_vf_rep_name {1019 char name[LIO_IF_NAME_SIZE];1020 } rep_name;1021 1022 struct lio_vf_rep_mtu {1023 u32 mtu;1024 u32 rsvd;1025 } rep_mtu;1026 1027 struct lio_vf_rep_state {1028 u8 state;1029 u8 rsvd[7];1030 } rep_state;1031 };1032};1033 1034struct lio_vf_rep_resp {1035 u64 rh;1036 u8 status;1037 u8 rsvd[7];1038};1039#endif1040