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1/* SPDX-License-Identifier: GPL-2.0 */2/* $Date: 2005/03/07 23:59:05 $ $RCSfile: mv88e1xxx.h,v $ $Revision: 1.13 $ */3#ifndef CHELSIO_MV8E1XXX_H4#define CHELSIO_MV8E1XXX_H5 6#ifndef BMCR_SPEED10007# define BMCR_SPEED1000 0x408#endif9 10#ifndef ADVERTISE_PAUSE11# define ADVERTISE_PAUSE 0x40012#endif13#ifndef ADVERTISE_PAUSE_ASYM14# define ADVERTISE_PAUSE_ASYM 0x80015#endif16 17/* Gigabit MII registers */18#define MII_GBCR 9 /* 1000Base-T control register */19#define MII_GBSR 10 /* 1000Base-T status register */20 21/* 1000Base-T control register fields */22#define GBCR_ADV_1000HALF 0x10023#define GBCR_ADV_1000FULL 0x20024#define GBCR_PREFER_MASTER 0x40025#define GBCR_MANUAL_AS_MASTER 0x80026#define GBCR_MANUAL_CONFIG_ENABLE 0x100027 28/* 1000Base-T status register fields */29#define GBSR_LP_1000HALF 0x40030#define GBSR_LP_1000FULL 0x80031#define GBSR_REMOTE_OK 0x100032#define GBSR_LOCAL_OK 0x200033#define GBSR_LOCAL_MASTER 0x400034#define GBSR_MASTER_FAULT 0x800035 36/* Marvell PHY interrupt status bits. */37#define MV88E1XXX_INTR_JABBER 0x000138#define MV88E1XXX_INTR_POLARITY_CHNG 0x000239#define MV88E1XXX_INTR_ENG_DETECT_CHNG 0x001040#define MV88E1XXX_INTR_DOWNSHIFT 0x002041#define MV88E1XXX_INTR_MDI_XOVER_CHNG 0x004042#define MV88E1XXX_INTR_FIFO_OVER_UNDER 0x008043#define MV88E1XXX_INTR_FALSE_CARRIER 0x010044#define MV88E1XXX_INTR_SYMBOL_ERROR 0x020045#define MV88E1XXX_INTR_LINK_CHNG 0x040046#define MV88E1XXX_INTR_AUTONEG_DONE 0x080047#define MV88E1XXX_INTR_PAGE_RECV 0x100048#define MV88E1XXX_INTR_DUPLEX_CHNG 0x200049#define MV88E1XXX_INTR_SPEED_CHNG 0x400050#define MV88E1XXX_INTR_AUTONEG_ERR 0x800051 52/* Marvell PHY specific registers. */53#define MV88E1XXX_SPECIFIC_CNTRL_REGISTER 1654#define MV88E1XXX_SPECIFIC_STATUS_REGISTER 1755#define MV88E1XXX_INTERRUPT_ENABLE_REGISTER 1856#define MV88E1XXX_INTERRUPT_STATUS_REGISTER 1957#define MV88E1XXX_EXT_PHY_SPECIFIC_CNTRL_REGISTER 2058#define MV88E1XXX_RECV_ERR_CNTR_REGISTER 2159#define MV88E1XXX_RES_REGISTER 2260#define MV88E1XXX_GLOBAL_STATUS_REGISTER 2361#define MV88E1XXX_LED_CONTROL_REGISTER 2462#define MV88E1XXX_MANUAL_LED_OVERRIDE_REGISTER 2563#define MV88E1XXX_EXT_PHY_SPECIFIC_CNTRL_2_REGISTER 2664#define MV88E1XXX_EXT_PHY_SPECIFIC_STATUS_REGISTER 2765#define MV88E1XXX_VIRTUAL_CABLE_TESTER_REGISTER 2866#define MV88E1XXX_EXTENDED_ADDR_REGISTER 2967#define MV88E1XXX_EXTENDED_REGISTER 3068 69/* PHY specific control register fields */70#define S_PSCR_MDI_XOVER_MODE 571#define M_PSCR_MDI_XOVER_MODE 0x372#define V_PSCR_MDI_XOVER_MODE(x) ((x) << S_PSCR_MDI_XOVER_MODE)73#define G_PSCR_MDI_XOVER_MODE(x) (((x) >> S_PSCR_MDI_XOVER_MODE) & M_PSCR_MDI_XOVER_MODE)74 75/* Extended PHY specific control register fields */76#define S_DOWNSHIFT_ENABLE 877#define V_DOWNSHIFT_ENABLE (1 << S_DOWNSHIFT_ENABLE)78 79#define S_DOWNSHIFT_CNT 980#define M_DOWNSHIFT_CNT 0x781#define V_DOWNSHIFT_CNT(x) ((x) << S_DOWNSHIFT_CNT)82#define G_DOWNSHIFT_CNT(x) (((x) >> S_DOWNSHIFT_CNT) & M_DOWNSHIFT_CNT)83 84/* PHY specific status register fields */85#define S_PSSR_JABBER 086#define V_PSSR_JABBER (1 << S_PSSR_JABBER)87 88#define S_PSSR_POLARITY 189#define V_PSSR_POLARITY (1 << S_PSSR_POLARITY)90 91#define S_PSSR_RX_PAUSE 292#define V_PSSR_RX_PAUSE (1 << S_PSSR_RX_PAUSE)93 94#define S_PSSR_TX_PAUSE 395#define V_PSSR_TX_PAUSE (1 << S_PSSR_TX_PAUSE)96 97#define S_PSSR_ENERGY_DETECT 498#define V_PSSR_ENERGY_DETECT (1 << S_PSSR_ENERGY_DETECT)99 100#define S_PSSR_DOWNSHIFT_STATUS 5101#define V_PSSR_DOWNSHIFT_STATUS (1 << S_PSSR_DOWNSHIFT_STATUS)102 103#define S_PSSR_MDI 6104#define V_PSSR_MDI (1 << S_PSSR_MDI)105 106#define S_PSSR_CABLE_LEN 7107#define M_PSSR_CABLE_LEN 0x7108#define V_PSSR_CABLE_LEN(x) ((x) << S_PSSR_CABLE_LEN)109#define G_PSSR_CABLE_LEN(x) (((x) >> S_PSSR_CABLE_LEN) & M_PSSR_CABLE_LEN)110 111#define S_PSSR_LINK 10112#define V_PSSR_LINK (1 << S_PSSR_LINK)113 114#define S_PSSR_STATUS_RESOLVED 11115#define V_PSSR_STATUS_RESOLVED (1 << S_PSSR_STATUS_RESOLVED)116 117#define S_PSSR_PAGE_RECEIVED 12118#define V_PSSR_PAGE_RECEIVED (1 << S_PSSR_PAGE_RECEIVED)119 120#define S_PSSR_DUPLEX 13121#define V_PSSR_DUPLEX (1 << S_PSSR_DUPLEX)122 123#define S_PSSR_SPEED 14124#define M_PSSR_SPEED 0x3125#define V_PSSR_SPEED(x) ((x) << S_PSSR_SPEED)126#define G_PSSR_SPEED(x) (((x) >> S_PSSR_SPEED) & M_PSSR_SPEED)127 128#endif129