brintos

brintos / linux-shallow public Read only

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1/*2 * Copyright (c) 2004-2008 Chelsio, Inc. All rights reserved.3 *4 * This software is available to you under a choice of one of two5 * licenses.  You may choose to be licensed under the terms of the GNU6 * General Public License (GPL) Version 2, available from the file7 * COPYING in the main directory of this source tree, or the8 * OpenIB.org BSD license below:9 *10 *     Redistribution and use in source and binary forms, with or11 *     without modification, are permitted provided that the following12 *     conditions are met:13 *14 *      - Redistributions of source code must retain the above15 *        copyright notice, this list of conditions and the following16 *        disclaimer.17 *18 *      - Redistributions in binary form must reproduce the above19 *        copyright notice, this list of conditions and the following20 *        disclaimer in the documentation and/or other materials21 *        provided with the distribution.22 *23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE30 * SOFTWARE.31 */32#ifndef _FIRMWARE_EXPORTS_H_33#define _FIRMWARE_EXPORTS_H_34 35/* WR OPCODES supported by the firmware.36 */37#define	FW_WROPCODE_FORWARD			0x0138#define FW_WROPCODE_BYPASS			0x0539 40#define FW_WROPCODE_TUNNEL_TX_PKT		0x0341 42#define FW_WROPOCDE_ULPTX_DATA_SGL		0x0043#define FW_WROPCODE_ULPTX_MEM_READ		0x0244#define FW_WROPCODE_ULPTX_PKT			0x0445#define FW_WROPCODE_ULPTX_INVALIDATE		0x0646 47#define FW_WROPCODE_TUNNEL_RX_PKT		0x0748 49#define FW_WROPCODE_OFLD_GETTCB_RPL		0x0850#define FW_WROPCODE_OFLD_CLOSE_CON		0x0951#define FW_WROPCODE_OFLD_TP_ABORT_CON_REQ	0x0A52#define FW_WROPCODE_OFLD_HOST_ABORT_CON_RPL	0x0F53#define FW_WROPCODE_OFLD_HOST_ABORT_CON_REQ	0x0B54#define FW_WROPCODE_OFLD_TP_ABORT_CON_RPL	0x0C55#define FW_WROPCODE_OFLD_TX_DATA		0x0D56#define FW_WROPCODE_OFLD_TX_DATA_ACK		0x0E57 58#define FW_WROPCODE_RI_RDMA_INIT		0x1059#define FW_WROPCODE_RI_RDMA_WRITE		0x1160#define FW_WROPCODE_RI_RDMA_READ_REQ		0x1261#define FW_WROPCODE_RI_RDMA_READ_RESP		0x1362#define FW_WROPCODE_RI_SEND			0x1463#define FW_WROPCODE_RI_TERMINATE		0x1564#define FW_WROPCODE_RI_RDMA_READ		0x1665#define FW_WROPCODE_RI_RECEIVE			0x1766#define FW_WROPCODE_RI_BIND_MW			0x1867#define FW_WROPCODE_RI_FASTREGISTER_MR		0x1968#define FW_WROPCODE_RI_LOCAL_INV		0x1A69#define FW_WROPCODE_RI_MODIFY_QP		0x1B70#define FW_WROPCODE_RI_BYPASS			0x1C71 72#define FW_WROPOCDE_RSVD			0x1E73 74#define FW_WROPCODE_SGE_EGRESSCONTEXT_RR	0x1F75 76#define FW_WROPCODE_MNGT			0x1D77#define FW_MNGTOPCODE_PKTSCHED_SET		0x0078 79/* Maximum size of a WR sent from the host, limited by the SGE.80 *81 * Note: WR coming from ULP or TP are only limited by CIM.82 */83#define FW_WR_SIZE			12884 85/* Maximum number of outstanding WRs sent from the host. Value must be86 * programmed in the CTRL/TUNNEL/QP SGE Egress Context and used by87 * offload modules to limit the number of WRs per connection.88 */89#define FW_T3_WR_NUM			1690#define FW_N3_WR_NUM			791 92#ifndef N393# define FW_WR_NUM			FW_T3_WR_NUM94#else95# define FW_WR_NUM			FW_N3_WR_NUM96#endif97 98/* FW_TUNNEL_NUM corresponds to the number of supported TUNNEL Queues. These99 * queues must start at SGE Egress Context FW_TUNNEL_SGEEC_START and must100 * start at 'TID' (or 'uP Token') FW_TUNNEL_TID_START.101 *102 * Ingress Traffic (e.g. DMA completion credit)  for TUNNEL Queue[i] is sent103 * to RESP Queue[i].104 */105#define FW_TUNNEL_NUM			8106#define FW_TUNNEL_SGEEC_START		8107#define FW_TUNNEL_TID_START		65544108 109/* FW_CTRL_NUM corresponds to the number of supported CTRL Queues. These queues110 * must start at SGE Egress Context FW_CTRL_SGEEC_START and must start at 'TID'111 * (or 'uP Token') FW_CTRL_TID_START.112 *113 * Ingress Traffic for CTRL Queue[i] is sent to RESP Queue[i].114 */115#define FW_CTRL_NUM			8116#define FW_CTRL_SGEEC_START		65528117#define FW_CTRL_TID_START		65536118 119/* FW_OFLD_NUM corresponds to the number of supported OFFLOAD Queues. These120 * queues must start at SGE Egress Context FW_OFLD_SGEEC_START.121 *122 * Note: the 'uP Token' in the SGE Egress Context fields is irrelevant for123 * OFFLOAD Queues, as the host is responsible for providing the correct TID in124 * every WR.125 *126 * Ingress Trafffic for OFFLOAD Queue[i] is sent to RESP Queue[i].127 */128#define FW_OFLD_NUM			8129#define FW_OFLD_SGEEC_START		0130 131/*132 *133 */134#define FW_RI_NUM			1135#define FW_RI_SGEEC_START		65527136#define FW_RI_TID_START			65552137 138/*139 * The RX_PKT_TID140 */141#define FW_RX_PKT_NUM			1142#define FW_RX_PKT_TID_START		65553143 144/* FW_WRC_NUM corresponds to the number of Work Request Context that supported145 * by the firmware.146 */147#define FW_WRC_NUM			\148    (65536 + FW_TUNNEL_NUM + FW_CTRL_NUM + FW_RI_NUM + FW_RX_PKT_NUM)149 150/*151 * FW type and version.152 */153#define S_FW_VERSION_TYPE		28154#define M_FW_VERSION_TYPE		0xF155#define V_FW_VERSION_TYPE(x)		((x) << S_FW_VERSION_TYPE)156#define G_FW_VERSION_TYPE(x)		\157    (((x) >> S_FW_VERSION_TYPE) & M_FW_VERSION_TYPE)158 159#define S_FW_VERSION_MAJOR		16160#define M_FW_VERSION_MAJOR		0xFFF161#define V_FW_VERSION_MAJOR(x)		((x) << S_FW_VERSION_MAJOR)162#define G_FW_VERSION_MAJOR(x)		\163    (((x) >> S_FW_VERSION_MAJOR) & M_FW_VERSION_MAJOR)164 165#define S_FW_VERSION_MINOR		8166#define M_FW_VERSION_MINOR		0xFF167#define V_FW_VERSION_MINOR(x)		((x) << S_FW_VERSION_MINOR)168#define G_FW_VERSION_MINOR(x)		\169    (((x) >> S_FW_VERSION_MINOR) & M_FW_VERSION_MINOR)170 171#define S_FW_VERSION_MICRO		0172#define M_FW_VERSION_MICRO		0xFF173#define V_FW_VERSION_MICRO(x)		((x) << S_FW_VERSION_MICRO)174#define G_FW_VERSION_MICRO(x)		\175    (((x) >> S_FW_VERSION_MICRO) & M_FW_VERSION_MICRO)176 177#endif				/* _FIRMWARE_EXPORTS_H_ */178