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1/*2 * This file is part of the Chelsio T4/T5/T6 Ethernet driver for Linux.3 *4 * Copyright (c) 2017 Chelsio Communications, Inc. All rights reserved.5 *6 * This software is available to you under a choice of one of two7 * licenses. You may choose to be licensed under the terms of the GNU8 * General Public License (GPL) Version 2, available from the file9 * COPYING in the main directory of this source tree, or the10 * OpenIB.org BSD license below:11 *12 * Redistribution and use in source and binary forms, with or13 * without modification, are permitted provided that the following14 * conditions are met:15 *16 * - Redistributions of source code must retain the above17 * copyright notice, this list of conditions and the following18 * disclaimer.19 *20 * - Redistributions in binary form must reproduce the above21 * copyright notice, this list of conditions and the following22 * disclaimer in the documentation and/or other materials23 * provided with the distribution.24 *25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE32 * SOFTWARE.33 */34 35#ifndef __T4_TCB_H36#define __T4_TCB_H37 38#define TCB_L2T_IX_W 039#define TCB_L2T_IX_S 1240#define TCB_L2T_IX_M 0xfffULL41#define TCB_L2T_IX_V(x) ((x) << TCB_L2T_IX_S)42 43#define TCB_T_FLAGS_W 144#define TCB_T_FLAGS_S 045#define TCB_T_FLAGS_M 0xffffffffffffffffULL46#define TCB_T_FLAGS_V(x) ((__u64)(x) << TCB_T_FLAGS_S)47 48#define TCB_FIELD_COOKIE_TFLAG 149 50#define TCB_SMAC_SEL_W 051#define TCB_SMAC_SEL_S 2452#define TCB_SMAC_SEL_M 0xffULL53#define TCB_SMAC_SEL_V(x) ((x) << TCB_SMAC_SEL_S)54 55#define TCB_T_FLAGS_W 156#define TCB_T_FLAGS_S 057#define TCB_T_FLAGS_M 0xffffffffffffffffULL58#define TCB_T_FLAGS_V(x) ((__u64)(x) << TCB_T_FLAGS_S)59 60#define TF_DROP_S 2261#define TF_DIRECT_STEER_S 2362#define TF_LPBK_S 5963 64#define TF_CCTRL_ECE_S 6065#define TF_CCTRL_CWR_S 6166#define TF_CCTRL_RFR_S 6267 68#define TCB_RSS_INFO_W 369#define TCB_RSS_INFO_S 070#define TCB_RSS_INFO_M 0x3ffULL71#define TCB_RSS_INFO_V(x) ((x) << TCB_RSS_INFO_S)72 73#define TCB_T_STATE_W 374#define TCB_T_STATE_S 1675#define TCB_T_STATE_M 0xfULL76#define TCB_T_STATE_V(x) ((x) << TCB_T_STATE_S)77 78#define TCB_TIMESTAMP_W 579#define TCB_TIMESTAMP_S 080#define TCB_TIMESTAMP_M 0xffffffffULL81#define TCB_TIMESTAMP_V(x) ((x) << TCB_TIMESTAMP_S)82 83#define TCB_RTT_TS_RECENT_AGE_W 684#define TCB_RTT_TS_RECENT_AGE_S 085#define TCB_RTT_TS_RECENT_AGE_M 0xffffffffULL86#define TCB_RTT_TS_RECENT_AGE_V(x) ((x) << TCB_RTT_TS_RECENT_AGE_S)87 88#define TCB_T_RTSEQ_RECENT_W 789#define TCB_T_RTSEQ_RECENT_S 090#define TCB_T_RTSEQ_RECENT_M 0xffffffffULL91#define TCB_T_RTSEQ_RECENT_V(x) ((x) << TCB_T_RTSEQ_RECENT_S)92 93#define TCB_TX_MAX_W 994#define TCB_TX_MAX_S 095#define TCB_TX_MAX_M 0xffffffffULL96#define TCB_TX_MAX_V(x) ((x) << TCB_TX_MAX_S)97 98#define TCB_SND_UNA_RAW_W 1099#define TCB_SND_UNA_RAW_S 0100#define TCB_SND_UNA_RAW_M 0xfffffffULL101#define TCB_SND_UNA_RAW_V(x) ((x) << TCB_SND_UNA_RAW_S)102 103#define TCB_SND_NXT_RAW_W 10104#define TCB_SND_NXT_RAW_S 28105#define TCB_SND_NXT_RAW_M 0xfffffffULL106#define TCB_SND_NXT_RAW_V(x) ((x) << TCB_SND_NXT_RAW_S)107 108#define TCB_SND_MAX_RAW_W 11109#define TCB_SND_MAX_RAW_S 24110#define TCB_SND_MAX_RAW_M 0xfffffffULL111#define TCB_SND_MAX_RAW_V(x) ((x) << TCB_SND_MAX_RAW_S)112 113#define TCB_RCV_NXT_W 16114#define TCB_RCV_NXT_S 10115#define TCB_RCV_NXT_M 0xffffffffULL116#define TCB_RCV_NXT_V(x) ((x) << TCB_RCV_NXT_S)117 118#define TCB_RCV_WND_W 17119#define TCB_RCV_WND_S 10120#define TCB_RCV_WND_M 0xffffffULL121#define TCB_RCV_WND_V(x) ((x) << TCB_RCV_WND_S)122 123#define TCB_RX_FRAG2_PTR_RAW_W 27124#define TCB_RX_FRAG3_LEN_RAW_W 29125#define TCB_RX_FRAG3_START_IDX_OFFSET_RAW_W 30126#define TCB_PDU_HDR_LEN_W 31127 128#define TCB_RQ_START_W 30129#define TCB_RQ_START_S 0130#define TCB_RQ_START_M 0x3ffffffULL131#define TCB_RQ_START_V(x) ((x) << TCB_RQ_START_S)132 133#define TF_RX_PDU_OUT_S 49134#define TF_RX_PDU_OUT_V(x) ((__u64)(x) << TF_RX_PDU_OUT_S)135 136#define TF_CORE_BYPASS_S 63137#define TF_CORE_BYPASS_V(x) ((__u64)(x) << TF_CORE_BYPASS_S)138#define TF_CORE_BYPASS_F TF_CORE_BYPASS_V(1)139 140#define TF_NON_OFFLOAD_S 1141#define TF_NON_OFFLOAD_V(x) ((x) << TF_NON_OFFLOAD_S)142#define TF_NON_OFFLOAD_F TF_NON_OFFLOAD_V(1)143 144#endif /* __T4_TCB_H */145